Baron Services DSSR-250C Hardware Installation

RVP8 User’s Manual
September 2005

Hardware Installation

2. Hardware Installation

2.1 Overview and Input Power Requirements

This chapter describes how to install the RVP8 hardware. Topics include mechanical installation
and siting, electrical specifications of the interface signals, system-level considerations and the
standard connector panel that is provided.

There are three major modules supplied with the RVP8. These are:

IFD (IF Digitizer) Typically mounted in the radar receiver cabinet.
Input Power 47–63 Hz 100–240 VAC Auto-ranging

Main Chassis Usually mounted in 19” EIA rack.
Input Power 60/50 Hz 115/230 VAC Manual Switches

I/O-62 Connector Panel

Usually mounted in 19” EIA rack within 2 m of Main Chassis

Much of the RVP8 I/O is configured via software. This makes the unit very flexible. Also, since
there is virtually no custom wiring, it is very easy to insert spare modules and circuit cards. The
software configuration of the I/O is described in Appendix A.

This section, in conjunction with Appendix B, describes the physical installation of the
hardware.

WARNING: The Main Chassis redundant power supplies are NOT auto-ranging
like the IFD. These are factory configured for the expected voltage, but should
be VERIFIED by the customer before power is applied to the system.

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2.2 IFD IF Digitizer Module Installation

The IFD mains power is to be permanently “hard wired” in a NEMA electrical
enclosure that is accessible only to a trained technician. The ground (earth)
connection should be attached directly to the IFD case mounting screw then
brought to the power supply ground connection.

Disconnect the the mains power before opening the IFD for service. The IFD is
best serviced by disconnecting the mains power, removing it from its mount and
placing it on a bench.

2.2.1 IFD Introduction

Hardware Installation

The IFD IF digitizer is housed in an electrically sealed solid metal enclosure to achieve good
immunity to external electrical noise. The internal circuitry has been designed to minimize the
number of digital components, and it is carefully grounded and shielded to make the cleanest
possible samples of the input IF signal. The unit is cooled by direct conduction of heat through
the metal chassis; there are no openings required for airflow.

The IFD replaces all of the IF receiver components that are found in a traditional analog receiver
system, i.e.,

S Band Pass Filters
S LOG Receiver
S AFC Circuit
S AGC or IAGC circuit
S Quad Phase Detector
S COHO (on magnetron systems)
S Line drivers for base band video

Indeed, one of the most time consuming parts of an upgrade is often the removal of old
components. Many customers choose to simply bypass them and leave them in place. In some
cases there will be other receiver modifications required to match the IFD signal input
specifications. For example, IF attenuators or an IF amplifier are sometimes required.

If you are doing an upgrade of an older system, you might want to consider
purchase of a new STALO which can make significant improvements in Doppler
performance.

You should carefully document and red-line your system schematics to reflect any changes to the
receiver.

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Hardware Installation

2.2.2 IFD Revision History

There have been several hardware revisions of the IFD module since its introduction initially
with the RVP7. Table 2–1 summarizes the differences among all of the versions that have been
manufactured so far. The remainder of this chapter covers only the 14-bit units, although the
previous generation 12-bit units are compatible with the RVP8 as well.

Table 2–1: Differences Among Versions of the IFD

Rev.B Rev.C Rev.D Rev.E & Higher

A/D Chip Analog Devices AD9042, 12–Bits AD6644, 14–Bits AD6645, 14–Bits

Nominal IF

Sample Rate

IF Inputs Single IF Input Channel Dual IF Inputs

A/D Noise

Density

Dynamic

Range

Link to Rx Coax uplink, Fiber downlink Integrated CAT-5E

Upgradability FPGA chips must be manually reprogrammed ReFlashable via Rx-Link

Input Signal

Level

Ext-Clock No Yes (shared with AFC connector)

Noise

Generator

Power Supplies +5.17V, +12V, –12V

Jumpers

(Table 2–7)

Uplink

Protocols

First

Production

None. The A/D dither power must

be supplied from wideband thermal

March 1997 April 1998 December 2000 August 2004

–76dBm/MHz –82dBm/MHz –85dBm/MHz

86dB at 0.5MHz 93dB at 0.5MHz 96dB at 0.5MHz

A/D saturation at +4.5dBm A/D saturation at +6.0dBm

noise in the RF/IF chain.

None AFC/Clock I/O

AFC-16

36MHz 72MHz

Built-in noise source supplies A/D dither power in the

200–900KHz range.

AFC-16 &

PLL-16

+5.23V Primarily.

12/15V required only for

+

analog AFC output

AFC/Clock I/O,

Dither and Config

Selections

Supports full set of protocols defined in Section 2.5.1

AFC, Hi-DAFC or stable

VCXO (recommended).

–12/15V required only for

AFC/Clock I/O, JTAG,

DAFC/Clock and Config

+5.33V Primarily.

+12/15V required for

analog AFC output.

Selections

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September 2005

Hardware Installation

2.2.3 IFD Power, Size and Mounting Considerations

The IFD is a compact sealed module with dimensions 23.6 x 10.9 x 3.0 cm. (9.3 x 4.3 x 1.2 in).
The unit is designed to be mounted on edge such that the 23.6 x 3.0 cm. surface is flush on the
back of the receiver cabinet with 10.9 cm. protrusion into the cabinet. The unit is typically
placed where a traditional LOG receiver would be installed. The IFD is cooled by direct
conduction through its metal enclosure. It should be positioned so that air can freely convect
around it, or bolted to a larger surface that will conduct the heat away.

The power supply module is separate and can be mounted nearby in the radar cabinet, or it can
be attached directly to the IFD using a special mounting bracket. The power supply and bracket
will add 3.3 cm. (1.3 in) of overall width to the receiver module.

The power supply is a low noise, low ripple, switching unit; the input voltage range is 100–240
VAC 47–63 Hz, autoranging. The IFD has an internal 3-stage power supply input filter to
minimize interference from the power cable. Nonetheless, it is still good practice to insure that
the four supply wires (+5V, –12V, +12V, and Ground) be kept short and twisted together. A
ferrite choke around the supply wires near the terminal strip is also recommended.

Important: The inductive filtering components inside the IFD introduce a
voltage drop in the +5V supply. To produce the correct internal voltage, the
supply voltage measured at the external terminal block should be 5.33V for
Rev.E and later, 5.23V for Rev.D, and 5.17V for Rev.C and earlier boards.

Important: The voltage drop across the inductive filtering components causes
the ground terminal of the power supply to float several tenths of a volt above
chassis ground. For this reason, the IFD power supply should never be tapped
to supply power to other nearby equipment.

Mounting space should also be reserved for the external analog anti-alias filters. These filters
can be mounted in the radar cabinet itself, or they can be attached directly to the IFD on the
opposite side of the power supply. The filters and mounting bracket will add 2.0 cm. (0.8 in) of
overall width.

The 72MHz CAT-5E IFD (Rev.F) represents a factor–of–two improvement in A/D sampling rate
and communications bandwidth between the IFD and RVP8/Rx card. This provides important
advantages in the performance of your radar system, but it does also place greater demands on
the connecting link. The CAT-5E cable carries real–time 1.080MBaud downlink serial data on
three of its four twisted pairs, and uses the fourth pair for uplink communication. The data rate
on each downlink pair actually exceeds the data rate for GigaBit ethernet, hence very high
quality cable must be used, and maximum cable length is limited to 25-meters. There is also a
minimum cable length of 2-meters.

We recommend using a shielded CAT–5E cable (certified to >= 350MHz) having shielded RJ45
plugs on each end. The Rx board provides a DC return path for the cable shield, while the IFD
provides an AC GND only (isolated to 2KV). This design prevents ground loop currents from
flowing between units, even when they’re plugged into different AC/Mains.

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2.2.4 IFD I/O Summary

The connectors on the IFD are labelled and described below for each hardware revision.

Table 2–2: IFD Connectors (All Revisions)

IFD I/O Summary

Connector

Style Description Reference

Label

J1

IFĆIN

J2

BURST
(COHO)

J3

AFC
(CLK)

SMA IF signal from LNA/mixer; via an antiĆaliasing filter

centered at IF (supplied by SIGMET). 50W, + 6.5 dBm
max

SMA IF Tx sample from waveguide tap and mixer; via an

antiĆaliasing filter centered at IF (supplied by SIGĆ
MET). 50W, +6.5 dBm max

SMA AFC output (+-10V) or reference clock input for coĆ

herent systems (2-60 MHz -10 to 0 dBm). The funcĆ
tion of the connector is controlled by jumper selecĆ
tion within the IFD.

2.2.6

2.2.7

2.2.8

2.2.10

2.2.6

2.2.11 AFC

2.2.12 CLK

Since they share the same connector, analog AFC output and reference clock input can not be
used simultaneously. However, this is a very rare requirement since an analog AFC output is
used for magnetron systems and a reference clock input is typically used for fully coherent TWT
and Klystron systems.

Table 2–3: IFD Connectors (Rev.A–Rev.D)

IFD I/O Summary

Connector

Style Description Reference

Label

J4

UPLINK

J5

FIBERĆOUT

SMA/BNC Connects to the RVP8/Rx PCI card by 75 Ohm

shielded cable. The connector is SMA with an SMA/
BNC adapter provided.

ST 62.5/125 micron multimode optical cable terminated

in type ST connectors. IFD cam be located up to
100m from the RVP8/Rx PCI card.

Table 2–4: IFD Connectors (Rev.E & Greater)

IFD I/O Summary

Connector

Style Description Reference

Label

J4

DAFC(CLK)

J5

RxĆLink

SMA Synthesized legacy coax uplink stream for backward

compatibility, or Expansion Clock input or output.

RJĆ45 Connects to the RVP8/Rx PCI card via CATĆ5E cable

up to 25Ćmeters in length.

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2.2.13

2.2.13

2.2.13

2.2.13

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Hardware Installation

2.2.5 IFD Adjustments and Test/Status Indicators

The IFD is packaged in a tight metal enclosure for maximum noise immunity. The only
adjustments on the module are the internal gain and offset pots that adjust the AFC analog
output. Two switches on the unit provide standalone test features to verify the proper functioning
of the IFD and to assist with setting the voltage span of the AFC DAC.

Table 2–5: IFD Toggle Switch Settings

SW1 SW2 Function
A A AFC Test Low Voltage

A B AFC Test Midpoint Voltage
A C AFC Test High Voltage
B A Swap Burst and IF Input Signals
B B Normal Operation (also labeled as “run”)
B C Reserved (downlink test pattern)
C A Reserved
C B Reserved (downlink test pattern)
C C Reserved (downlink test pattern)

Two LEDs provide status information for the IFD itself, as well as status of the communication
link(s) to the RVP8/Rx PCI card. These LEDs have the same interpretation across all revisions
of the IFD. For Rev.B through Rev.D the words “uplink” and “downlink” refer to the physical
coax uplink and fiber downlink cables. For Rev.E and higher, those words refer to conceptually
similar uses of the four twisted pairs within the integrated CAT-5E link.

Table 2–6: IFD LED Indicator Interpretations

Red (Uplink) Green (Ready) Meaning
Blink Blink Reset sequence (powerup, or from uplink)

Blink Off Uplink is dead (no uplink protocol from RVP8/Rx)
On Off Uplink is alive, but downlink is dead
On On Normal Operation (IFD and Main are both okay)

For IFDs at Rev.E and higher, the two LEDs on the RJ-45 connector also convey status about the
CAT-5E link itself. Green indicates that valid clock and framing waveforms are present on the
uplink. Yellow indicates that the RVP8/Rx card is receiving valid data from the IFD, including
the IFD’s report of the uplink being okay. These LEDs show valid status at all times (not just
when the RVP8 software is running) and thus, both indicators should be illuminated whenever
the CAT-5E cable is connected. Moreover, the Green/Yellow interpretation is consistent at both
the IFD and RVP8/Rx ends: green indicates the reception of proper low-level electrical and

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Hardware Installation

framing protocols, and yellow indicates that the green LED is ON at the other end, i.e., that the
other end is receiving our transmissions correctly and is able to communicate that information
back to us.

The internal jumper settings are summarized in the following table. Please also refer to Sections

2.2.11 and 2.2.12 for more information on setting up the AFC or External Clock options.

Table 2–7: IFD Internal Jumper Settings

Rev.B Rev.C Rev.D Rev.E and Higher

AB: AFC Voltage Output

JP1 N/A

BC: External Clock Input, 50W Termination

Open: External Clock Input, No Termination

JP2 N/A Reserved (Open)

AB: Unused

JP3 N/A

BC: External Clock

Open: AFC Voltage Output

JP4 N/A

AB: Dither Applied to Burst

BC: No Dither on Burst

JP5 N/A

JP6 N/A

JP7 N/A

AB: Normal JTAG control

BC: Factory reserved

Power Supply to Oscillator

Use wirewrap, not jumper

AB: Regulated from +12V

BC: Direct from +5V

AB: Oscillator is a VCXO

BC: Oscillator is fixed XO

Reserved for factory tests

Must be left open

J4 Protocol Selector

AB: Legacy DAFC output

BC: Auxiliary CLK In/Out

J4 DAFC Output Level

AB: +5V Signaling

BC: +12V Signaling

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Hardware Installation

2.2.6 IFD Input A/D Saturation Levels

There are two analog signals that must be supplied to the IFD:

S IF receiver signal
S IF Tx Sample (Burst Pulse) for magnetron, or COHO reference for klystron.

Both of these inputs are on SMA connectors. The IF signal should be driven by the front-end
mixer/LNA/IF-Amp. components, similar to the way that a LOG receiver would normally be
installed. The magnetron burst pulse or klystron COHO reference is also derived in the same
manner as a traditional analog receiver.

Note: Even for fully coherent Klystron and TWT systems, SIGMET
recommends the use of an actual IF Tx sample. If this is not possible, then the
COHO itself may be used instead. If there is phase modulation, then the
phase-shifted COHO should be input.

The A/D input saturation level for both the IF-Input and Burst-Input is +6 dBm (4.5 dBm for
Rev.C or earlier). In almost all installations an external anti-alias filter is installed on both of
these inputs. These filters (if supplied by SIGMET) are mounted externally on one side of the
IFD, and have an insertion loss of approximately 1–2dB. Thus, the input saturation level will be
+8dBm measured at the filter inputs.

For the burst pulse or COHO reference it is important not to exceed the A/D saturation level.
This reference signal should be strong enough so that most of the bits in the A/D converter are
used effectively, but it should also allow a few deciBels below the saturation level for safety.
The recommended power level is in the range –12 to +1 dBm, measured as described in section
D.14. This is important for making a precise phase measurement on each pulse.

In contrast, for the IF receiver input it is permissible (in fact desirable) to occasionally exceed
the A/D input saturation level at the strongest targets. The RVP8 employs a statistical
linearization algorithm to derive correct power levels from targets that are as much as 6dB above
saturation. The actual IF signal level should be established by weak-signal and noise
considerations (see below), rather than by working backwards from the saturation level.

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2.2.7 IF Bandwidth and Dynamic Range

The RVP8 performs best with a wide bandwidth IF input signal. This is because a wideband
signal can be made free of phase distortions within the (relatively narrow) matched passband of
the received signal. The RVP8 uses an external analog anti-aliasing filter at each of its IF and
Burst inputs. The purpose of these filters is to block frequencies that would otherwise alias into
the matched filter passband. The anti-alias filters have a nominal passband width of 14 MHz
centered at 30MHz, i.e. from 23MHz to 37MHz. This is the recommended operating bandwidth
for the IF signal, although the RVP8 will still work successfully with lesser IF bandwidth.

At the 36MHz sampling rate the quantization noise introduced by LSB uncertainties is spread
over an 18MHz bandwidth. For an ideal 14-bit A/D converter that saturates at +6dBm the
effective quantization noise level would be:

)6dBm * 20log10(214) * 10log10(

18MHz

1MHz

) +*90dBm (at 1MHz BW)

If samples from this ideal converter were processed with a digital filter having a bandwidth of
1MHz, then an input signal at –90dBm would have a signal-to-noise ratio of 0dB. A narrower
FIR passband (corresponding to a longer transmitted pulse) would decrease the quantization
noise even further, so that 0dB SNR would be achieved at even lower input power.

In practice, the 14-bit A/D converter used inside the IFD does not behave quite this well. The
Analog Devices AD6644 chip has been measured to have a wideband SNR of 76dB, i.e., 8dB
less than the 84dB range expected for an ideal converter. The above calculation for noise
density thus becomes:

)6dBm * 76dB * 10log10(

18MHz

1MHz

) +*82dBm (at 1MHz BW)

Indeed, the RVP8’s receiver power monitor described in Section 4.5 will show a filtered power
level of approximately –82dBm when the FIR bandwidth is 1MHz and the IFD inputs are
terminated in 50–Ohms.

The inverse correspondence between filter bandwidth and the 0dB SNR signal level leads to an
interesting and useful property of wideband digital receivers: they can operate over a dynamic
range that is much greater than the inherent SNR of their A/D converter would imply. If this
particular A/D chip were performing direct conversion at “base band” it would have a dynamic
range of only 76dB. However, by utilizing the extra bandwidth of the converter, the RVP8 is
able to extend the dynamic range to approximately 100dB.

To understand this, begin with the 88dB interval between the converter’s +6dBm saturation level
and the –82dBm 0dB SNR level at 1MHz bandwidth. Add to this:

S 6dB for the statistical linearization that is performed on signals that exceed the saturation

level. The RVP8 can recover signal power accurately even when the A/D converter is
driven beyond saturation. Velocity data will also be valid, but spectral width may be
overestimated.

S 4dB for usable dynamic range below the 0dB SNR level. In practice, a coherent signal at

–4dB SNR can easily be measured when 25 or more pulses are used.

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Thus, the overall dynamic range at 1MHz bandwidth (approx. 1 msec transmit pulse) is 88+6+4
= 98dB. For a 0.5 msec pulse the dynamic range would be reduced to 95dB; but it would
increase to 101dB for a 2.0 msec pulse. An actual calibration curve demonstrating this
performance is shown in Figure 2–1, for which the RVP8’s digital bandwidth was set to

0.53MHz and external signal generator steps of 1dB were used over the full operating range.

Figure 2–1: Calibration Plot for a Stand-alone 14-Bit IFD

20

10

1-dB Compression Point

0

–10

–20

–30

–40

–50

–60

–70

–80

1-dB Detection Threshold

–90

Overall Dynamic Range of 101dB

–100

–100 –90 –80 –70 –60 –50 –40 –30 –20 –10 0 10 20

Input Power in dBm Measured at IFD IF-Input

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Hardware Installation

2.2.8 IF Gain and System Performance

The previous discussion was concerned with measuring the dynamic range of a stand-alone IFD.
We will now examine how the unit performs in the context of a complete radar receiver. We
assume that an LNA/Mixer has already been selected that offers an appropriate balance between
price and noise figure. Having chosen these front-end components, the only parameter that
remains to be determined is the total RF/IF gain between the antenna waveguide and the IFD.

Assume that the thermal noise (kT) of the system is –114dBm/MHz, and that the noise figure of
the LNA/Mixer is 2dB. We wish to bring this –112dBm/MHz noise level up into the working
range of the IFD so that the received echoes can be optimally processed. However, in trying to
select the required gain, we realize that we must make a tradeoff between preserving the receiver
sensitivity that has been established by the LNA, and preserving the overall dynamic range of
the IFD. This is the exact same tradeoff that is made in traditional multi-stage analog receiver
systems that include a wide dynamic range LOG receiver.

Figure 2–2: Tradeoff Between Dynamic Range and Sensitivity

10

)

9

Recommended

Operating Region

8

IFD

/ N

LNA

7

( N

10

6

5

4

3

Reduction of Receiver Sensitivity (dB)

2

Power Ratio R = 10log

1

0

012345678910

Reduction of IFD Dynamic Range (dB)

The solid red curve in Figure 2–2 shows that these two variables interact in a symmetric manner,
so that any operating point (x,y) is always matched by a dual operating point at (y,x). To
understand the construction of this plot, let N

represent the stand-alone (terminated input)

IFD

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Hardware Installation

noise power of the IFD over some bandwidth. Similarly, let N

represent the LNA/Mixer

LNA

thermal noise power over that same bandwidth, and after amplification by all RF and IF stages.
Note that N
whereas N

is primarily due to the quantization noise that is introduced by the A/D converter,

IFD

has its origins in the fundamental thermal noise of the receiving system. The

LNA

reduction of receiver sensitivity is the amount by which the LNA thermal noise is increased over
the original level established by the front-end components:

N

DSensitivity + 10log10( N

LNA

) N

) * 10log10( N

IFD

) + 10 log

LNA

10

ǒ

1 )

IFD

Ǔ

N

LNA

Likewise, the reduction of RVP8 dynamic range is the amount by which the IFD quantization
noise is increased over its stand-alone value:

N

DDynamicRange + 10 log10( N

LNA

) N

) * 10log10( N

IFD

) + 10 log

IFD

10

ǒ

1 )

LNA

Ǔ

N

IFD

Note that both of these quantities depend only on the ratio of the two powers; hence, the two
equations define a parametric relationship in the dimensionless variable R + ( N

LNA

ń N

IFD

).
Figure 2–2 was created by sweeping the value of R from 1/9 to 9. The solid red curve shows the
locus of ( DDynamicRange, DSensitivity ) points, and the dashed green curve shows R itself
(expressed in dB) as a function of DDynamicRange. For example, when the LNA noise power
is equal to the IFD noise power, R is 1.0 (0dB) and there will be a 3dB reduction in both
sensitivity and dynamic range.

The recommended operating region is the portion of the curve that limits the loss of sensitivity
to between 1.4dB and 0.65dB. The attendant loss of dynamic range will fall between 5.5dB and

8.5dB respectively. Each axis of the plot has an important physical interpretation within the
radar system.

S The horizontal axis is equivalent to the increase in the RVP8’s report of filtered power

when the IF-Input coax cable is connected versus disconnected. This is an easy quantity
to measure, and thus provides a simple way to check the overall gain of the
LNA/Mixer/IF components.

S The vertical axis is equivalent to a worsening of the LNA/Mixer noise figure. This can

also be interpreted as the amount of transmit power that is, in some sense, “wasted” when
observing very weak echoes. If you have installed an expensive LNA with a very low
noise figure, then you will want to pick an operating point that makes the most of
preserving that investment.

Figure 2–2 can be used to calculate the net gain that is required by the front-end components,
and to predict the final system performance:

1. Choose an operating point that balances your need for sensitivity versus dynamic
range. For this example, we will allow a 1dB loss of sensitivity from the
theoretical limit of the LNA/Mixer, and will assume a bandwidth of 0.5MHz.

2. For a 1dB loss of sensitivity, the DDynamicRange is first determined from the
solid red curve as 7dB. The required noise ratio R is then read vertically on the
dashed green curve as 6.1dB.

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