Page 1
SBC82621 Series
Socket370 Half-size
All-in-One CPU Card
User’s Manual
Page 2
Disclaimers
The information in this manual has been carefully checked and is believed
to be accurate. AXIOMTEK Co., Ltd. assumes no responsibility for any
infringements of patents or other rights of third parties which may result
from its use.
AXIOMTEK assumes no responsibility for any inaccuracies that may be
contained in this document. AXIOMTEK makes no commitment to update
or to keep current the information contained in this manual.
AXIOMTEK reserves the right to make improvements to this document
and/or product at any time and without notice.
No part of this document may be reproduced, stored in a retrieval system,
or transmitted, in any form or by any means, electronic, mechanical,
photocopying, recording, or otherwise, without the prior written
permission of AXIOMTEK Co., Ltd.
Copyright 2004 by AXIOMTEK Co., Ltd.
All rights reserved.
February 2004, Version A1
Printed in Taiwan
ii
Page 3
ESD Precautions
Integrated circuits on computer boards are sensitive to static
electricity. To avoid damaging chips from electrostatic
discharge, observe the following precautions:
Do not remove boards or integrated circuits from their anti-static
packaging until you are ready to install them.
Before handling a board or integrated circuit, touch an unpainted
portion of the system unit chassis for a few seconds. This helps to
discharge any static electricity on your body.
Wear a wrist-grounding strap, available from most electronic
component stores, when handling boards and components.
Trademarks Acknowledgments
AXIOMTEK is a trademark of AXIOMTEK Co., Ltd.
IBM is a registered trademark of International Business
Machines Corporation.
MS-DOS, and Windows ’95/98/NT/2000/XP/ME are trademarks
of Microsoft Corporation.
Award is a trademark of Award Software, Inc.
IBM, PC/AT, PS/2, VGA are trademarks of International
Business Machines Corporation.
Intel, Pentium, Pentium II, Pentium III and Celeron are
trademarks of Intel Corporation.
VIA is a trademark of VIA Technologies , Inc.
S3 is a trademark of S3 Graphics , Inc
Realtek RTL-8100C/RTL-8110S is registered trademark of
Realtek Semiconductor Corporation.
Other brand names and trademarks are the properties and
registered brands of their respective owners.
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
T a b l e o f C o n t e n t s
Chapter 1 Introduction............................................................1
1.1 General Description.......................................................1
1.2 Specifications ................................................................2
1.3 Utilities Supported.........................................................3
Chapter 2 Jumpers and Connectors......................................5
2.1 Jumpers and Connectors Layout.................................5
2.2 Jumpers and Connectors Dimensions ........................6
2.3 Jumper Settings.............................................................7
2.3.1 Watchdog Trigger Mode Setting: JP3 .............................. 7
2.3.2 CMOS Clear Jumper: JP8 ............................................... 8
2.3.3 Power Selection of Flat Panel Connector (VDDM of CN1):
JP1 ................................................................................. 8
2.3.4 COM RS232/422/485 Setttings: JP2, JP4, JP5................... 8
2.3.5 DiskOnChip Memory Segment: JP6............................... 9
2.3.6 USB Wake-Up Settings: JP7 .............................................. 9
2.4 Connectors...................................................................10
2.4.1 VGA Interface............................................................... 11
2.4.2 Floppy Disk Controller.................................................... 18
2.4.3 Parallel Port Interface .................................................... 18
2.4.4 Serial Port Interface....................................................... 19
2.4.5 Real Time Clock and CMOS RAM.................................. 19
2.4.6 Keyboard and Mouse Connectors................................ 19
2.4.7 USB Connector ............................................................. 20
2.4.8 IrDA Connector............................................................. 20
2.4.9 Power Input Connectors ............................................... 21
2.4.10 ACPI Connector.......................................................... 21
2.4.11 PC/104 Connectors .................................................... 22
2.4.12 CPU Fan Connector: FAN1 & FAN2 ............................. 23
2.4.13 Flat Panel Bezel Connector......................................... 23
2.4.14 Enhanced IDE Interface Connector............................ 24
Table of Contents
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
Chapter 3 Hardware Description........................................25
3.1 Microprocessors..........................................................25
3.2 CPU Bus Clock.............................................................25
3.3 BIOS ...........................................................................25
3.4 System Momory...........................................................25
3.5 Real Time Clock and CMOS RAM...............................26
3.6 VGA Interface...............................................................26
3.7 I/O Port Address Map ..................................................27
3.8 Interrupt Controller......................................................28
Chapter 4 Award BIOS Utility ............................................29
4.1 BIOS Introduction ........................................................29
4.2 BIOS Setup...................................................................29
4.2.1 Standard CMOS Setup.................................................. 31
4.2.2 Advanced BIOS Features .............................................. 35
4.2.3 Advanced Chipset Features ......................................... 39
4.2.4 Integrated Peripherals................................................... 43
4.2.5 Power Management Setup........................................... 47
4.2.6 PNP/PCI Configuration................................................... 50
4.2.7 PC Health Status ........................................................... 53
4.2.8 Frequency/Voltage Control........................................... 54
4.2.9 Load Fail Safe Defaults ................................................. 55
4.2.10 Load Optimized Defaults ............................................ 56
4.2.11 Save & Exit Setup........................................................ 57
4.2.12 Exit Without Saving ...................................................... 58
Appendix A Watchdog Timer .............................................59
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
C h a p t e r 1
Introduction
1.1 General Description
The SBC82621 is an industrial grade CPU card. It provides
reliable high performance and function-rich capability.
The CPU incorporates the VIA VT8606 chipset and the
VT82C686B with built-in AGP-4x VGA controller. This
combination ensures its compatibility with ISA bus passive
backplanes.
Designed for the professional embedded developers, the
Socket370 all-in-one SBC82621 CPU card is virtually the
ultimate one-step solution to various applications.
Introduction
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
1.2 Specifications
CPU: Intel Celeron, Pentium III, Tualatin and VIA Cyrix
III
System Chipset: VIA TwisterT (PN133T) VT8606,
VT82C686B with integrated real-time clock
BIOS: Award PnP BIOS
Standard I/O:
Two serial ports; 1x RS-232, 1x RS-232/422/485
1 x parallel port, SPP/EPP/ECP
1 x IDE Interface
1 x FDD Interface
1 x PS/2 Keyboard Interface
1 x PS/2 Mouse Interface
1 x IrDA interface for wireless communication
System Memory:
1 x 168-pin DIMM socket
Maximum of 512MB SDRAM
ECC/parity checking
L2 Cache: integrated in CPU
Watchdog Timer:
Generates a system reset or NMI by jumper selectable
Software programmable time interval
64 levels, 0.5~8/5~80/50~800/100~1600 seconds
Ethernet:
Dual Realtek 8100C PCI Bus 10/100M Base-T or One
Realtek 8100C PCI Bus 10/100M Base-T 、Realtek 8110s
PCI Bus 10/100/1000M Base-T
Wake On LAN (via ATX power supply)
Onboard RJ-45 connector
2
Introduction
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
VGA/Flat Panel Controller:
AGP interface controller with integrated system main-
memory supporting CRT/LCD displays
Supports up to 1280 x 1024 256-color resolution on non-
interlaced CRT monitors, and 1024 x 768 16 bit-color on
LCD panel monitors
USB Interface: use a VIA VT6212 4-Port Host Controller
support two ports; USB Spec. Rev. 2.0 compliant
DiskOnChip
: ports DisksupOnChip
Expansion Slots: one 16-bit PC/104 connector
Dimensions: 121.92 x 185 mm
NOTE: Specifications are subject to change without notice.
1.3 Utilities Supported
VIA Chipset Drivers
Ethernet Utility
Flat panel/CRT Drivers
System Doctor
Introduction
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Introduction
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
C h a p t e r 2
Jumpers and Connectors
2.1 Jumpers and Connectors Layout
The following figure shows the layout of all jumpers and
connectors on the SBC82621 CPU card.
Jumpers and Connectors
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
2.2 Jumpers and Connectors Dimensions
The following figure shows the location of all jumpers and
connectors on the SBC82621 CPU card.
6
Jumpers and Connectors
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
2.3 Jumper Settings
Making the proper jumper settings configures the SBC82621 to
match the needs of your application. The following tables show
the correct jumper settings for the onboard devices.
Jumper Default Setting Jumper Setting
JP1 Connector LCD Power Selection: VDDM at 5V Short 2-3
JP2 COM2 Port Setting: RS-232 Short 3-5, 4-6
JP3 Watchdog Trigger Mode: Disabled Open
JP4 COM2 Port Setting: RS-232 Short 3-5, 4-6
JP5 COM2 Port Setting: RS-232 Short 1-2
JP6
JP7 USB Wake-Up Selection: Disabled Short 2-3
JP8 Clear CMOS Setting: Normal Short 1-2
DiskOnChip Memory Segment :
D0000-D1FFF
Short 1-2
2.3.1 Watchdog Trigger Mode Setting: JP3
The watchdog timer is an indispensable feature of the
SBC82621. It has a sensitive error detection function and a
report function. When the CPU processing comes to a halt, the
watchdog either generates a NMI or resets the CPU.
Options Setting
Short 1-2
Short 2-3
Open
123
NMI
RESET
Disabled
(default)
Jumpers and Connectors
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
2.3.2 CMOS Clear Jumper: JP8
Options Settings
Short 2-3
Short 1-2
123
Clear CMOS
Normal
(default)
2.3.3 Power Selection of Flat Panel Connector
(VDDM of CN1): JP1
SBC82621 supports +3.3V or +5V flat panel displays. When
using such type of flat panels, configure jumper JP1 to the
appropriate voltage of the flat panel.
1
2
3
VDDM Settings
5V (default)
3.3V
Short 2-3
Short 1-2
2.3.4 COM RS232/422/485 Settings: JP2, JP4, JP5
COM4 JP2 JP4 JP5
RS-232 (default)
RS-422
RS-485
JP2 and JP4
Short 3-5, 4-6 Short 3-5, 4-6 Short 1-2
Short 1-3, 2-4 Short 1-3, 2-4 Short 3-4
Short 1-3, 2-4 Short 1-3, 2-4 Short 5-6, 7-8
JP5
135
8
6
246
4
2
7
5
3
1
8
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
2.3.5 DiskOnChip Memory Segment: JP6
246
135
8
D0000 – D1FFF (default)
7
Options Settings
D2000-D3FFF
D4000-D5FFF
D6000-D7FFF
2.3.6 USB Wake-Up Settings: JP7
1
2
3
Options Settings
Enabled (default)
Disabled
Short 1-2
Short 3-4
Short 5-6
Short 7-8
Short 1-2
Short 2-3
Jumpers and Connectors
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
2.4 Connectors
The connectors allow the CPU card to connect with other parts
of the system. Some problems encountered by your system
may be a result from loose or improper connections. Ensure
that all connectors are in place and firmly attached. The
following table lists the function of each connector on the
SBC82621.
Connectors Label
IDE Connector IDE1
FDD Connector FDD1
44-pin LCD Connector CN1
20-pin LCD Connector CN2
Flat Panel Bezel Connector CN3
Power Input Connectors CN4 & CN8
PC104 Connector CN5 & CN6
PS/2 Keyboard and Mouse Connector CN7
Keyboard Connector CN9
Mouse Connector CN10
ACPI Connector CN11
ATX PS_ON Switch CN12
Printer Port Connector PRT1
VGA Connector VGA1
IrDA Connector IR1
COM1 COM1
COM2 COM2
USB Connector USB1
Ethernet1 Connector LAN1
Ethernet2 Connector LAN2
CPU Fan Connector FAN1 & FAN2
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
2.4.1 VGA Interface
2.4.1.1 Flat Panel/CRT Interface Controller
The VT8606 built-in a high-performance flat panel/super VGA
display controller (S3 Savage4) on chipset. TheVGA RAM use
system main-memory. It is capable of driving a wide array of
flat panel and CRT displays. It can also support CRT at a
maximum resolution of up to 1920x1440 with 24-bits colors,
and panel resolutions of up to 1280x1024. It displays up to
226,981 different colors on passive DSTN/TFT flat panels and
up to 16M colors on 36-bit active matrix flat panels.
2.4.1.2 Features
Fully compatible with IBM
Flat panel and CRT monitor can be displayed simultaneously
The VGA RAM support system main-memory up to 64MB
Supports panel resolution up to 1280x1024
Supports non-interlaced CRT monitors with resolutions up to
1920x1440 24-bits colors
TM
VGA
Direct interface to Color and Monochrome Dual Drive and Single
Drive panels
SMARTMAP intelligent color to gray scale conversion enhances
text legibility
Integrated programmable linear address feature accelerates
GUI performance
Hardware Windows acceleration
Built-in 44 pins general purpose connector for flat panel display,
and an extended 20-pin for 36 bit XVGA flat panel
Jumpers and Connectors
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
2.4.1.3 VGA/Flat Panel Connector: VGA1, CN1, CN2
The SBC82621 has three connectors that support CRT VGA
and flat panel displays, individually or simultaneously. VGA1 is
a standard 15-pin pin header connector commonly used for the
CRT VGA display, and CN1 (44-pin) CN2 (20-pin) are dual-inline headers for flat panel connection. Configuration of the
VGA interface is done via the software utility and no jumper
setting is required. The following two tables are the pin
assignments for the CRT/VGA connector and the flat panel
connector.
VGA1: CRT/VGA Connector Pin Assignment
Pin Description Pin Description Pin Description
1
4
7
10
13
Red
N/A
AGND
GND
Horizontal Sync
2
5
8
11
14
CN1: Flat Panel Connector Pin Assignment
Pin Description Pin Description Pin Description
1
4
7
10
13
16
19
22
25
28
31
34
37
40
43
-12V
GND
ENAVEE
P1
P4
P7
P10
P13
P16
P19
P22
GND
M
ENABKL
VDDM
2
5
8
11
14
17
20
23
26
29
32
35
38
41
44
Green
GND
AGND
N/A
Vertical Sync
+12VM
VDDM
GND
P2
P5
P8
P11
P14
P17
P20
P23
SHFCLK
LP
GND
VDDM
3
6
9
12
15
3
6
9
12
15
18
21
24
27
30
33
36
39
42
Blue
AGND
N/A
DDC DAT
DDC CLK
GND
VDDM
P0
P3
P6
P9
P12
P15
P18
P21
GND
FLM
GND
-SHFCLK
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
CN2: Flat Panel Connector for XVGA
Pin Description Pin Description Pin Description
1
4
7
10
13
16
19
GND
P25
P28
GND
P32
P35
+12VM
2
5
8
11
14
17
20
GND
P26
P29
P30
P33
VDDM
+12VM
3
6
9
12
15
18
P24
P27
GND
P31
P34
VDDM
2.1.4.4 Flat Panel Connector Pin Description
Name Description
P0~P35
ENABKL
SHFCLK
M
LP
FLM
+12VM
ENAVEE /
ENAVDD
VDDM
Flat panel data output
Activity Indicator and Enable Backlight outputs
Shift clock. Pixel clock for flat panel data
M signal for panel AC drive control
Latch pulse. Flat panel equivalent of HSYNC
First line marker. Flat panel equivalent of VSYNC
+12V power controlled by chipset
Power sequencing controls for panel LCD bias volt
3.3V or 5V power controlled by chipset and selected by
JP1
Jumpers and Connectors
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
Flat Panel Interface Pins for Color DSTN and Color TFT LCD (Twister-T
VT8606)
Pin
LP
FLM
SHFCLK
M
ENAVDD
ENABLK
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P!6
P17
P18
P19
P20
P21
P22
P23
P24
STN DSTN
8-bit 16-bit 24-bit 8-bit
LP LP HSYNC HSYNC
FP FP VSYNC VSYNC
XCK XCK CK CK
DE DE DE DE
ENAVDD ENAVDD ENAVDD ENAVDD
ENABLK ENABLK ENABLK ENABLK
R0 R0 R0 LR0
G0 G0 G0
B0 B0 B0 LG0
R1 R1 R1
G1 G1 G1 LB0
B1 B1 B1
R2 R2 R2 LR1
G2 G2 G2
B2 B2
R3 R3
G3 G3
B3 B3
R4 R4
G4 G4
B4 B4
R5 R5
G5
B5
R6 UR0
G6
B6 UG0
R7
G7 UB0
B7
UR1
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
Pin
LP
FLM
SHFCLK
M
ENAVDD
ENABLK
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P!6
P17
P18
P19
P20
P21
P22
P23
P30
P31
P32
P33
P34
P35
16-bit 24-bit 9-bit 2X9-bit
XCK XCK CK CK
ENAVDD ENAVDD ENAVDD ENAVDD
ENABLK ENABLK ENABLK ENABLK
UB1 UB1 R0 R00
UB0 UB0 R10
LG1 LG1 R2 R02
LG0 LG0 R12
UG1 UG1
UG0 UG0
UR1 UR1 G2 G02
UR0 UR0 G12
DSTN TFT
LP LP HSYNC HSYNC
FP FP VSYNC VSYNC
DE DE DE DE
LB3
LB2
LB1 LB1
LB0 LB0
UB3
UB2
LG3 R1 R01
LG2 R11
UG3
UG2
LR3
LR2
LR1 LR1 G0 G00
LR0 LR0 G10
UR3 G1 G01
UR2 G11
B0 B00
B10
B1 B01
B11
B2 B02
B12
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
Pin
LP
FLM
SHFCLK
M
ENAVDD
ENABLK
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P!6
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
12-bit 2X12-bit 15-bit 2X15-bit
LP LP HSYNC HSYNC
FP FP VSYNC VSYNC
XCK XCK CK CK
DE DE DE DE
ENAVDD ENAVDD ENAVDD ENAVDD
ENABLK ENABLK ENABLK ENABLK
R0 R00 R1 R01
R1 R01 R2 R02
R2 R02 R3 R03
R3 R03 R4 R04
G0 G00 G1 G01
G1 G01 G2 G02
G2 G02 G3 G03
G3 G03 G4 G04
TFT TFT
R0 R00
R10
R10 R11
R11 R12
R12 R13
R13 R14
G0 G00
G10
G10 G11
G11 G12
G12 G13
G13 G14
B0 B00
B10
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
Pin
P28
P29
P30
P31
P32
P33
P34
P35
12-bit 2X12-bit 15-bit 2X15-bit
B0 B00 B1 B01
B1 B01 B2 B02
B2 B02 B3 B03
B3 B03 B4 B04
TFT TFT
B10 B11
B11 B12
B12 B13
B13 B14
Pin
LP
FLM
SHFCLK
M
ENAVDD
ENABLK
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
18-bit 24-bit 2X18-bit
XCK XCK CK
ENAVDD ENAVDD ENAVDD
ENABLK ENABLK ENABLK
TFT TFT
LP LP HSYNC
FP FP VSYNC
DE DE DE
B0 R00
B1 R10
B0 B2 R01
B1 B3 R11
B2 B4 R02
B3 B5 R12
B4 B6 R03
B5 B7 R13
G0 R04
G1 R14
G0 G2 R05
G1 G3 R15
G2 G4 G00
G3 G5 G10
G4 G6 G01
G5 G7 G11
R0 G02
R1 G12
R0 R2 G03
R1 R3 G13
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
Pin
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
P35
18-bit 24-bit 2X18-bit
TFT TFT
R2 R4 G04
R3 R5 G14
R4 R6 G05
R5 R7 G15
B00
B10
B01
B11
B02
B12
B03
B13
B04
B14
B05
B15
2.4.2 Floppy Disk Controller
The SBC82621 provides a 34-pin header type connector,
FDD1, supporting up to two floppy drives. The floppy drives
may be any one of the following types: 5.25" 360KB/1.2MB and
3.5" 720KB/1.44MB/2.88MB. The FDD1 pin assignment is
listed in Appendix B.
2.4.3 Parallel Port Interface
The SBC82621 onboard PRT1 is a multi-mode parallel port
able to support:
Standard mode: IBM PC/XT, PC/AT and PS/2 compatible with
bi-directional parallel port
Enhanced mode: Enhance parallel port (EPP) compatible with
EPP 1.7 and EPP 1.9 (IEEE 1284 compliant)
High speed mode: Microsoft and Hewlett Packard extended
capabilities port (ECP) IEEE 1284 compliant
The address select of the onboard parallel port in LPT1 (3BCH)
or disabled is done by BIOS CMOS setup.
18
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
2.4.4 Serial Port Interface
The serial interface onboard SBC82621 consists of COM1 port
supports RS-232 and COM2 provide RS-232/422/485
connectivity.
2.4.4.1 Serial Ports IRQ Selection
SBC82621 uses two 10-pin connectors for COM2 (COM2) and
COM1 (COM1). Interrupt Requests on COM1 and COM2 are
selected via IRQ4 and IRQ3 respectively. Additionally, both
ports can be enabled or disabled via BIOS setting. The RS-232
pin assignments for COM1 and COM2 along with the RS-485
pin assignments for COM2 are in Appendix B.
2.4.5 Real Time Clock and CMOS RAM
The SBC82621 contains VT82C686B Integrated Real Time
Clock (RTC) and 128 bytes of CMOS RAM. The CMOS RAM
stores the system configuration information entered via the
SETUP program. A battery, with power lasting 10 years, keeps
the stored information on the RTC and CMOS RAM active
when system power is turned off.
2.4.6 Keyboard and Mouse Connectors
The SBC82621 provides a keyboard (CN9) and mouse (CN10)
interface with a 5-pin connector. CN7 is a DIN connector for
PS/2 keyboard and mouse connection.
CN9/CN10
Clock
Data
No Connection
GND
Power
Jumpers and Connectors
1
2
3
4
5
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SBC82621 Socket370 Half-size All-in-One CPU Card User’s Manual
Mouse Clock
VCC
6
4
Keyboard Clock
5
3
GND
Mouse Data
2
1
Keyboard Data
CN7
2.4.7 USB Connector
The Universal Serial Bus (USB) connector on the SBC82621 is
for installation of peripherals supporting the USB interface.
USB1 is the 10-pin USB connector on the SBC82621.
USB1
12
USB Power
USB P0-
USB P0+
USB GND
AGND
910
USB Power
USB P1-
USB P1+
GND USB
AGND
2.4.8 IrDA Connector
IR1 is a 5-pin IrDA connector for wireless communication.
IR1
20
+5V
N.C.
IRRX
GND
IRTX
1
2
3
4
5
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2.4.9 Power Input Connectors
CN8 is the +5V/+12V power input connector of the SBC82621.
The SBC82621 needs +5V and +12V for normal operation.
Pin Description
1
2
3
6 5 4 3 2 1
4
5
6
CN4, on the other hand, is the –5V and –12V power input
connector of SBC82621. The corresponding pin assignment is
listed on the table below.
Pin Description
+5V
GND
+12V
SB5V
GND
+5V
1
2
1
3
4
-12V
GND
GND
-5V
2.4.10 ACPI Connector
Advanced Configuration and Power Interface (ACPI) defines a
flexible and extensible interface that allows system designers
to select appropriate cost/feature trade-offs for power
management. The interface enables and supports reliable
power management through improved hardware and operating
system coordination. The specification enables new power
management technology to evolve independently in operating
systems and hardware while ensuring that they continue to
work together.
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CN11 on the SBC82621 is a 6-pin header connector that
provides ACPI interface.
CN11
1
23456
G
P
G
W
B
N
P
S
N
W
_
B
D
_
5
O
V
N
E
N
X
D
T
S
M
I
2.4.11 PC/104 Connectors
The PC/104 is an industrial standard. It is a compact form
factor with dimensions of 3.6” x 3.8” and is fully compatible
with the ISA Bus. The PC/104 interface is able to adapt the offthe-shelf PC/104 modules, such as sound module, fax modem
module and multi-I/O module…etc.
CN5: PC/104 Bus Pin Assignment
Pin# Pin Name Pin# Pin Name Pin# Pin Name Pin# Pin Name
1
5
9
13
17
21
25
29
33
37
41
45
49
53
57
61
IOCHCHK
SD6
SD4
SD2
SD0
AEN
SA18
SA16
SA14
SA12
SA10
SA8
SA6
SA4
SA2
SA0
2
6
10
14
18
22
26
30
34
38
42
46
50
54
58
62
GND
+5V
-5V
-12V
+12V
SMEMW
IOW
DACK3
DACK1
REFRESH
IRQ7
IRQ5
IRQ3
TC
+5V
GND
3
7
11
15
19
23
27
31
35
39
43
47
51
55
59
63
SD7
SD5
SD3
SD1
IOCHRDY
SA19
SA17
SA15
SA13
SA11
SA9
SA7
SA5
SA3
SA1
GND
4
8
12
16
20
24
28
32
36
40
44
48
52
56
60
64
RESETDRV
IRQ9
DRQ2
ENDXFR
GND
SMEMR
IOR
DRQ3
DRQ1
SYSCLK
IRQ6
IRQ4
DACK2
SALE
OSC
GND
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CN6: PC/104 Bus Pin Assignments
Pin# Pin Name Pin# Pin Name Pin# Pin Name Pin# Pin Name
1
5
9
13
17
21
25
29
33
37
GND
IOCS16
IRQ11
IRQ15
DACK0
DACK5
DACK6
DACK7
+5V
GND
2
6
10
14
18
22
26
30
34
38
GND
LA23
LA21
LA19
LA17
MEMW
SD9
SD11
SD13
SD15
3
7
11
15
19
23
27
31
35
39
MEMCS16
IRQ10
IRQ12
IRQ14
DRQ0
DRQ5
DRQ6
DRQ7
MASTER
GND
4
8
12
16
20
24
28
32
36
40
SBHE
LA22
LA20
LA18
MEMR
SD8
SD10
SD12
SD14
(KEY)
2.4.12 CPU Fan Connector: FAN1 & FAN2
1
2
3
Pin Description
1
2
3
GND
+5V
SPEED SENSOR
2.4.13 Flat Panel Bezel Connector
CN3
2 4 6 8 10 12
1357911
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Power LED
This 2-pin connector, designated at Pins 1 and Pin 5 of
CN3, connects the system power LED indicator to its
respective switch on the case. Pin 1 is +, and pin 5 is
assigned as -. The Power LED lights up when the system
is powered ON.
External Speaker and Internal Buzzer Connector
Pins 2, 4, 6, and 8 of CN3 connect to the case-mounted
speaker unit or internal buzzer. Short pins 4-6 when
connecting the CPU card to an internal buzzer. When
connecting an external speaker, set these jumpers to Open
and install the speaker cable on pin 8 (+) and pin 2 (-).
System Reset Switch
Pins 9 & 11 of CN3 connect to the case-mounted reset
switch and allow rebooting of your computer instead of
turning OFF the power switch. This is a preferred method
of rebooting in order to prolong the life of the system’s
power supply.
HDD Activity LED
This connector extends to the hard drive activity LED on
the control panel. This LED will flash when the HDD is
being accessed. Pins 10 & 12 of CN3 connect the hard
disk drive and the front panel HDD LED. Pins 10 is -, and
pin 12 is assigned as +.
2.4.14 Enhanced IDE Interface Connector
The SBC82621 includes a PCI bus enhanced IDE controller
that can support master/slave mode and post write transaction
mechanisms with 64-byte buffer, and master data transaction.
This feature, connected via connector IDE1, allows the
SBC82621 to handle 2 IDE drives. Refer to Appendix B for the
pinout assignments of IDE1.
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C h a p t e r 3
Hardware Description
This chapter gives a detailed explanation of the hardware
features onboard the SBC82621 all-in-one Socket370 CPU
cards.
3.1 Microprocessors
The SBC82621 supports Intel Celeron, Pentium III,Tualatin
and VIA Cyrix III CPUs. Systems based on these CPUs can be
operated under UNIX, OS/2, Windows XP/NT/2000/98/Me and
MS-DOS environments. The system’s performance depends on
the installed CPU on the board.
3.2 CPU Bus Clock
The SBC82621 support CPU Bus speeds for 66M, 100M and
133MHz.The CPU Bus Clock is auto detected and generated
by a clock generator.
3.3 BIOS
The system BIOS used in SBC82621 is Award Plug and Play
BIOS. The SBC82621 contains a single 4M bit Flash EPROM.
3.4 System Memory
The SBC82621 inductrial CPU board supports one 168-pin
DIMM (Dual In-Line Memory Module) socket for a maximum
memory of 256MB buffer SDRAMs. The memory module can
come in sizes of 16MB, 32MB, 64MB, 128MB, 256MB and
512MB.
NOTE: Use SDRAM modules with PC100 or PC133
specifications when running 100MHz CPU bus speed.
With 66MHz CPU, SDRAM modules with PC66, PC100
or PC133 specifications can be used. You have to
install the Intel Celeron processor before installing the
memory modules
Hardware Description
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3.5 Real Time Clock and CMOS RAM
The SBC82621 contains VT82C686B Integrated Real Time
Clock (RTC) and 128 bytes of CMOS RAM. The CMOS RAM
stores the system configuration information entered via the
SETUP program. A battery, with power lasting 10 years, keeps
the stored information on the RTC and CMOS RAM active
when system power is turned off.
3.6 VGA Interface
The Twister-T integrates S3 Graphics ’128-bit
ProSavage4 graphics accelerator into a single chip. TwisterT
brings mainstream graphics performance to the Value PC with
leading-edge 2D, 3D and DVD video acceleration into a cost
effective package. Based on its capabilities, Twister-T is an
ideal solution for the consumer, corporateration users and
entry-level professionals. The industry’s first integrated AGP
4X solution, TwisterT combines AGP 4X performance with
Microsoft Direct-X texture compression and passive 2Kx2K
textures to deliver unprecedented 3D.
High-Performance 3D Accelerator
128-bit 2D Graphics Engine
DVD Playback and Video conferencing
LCD and Flat Panel Monitor Support
High Screen Resolution CRT Support
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3.7 I/O Port Address Map
The CPU card communicates via I/O ports. It has a total of
1KB port addresses that can be assigned to other devices via
I/O expansion cards.
Address Devices
000-01F
020-03F
040-05F
060-06F
070-07F
080-09F
0A0-0BF
0F0
0C0-0DF
0F1
0F8-0FF
120
121
122
123
1F0-1F8
200-207
300-31F
360-36F
378-37F
3B0-3BF
3C0-3CF
3D0-3DF
3F0-3F7
3F8-3FF
2F8-2FF
DMA controller #1
Interrupt controller #1
Timer
Keyboard controller
Real time clock, NMI
DMA page register
Interrupt controller #2
Clear math coprocessor busy signal
DMA controller #2
Reset math coprocessor
Math processor
Disable watchdog timer operation (read)
Enable watchdog timer operation (read)
Watchdog
Board ID
Fixed disk controller
Game port
Prototype card
Reserved
Parallel port #1
MDA video card (including LPT1)
EGA card
CGA card
Floppy disk controller
Serial port #1 (COM1)
Serial port #2 (COM2)
Hardware Description
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3.8 Interrupt Controller
The SBC82621 is a fully PC compatible control board. It
consists of 16 ISA interrupt request lines and 4 of the 16 can
be either ISA or PCI. The mapping list of the 16 interrupt
request lines is shown below.
NMI Parity check error
IRQ0
System timer output
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
IRQ8
IRQ9
IRQ10
IRQ11
IRQ12
IRQ13
IRQ14
IRQ15
Keyboard
Interrupt rerouting from IRQ8 through IRQ15
Serial port #2
Serial port #1
Reserved
Floppy disk controller
Parallel port #1
Real time clock
Reserved
Reserved
USB
PS/2 Mouse
Math coprocessor
Primary IDE channel
Secondary IDE Channel
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C h a p t e r 4
Award BIOS Utility
Chapter 7 describes the different settings available in the
Award BIOS that comes with the SBC82621 CPU card. Also
contained here are instructions on how to set up the BIOS
configuration.
4.1 BIOS Introduction
The Award BIOS (Basic Input/Output System) installed in your
computer system’s ROM supports Intel processors in a
standard IBM-AT compatible I/O system. The BIOS provides
critical low-level support for standard devices such as disk
drives, serial and parallel ports. It also adds virus and
password protection as well as special support for detailed
fine-tuning of the chipset controlling the entire system.
4.2 BIOS Setup
The Award BIOS provides a Setup utility program for
specifying the system configurations and settings. The BIOS
ROM of the system stores the Setup utility. When you turn ON
the computer, the Award BIOS is immediately activated.
Pressing the <Del> key immediately allows you to enter the
Setup utility. If you are a little bit late pressing the <Del> key,
POST (Power On Self Test) will continue with its test routines,
thus preventing you from invoking the Setup. If you still wish to
enter Setup, restart the system by pressing the ”Reset” button
or simultaneously pressing the <Ctrl>, <Alt> and <Delete>
keys. You can also restart by turning the system OFF and back
ON again. The following message will appear on the screen:
Press <DEL> to Enter Setup
In general, you press the arrow keys to highlight items,
<Enter> to select, the <PgUp> and <PgDn> keys to change
entries, <F1> for help and <Esc> to quit.
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When you enter the Setup utility, the Main Menu screen will
appear on the screen. The Main Menu allows you to select
from various setup functions and exit choices.
CMOS Setup Utility-Copyright © 1984-2001 Award Software
Standard CMOS Features Frequency/Voltage Control
Advanced BIOS Features Load Fail-Safe Defaults
Advanced Chipset Features Load Optimized Defaults
Integrated Peripherals Set Supervisor Password
Power Management Setup Set User Password
PnP/PCI Configurations Save & Exit Setup
PC Health Status Exit Without Saving
Esc : Quit F9 : Menu in BIOS : Select Item
F10 : Save & Exit Setup
F6 : SAVE CMOS TO BIOS F7 : LOAD CMOS FROM BIOS
Time, Date, Hard Disk Type…
The section below the setup items of the Main Menu displays
the control keys for this menu. Another section located at the
bottom of the Main Menu, just below the control keys section,
displays information on the currently highlighted item in the list.
NOTE:
If you find that your computer cannot boot after
making and saving system changes with Setup, the
Award BIOS, via its built-in override feature, resets your
system to the CMOS default settings.
We strongly recommend that you avoid making any changes to
the chipset defaults. These defaults have been carefully
chosen by both Award and your system manufacturer to
provide the absolute maximum performance and reliability.
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4.2.1 Standard CMOS Setup
“Standard CMOS Setup” allows you to record some basic
hardware configurations in your computer system and set the
system clock and error handling. If the motherboard is already
installed in a working system, you will not need to select this
option. You will need to run the Standard CMOS option,
however, if you change your system hardware configurations,
the onboard battery fails, or the configuration stored in the
CMOS memory was lost or damaged.
CMOS Setup Utility-Copyright © 1984-2001 Award Software
Standard CMOS Features
Date (mm:dd:yy) Fri, Feb 22 2002 Item Help
Time (hh:mm:ss) 16 : 48 : 51
Menu Level
IDE Primary Master
IDE Primary Slave
next page for detail
Drive A 1.44M, 3.5 in. hard drive settings
Drive B None
LCD Type T1 1024x768 DSTN
CRT Screen Expansion Enabled
Display Type During POST Default
Display Type After POST Default
Halt On All, But Keyboard
Base Memory 640K
Extended Memory 65472K
Total Memory 1024K
: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1:
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
At the bottom of the menu are the control keys for use on this
menu. If you need any help in each item field, you can press
the <F1> key. It will display the relevant information to help
you. The memory display at the lower right-hand side of the
menu is read-only. It will adjust automatically according to the
memory changed. The following pages describe each item of
this menu.
Press Enter None
Press Enter None Press [Enter] to enter
General Help
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Date
The date format is:
Day
Month
Date
Year
the day of week, from Sun to Sat, determined by
the BIOS, is read only
the month, Jan (1) through Dec (12)
the date, from 1 to 31 (or the maximum allowed in
the month), can key in the numerical / function key
the year, from 1994 to 2079
To set the date, highlight the “Date” field and use the
PageUp/ PageDown or +/- keys to set the current time.
Time
The time format is:
Hour
Minute
Second
From 00 to 23
From 00 to 59
From 00 to 59
To set the time, highlight the “Time” field and use the
<PgUp>/ <PgDn> or +/- keys to set the current time.
Drive A / Drive B
These fields identify the types of floppy disk drive A or
drive B that has been installed in the computer. The
available specifications are:
360K, 5.25 in
1.2M, 5.25 in
720K, 3.5 in
1.44M, 3.5 in
2.88M, 3.5 in
32
5.25 inch PC-type standard drive; 360Kb
capacity
5.25 inch AT-type high-density drive; 1.2MB
capacity
3.5 inch double-sided drive; 720Kb capacity
3.5 inch double-sided drive; 1.44MB capacity
3.5 inch double-sided drive; 2.88MB capacity
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LCD Type
Although the system chipset already supports VGA and
LCD alike, BIOS Features Setup still expands this feature
further with the option to set any of the 15 LCD types. The
available options are:
Type 1/13 1024 x 768 DSTN
Type 2 1280 x 1024 TFT
Type 3 640 x 480 DSTN
Type 4 800 x 600 DSTN
Type 5 640 x 480 (16bit) TFT
Type 6 640 x 480 (24bit) TFT
Type 7 1024 x 768 TFT
Type 8/9/10 800 x 600 TFT
Type 11/12 800 x 600 DSTN
Type 14 1280 x 1024 DSTN
Type 15 1024 x 600 DSTN
CRT Screen Expansion
This option allows you to enlarge application screens to full
screen scale onto your display. However this option is not
inversely compatible, rendering no change when
applications screens have resolutions larger than the
display resolution. The available options are Enabled and
Disabled.
Display Type During/After POST
This item configures the viewing area for the POST
sequence. When configured to the incorrect display setting
or Both, it blankets the POST sequence from being viewed.
If you select Default, this option is useless and follows the
VGA BIOS settings. The available options are CRT Only,
LCD Only, Both, and Default.
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Halt On
This field determines whether the system will halt if an
error is detected during power up.
No errors
All errors
All, But
Keyboard
All, But
Diskette
All, But
Disk/Key
The system boot will halt on any error detected.
Whenever the BIOS detects a non-fatal error, the
system will stop and you will be prompted.
The system boot will not stop for a keyboard
error; it will stop for all other errors.
The system boot will not stop for a disk error; it
will stop for all other errors.
The system boot will not stop for a keyboard or
disk error; it will stop for all other errors.
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4.2.2 Advanced BIOS Features
This section allows you to configure and improve your system
and allows you to set up some system features according to
your preference.
CMOS Setup Utility-Copyright © 1984-2001 Award Software
Advanced BIOS Features
Virus Warning Disabled Item Help
CPU Internal Cache Enabled
External Cache Enabled Menu Level
CPU L2 Cache ECC Checking Enabled Allows you to
Processor Number Feature Enabled choose the VIRUS
Quick Power On Self Test Enabled Warning feature
First Boot Device HDD-0 for IDE Hard disk
Second Boot Device Floppy boot sector
Third Boot Device SCSI protection. If this
Boot Other Device Enabled function is enable
Swap Floppy Drive Disabled and someone
Boot Up Floppy Seek Disabled attempts to write
Boot Up NumLock Status On data into this area,
Gate A20 Option Normal BIOS will show
Typematic Rate Setting Disabled a warning
Typematic Rate (Chars/Sec) 6 message on
Typematic Delay (Msec) 250 screen and alarm
Security Option Setup beep
PS/2 Mouse Function Control Enabled
OS Select for DRAM >64MB Non-OS2
Video BIOS Shadow Enabled
C8000-CBFFF Disabled
CC000-CFFFF Disabled
D0000-D3FFF Disabled
D4000-D7FFF Disabled
D8000-D8FFF Disabled
DC000-DFFFF Disabled
Small Logo(EPA) Show Disabled
: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
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Virus Warning
This item protects the boot sector and partition table of
your hard disk against accidental modifications. If an
attempt is made, the BIOS will halt the system and display
a warning message. If this occurs, you can either allow the
operation to continue or run an anti-virus program to locate
and remove the problem.
NOTE:
Many disk diagnostic programs, which attempt to
access the boot sector table, can cause the virus
warning. If you will run such a program, disable the
Virus Warning feature.
CPU Internal Cache / External Cache
Cache memory is additional memory that is much faster
than conventional DRAM (system memory). CPUs from
486-type on up contain internal cache memory, and most,
but not all, modern PCs have additional (external) cache
memory. When the CPU requests data, the system
transfers the requested data from the main DRAM into
cache memory, for even faster access by the CPU. These
items allow you to enable (speed up memory access) or
disable the cache function. By default, these are Enabled.
CPU L2 Cache ECC Checking
When enabled, this allows ECC checking of the CPU’s L2
cache. By default, this field is Enabled.
Processor Number Feature
When a Pentium III CPU is installed, the system
automatically detects it and displays this item.
Quick Power On Self Test
When enabled, this field speeds up the Power On Self Test
(POST) after the system is turned ON. If it is set to Enabled,
BIOS will skip some items.
First/Second/Third Boot Device
These items allow the selection of the 1st, 2nd, and 3rd
devices that the system will search for during its boot-up
sequence. The wide range of selection includes Floppy,
LS120, ZIP100, HDD0~3, SCSI, and CDROM.
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Boot Other Device
This item allows the user to enable/disable the boot device
not listed on the First/Second/Third boot devices option
above. The default setting is Enabled.
Swap Floppy Drive
This allows you to determine whether to enable Swap
Floppy Drive or not. When enabled, the BIOS swaps floppy
drive assignments so that Drive A becomes Drive B, and
Drive B becomes Drive A. By default, this field is set to
Disabled.
Boot Up Floppy Seek
When enabled, the BIOS seeks for number of track (40 or
80) of the installed floppy drive. 360K type has 40 tracks
while 760K, 1.2M and 1.44M have 80 tracks. By default,
this field is set to Enabled.
Boot Up NumLock Status
This activates the NumLock function after powering up the
system. By default, the system boots up with NumLock ON.
Gate A20 Option
This selects how Gate A20 is worked. Gate A20 is a device
used to address memory above 1 MB. The default setting is
Fast.
Typematic Rate Setting
When disabled, continually holding down any key on your
keyboard will generate only one instance. When enabled,
you can set the two typematic controls listed next. By
default, this field is set to Disabled.
Typematic Rate (Chars/Sec)
When the typematic rate is enabled, the system registers
repeated keystrokes speeds. You can select speed range
from 6 to 30 characters per second. By default, this item is
set to 6.
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Typematic Delay (Msec)
When typematic rate is enabled, this item allows you to set
the time interval between the display of the first and
second characters. By default, this item is set to 250msec.
Security Option
This allows you to limit access to the System and Setup.
The default value is Setup. When set to System, the
system prompts for the User Password every boot up.
Selecting Setup always boots up and prompts for
Supervisor Password only when Setup utility is called up.
OS Select for DRAM > 64MB
This allows system to access more than 64MB of DRAM
memory when used with OS/2 depends on certain BIOS
calls to access memory. The default setting is Non-OS/2.
Video BIOS Shadow
This item allows you to change the Video BIOS location
from ROM to RAM. Video Shadow will increase the video
speed.
C8000 - CBFFF Shadow/DC000 - DFFFF Shadow
Shadowing ROM reduces available memory between
640KB and 1024KB. These fields determine whether
optional ROM is copied to RAM or not.
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4.2.3 Advanced Chipset Features
This Setup menu controls the configuration of the motherboard
chipset.
CMOS Setup Utility-Copyright © 1984-2001 Award Software
Advanced Chipset Features
DRAM Timing By SPD Enabled Item Help
DRAM Clock Host CLK
SDRAM Cycle Length 3 Menu Level
Bank Interleave Disabled Enabled adds a
Memory Hole Disabled Parity check to the
P2C/C2P Concurrency Enabled boot-up memory
System BIOS Cacheable Disabled tests. Select
Video RAM Cacheable Disabled Enabled only if the
AGP Aperture Size 64MB system DRAM
AGP Driving Control Auto Contains parity
AGP Driving Value DA
AGP Fast Write Disabled
OnChip USB Enabled
USB Keyboard Support Disabled
CPU to PCI Write Buffer Enabled
PCI Dynamic Bursting Enabled
PCI Master 0 WS Write Enabled
PCI Delay Transaction Enabled
PCI#2 Access #1 Retry Enabled
AGP Master 1 WS Write Disabled
AGP Master 1 WS Read Disabled
Memory Parity/ECC Check Disabled
: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
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DRAM Timing By SPD
This item allows you to select the value in this field,
depending on whether the board has paged DRAMs or
EDO (extended data output) DRAMs.
DRAM Clock
This item allows you to select the DRAM clock value,
depending on whether the board has paged DRAMs or
EDO (extended data output) DRAMs. The available choices
are 66 MHz and Host CLK.
SDRAM Cycle Length
When synchronous DRAM is installed, the number of clock
cycles of CAS latency depends on the DRAM timing. Do
not reset this field from the default value specified by the
system designer. The default setting is 3.
Memory Hole
To improve performance, certain space in memory is
reserved for ISA cards. This memory must be mapped into
the memory space below 16MB. The available choices are
15M-16M and Disabled.
P2C/C2P Concurrency
This item allows you to enable/disable the PCI to CPU,
CPU to PCI concurrency. By default, this field is set to
Enabled.
System BIOS Cacheable
When enabled, access to the system BIOS ROM addressed
at F0000H-FFFFFH is cached, provided that the cache
controller is disabled.
Video RAM Cacheable
Selecting Enabled allows caching of the video BIOS ROM
at C0000h to C7FFFh, resulting in better video
performance. However, if any program writes to this
memory area, a memory access error may result.
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AGP Aperture Size
The field sets aperture size of the graphics. The aperture is
a portion of the PCI memory address range dedicated for
graphics memory address space. Host cycles that hit the
aperture range are forwarded to the AGP without any
translation. The options available are 4M, 8M, 16M, 32M,
64M, 128M and 256M.
OnChip USB
This should be enabled if your system has a USB installed
on the system board and you wish to use it. Even when so
equipped, if you add a higher performance controller, you
will need to disable this feature. The available choices are
Enabled and Disabled.
USB Keyboard Support
Select Enabled if your system contains a Universal Serial
Bus (USB) controller and you have a USB keyboard. The
options available are Enabled, Disabled.
CPU to PCI Write Buffer
When this field is Enabled, writes from the CPU to the PCI
bus are buffered, to compensate for the speed differences
between the CPU and the PCI bus. When Disabled, the
writes are not buffered and the CPU must wait until the
write is complete before starting another write cycle.
PCI Dynamic Bursting
This item allows you to enable/ disable the PCI dynamic
bursting function.
PCI Master 0 WS Write
When Enabled, writes to the PCI bus are executed with
zero wait states.
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to
support delay transactions cycles. Select Enabled to
support compliance with PCI specification version 2.1. The
default setting is Disabled.
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PCI#2 Access #1 Retry
When disabled, PCI#2 will not be disconnected until access
finishes (default). When enabled, PCI#2 will be
disconnected if max retries are attempted without success.
AGP Master 1 WS Write
When Enabled, writes to the AGP(Accelerated Graphics
Port) are executed with one wait states..
AGP Master 1 WS Read
When Enabled, read to the AGP (Accelerated Graphics
Port) are executed with one wait states..
Memory Parity/ECC Check
This item enabled to detect the memory parity and Error
Checking & Correcting.
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4.2.4 Integrated Peripherals
This option sets your hard disk configuration, mode and port.
CMOS Setup Utility-Copyright © 1984-2001 Award Software
Integrated Peripherals
OnChip IDE Channel0 Enabled Item Help
Release IRQ15 For OS Disabled
IDE Prefetch Mode Enabled Menu Level
Primary Master PIO Auto
Primary Slave PIO Auto
Primary Master UDMA Auto
Primary Slave UDMA Auto
Init Display First PCI Slot
IDE HDD Block Mode Enabled
Onboard Lan Boot ROM Disabled
Onboard FDC Controller Enabled
Onboard Serial Port 1 3F8/IRQ4
Onboard Seiral Port 2 2F8/IRQ3
UART 2 Mode Standard
IR Function Duplex Half
TX,RX inverting enable No, Yes
Onboard Parallel Port 378/IRQ7
Onboard Parallel Mode Normal
ECP Mode Use DMA 3
Parallel Port EPP Type EPP1.9
: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
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OnChip IDE Channel0
The integrated peripheral controller contains an IDE
interface with support for two IDE channels. Select Enabled
to activate each channel separately.
IDE Prefetch Mode
The onboard IDE drive interface supports IDE prefetching
for faster drive accesses. If you install a primary and/or
secondary add-in IDE interface, set this field to Disabled if
the interface does not support prefetching.
Primary Master/Slave PIO
The four IDE PIO (Programmed Input/Output) fields let you
set a PIO mode (0-4) for each of the two IDE devices that
the onboard IDE interface supports. Modes 0 through 4
provide successively increased performance. In Auto mode,
the system automatically determines the best mode for
each device. The options available are Auto, Mode 0, Mode
1, Mode 2, Mode 3, and Mode 4.
Primary Master/Slave UDMA
Ultra DMA 66/100 implementation is possible only if your
IDE hard drive supports it and the operating environment
includes a DMA driver (Windows 95 OSR2 or a third-party
IDE bus master driver). If your hard drive and your system
software support Ultra DMA 33/66/100, select Auto to
enable BIOS support. The options available are Auto, Mode
0, Mode 1, and Mode 2.
Init Display First
This item allows you to decide to active whether PCI Slot or
AGP first. The options available are PCI Slot, AGP.
IDE HDD Block Mode
This field allows your hard disk controller to use the fast
block mode to transfer data to and from your hard disk
drive.
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Onboard FDD Controller
Select Enabled if your system has a floppy disk controller
(FDC) installed on the system board and you wish to use it.
If you install and-in FDC or the system has no floppy drive,
select Disabled in this field. The options available are
Enabled, Disabled.
Onboard Serial Port 1/Port 2
Select an address and corresponding interrupt for the first
and second serial ports. The options available are
3F8/IRQ4, 2E8/IRQ3, 3E8/IRQ4, 2F8/IRQ3, Disabled, Auto.
UART 2 Mode
The second serial port offers these infrared interface
modes:
IrDA
ASKIR IrDA-compliant serial infrared port
Normal (default value)
NOTE: The UART Mode Select will not appear on the
menu once you disable the setting of
Onboard Serial Port 2.
When UART Mode Select is set as ASKIR or IrDA, the
options RxD, TxD Active and IR Transmittion delay will
appear.
IR Function Duplex
This item allows you to select the IR half/full duplex funcion.
TX,RX inverting enable
This item allows you to enable the TX, RX inverting which
depends on different H/W requirement. This field is not
recommended to change its default setting for avoiding any
error in your system.
Onboard Parallel Port
This item allows you to determine access onboard parallel
port controller with which I/O address. The options
available are 378H/IRQ7, 278H/IRQ5, 3BC/IRQ7, Disabled.
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Onboard Parallel Port Mode
Select an operating mode for the onboard parallel (printer)
port. Select Normal unless your hardware and software
require one of the other modes offered in this field. The
options available are EPP1.9, ECP, SPP, ECPEPP1.7,
EPP1.7.
ECP Mode Use DMA
Select a DMA channel for the parallel port for use during
ECP mode.
Parallel Port EPP Type
Select EPP port type 1.7 or 1.9.
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4.2.5 Power Management Setup
The Power Management Setup allows you to save energy of
your system effectively. It will shut down the hard disk and turn
OFF video display after a period of inactivity.
CMOS Setup Utility-Copyright © 1984-2001 Award Software
Power Management Setup
ACPI Function Enabled Item Help
Power Management Press Enter
PM Control by APM Yes Menu Level
Video off Option Suspend -> off
Video off Method V/H SYNC+Blank
MODEM Use IRQ 3
Soft-off by PWRBTN Instant-off
State After Power Failure Auto
Wake Up Events Press Enter
: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
ACPI Function
This item allows you to enable/disable the Advanced
Configuration and Power Management (ACPI). The options
available are Enabled, Disabled.
Power Management
This category allows you to select the type (or degree) of
power saving and is directly related to the following modes:
HDD Power Down
Doze Mode
Suspend Mode
There are four selections for Power Management, three of
which have fixed mode settings.
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Disable
(default)
Min. Power
Saving
No power management. Disables all four
modes
Minimum power management. Doze Mode =
1 hr. Standby Mode = 1 hr., Suspend Mode =
1 hr., and HDD Power Down = 15 min.
Maximum power management -- ONLY
Max. Power
Saving
AVAILABLE FOR SL CPU’S. Doze
Mode = 1 min., Standby Mode = 1 min.,
Suspend Mode = 1 min., and HDD Power
Down = 1 min.
Allows you to set each mode individually.
When not disabled, each of the ranges is
User Define
from 1 min. to 1 hr. except for HDD Power
Down which ranges from 1 min. to 15 min.
and disable.
NOTE: In order to enable the CPU overheat
protection feature, the Power Management
field should not be set to Disabled.
PM Control by APM
When enabled, an Advanced Power Management device
will be activated to enhance the Max. Power Saving mode
and stop the CPU internal clock. If Advance Power
Management (APM) is installed on your system, selecting
Yes gives better power savings. If the Max. Power Saving
is not enabled, this will be preset to No.
Video Off Option
When enabled, this feature allows the VGA adapter to
operate in a power saving mode.
Always On
Suspend -->
Off
Susp,Stby -->
Off
All Modes -->
Off
48
Monitor will remain on during power saving
modes.
Monitor blanked when the system enters the
Suspend mode.
Monitor blanked when the system enters
either Suspend or Standby modes.
Monitor blanked when the system enters any
power saving mode.
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Video Off Method
This determines the manner in which the monitor is
blanked.
V/H SYNC
+ Blank
This causes the system to turn off the vertical
and horizontal synchronization ports and write
blanks to the video buffer.
Select this option if your monitor supports the
DPMS
Display Power Management Signaling (DPMS)
standard of the Video Electronics Standards to
select video power management values.
Blank
Screen
This option only writes blanks to the video buffer.
Modem Use IRQ
This field names the interrupt request (IRQ) line assigned
to the modem (if any) on your system. Activity on the
selected IRQ always awakens the system. The available
choices are 3, 4, 5, 7, 9, 10, 11, and NA. By default, the
IRQ is set to 3.
Soft-off by PWRBTN
This only works with systems using an ATX power supply.
It also allows user to define the type of soft power OFF
sequence the system will follow.
This option follows the conventional manner
Instant-Off
(default)
systems perform when power is turned OFF.
Instant-Off is a soft power OFF sequence requiring
only the switching of the power supply button to
OFF.
Upon turning OFF system from the power switch,
this option will delay the complete system power
Delay 4 Sec.
OFF sequence by approximately 4 seconds. Within
this delay period, system will temporarily enter into
Suspend Mode enabling you to restart the system
at once.
Wake Up Events
An input signal on the network 2 awakens the system from
a soft-off state.
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4.2.6 PNP/PCI Configuration
This option configures the PCI bus system. All PCI bus
systems on the system use INT#, thus all installed PCI cards
must be set to this value.
CMOS Setup Utility-Copyright © 1984-2001 Award Software
PnP/PCI Configurations
PNP OS Installed No Item Help
Reset Configuration Data Disabled
Menu Level
Resources Controlled By Auto (ESCD)
X IRQ Resources Press Enter Select Yes if you are
X DMA Resources Press Enter using a Plug and play
capable operating
PCI/VGA Palette Snoop Disabled system select No if
Assign IRQ For VGA Enabled you need the BIOS to
Assign IRQ For USB Enabled configure non-boot
devices
: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
PNP OS Installed
This item allows you to determine install PnP OS or not.
The options available are Yes and No.
Reset Configuration Data
Normally, you leave this field Disabled. Select Enabled to
reset Extended System Configuration Data (ESCD) when
you exit Setup or if you have installed a new add-on and
the system reconfiguration has caused such a serious
conflict that the operating system can not boot. The options
available are Enabled and Disabled.
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Resource controlled by
The Award Plug and Play BIOS has the capacity to
automatically configure all of the boot and Plug and Play
compatible devices. However, this capability means
absolutely nothing unless you are using a Plug and Play
operating system such as Windows95. The options
available are Auto and Manual.
IRQ Resources
When resources are controlled manually, assign each
system interrupt as one of the following types, depending
on the type of device using the interrupt:
1. Legacy ISA Devices compliant with the original PC
AT bus specification, requiring a specific interrupt
(such as IRQ4 for serial port 1).
2. PCI/ISA PnP Devices compliant with the Plug and
Play standard, whether designed for PCI or ISA bus
architecture.
The default value is “PCI/ISA PnP” .
DMA Resources
When resources are controlled manually, assign each
system DMA channel as one of the following types,
depending on the type of device using the interrupt:
1. Legacy ISA Devices compliant with the original PC
AT bus specification, requiring a specific DMA
channel.
2. PCI/ISA PnP Devices compliant with the Plug and
Play standard, whether designed for PCI or ISA bus
architecture.
The default value is “PCI/ISA PnP” .
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PCI/VGA Palette Snoop
Some non-standard VGA display cards may not show
colors properly. This field allows you to set whether MPEG
ISA/VESA VGA Cards can work with PCI/VGA or not. When
enabled, a PCI/VGA can work with a MPEG ISA/VESA VGA
card. When disabled, a PCI/VGA cannot work with a MPEG
ISA/VESA Card.
Assign IRQ For USB/VGA
Enable/Disable to assign IRQ for USB/VGA. The options
available are Enabled, Disabled
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4.2.7 PC Health Status
This section is to monitor the current hardware status of core
voltages. This is available only if there is hardware monitoring
mechanism onboard.
CMOS Setup Utility-Copyright © 1984-2001 Award Software
PC Health Status
Current CPU Temp. Item Help
Current System Temp.
Current CPUFAN1 Speed Menu Level
Vcore
2.5V
3.3V
5V
12V
: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
Current CPU Temp.
Show you the current CPU temperature.
Current System Temperature
These read-only fields reflect the functions of the hardware
thermal sensor that monitors the chip blocks and system
temperatures to ensure the system is stable.
Current CPUFAN1 Speed
These optional and read-only fields show the current
speeds in RPM (revolution per minute) for the CPU fan and
chassis fan as monitored by the hardware monitoring IC.
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4.2.8 Frequency/Voltage Control
CMOS Setup Utility-Copyright © 1984-2001 Award Software
Frequency/Voltage Control
Auto Detect DIMM/PCI Clk Enabled Item Help
Spread Spectrum [Disabled]
CPU Host/PCI Clock Default Menu Level
: Move Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
Auto Detect DIMM/PCI Clk
This item automatically detects the clock speeds of the
system memory installed as well as the PCI interface. The
options available are Enabled and Disabled. The default
setting is Enabled.
Speed Spectrum
This item directly relates to the EMI performance of the
whole system. When enabled, all system clocks run at
slower speeds thereby decreasing the electromagnetic
interference to the surrounding environment. Disabling this
item improves the system performance but simultaneously
increase the EMI. The default setting is Disabled.
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4.2.9 Load Fail Safe Defaults
This option allows you to load the troubleshooting default
values permanently stored in the BIOS ROM. These default
settings are non-optimal and disable all high-performance
features.
CMOS Setup Utility-Copyright © Award Software
Standard CMOS Features Frequency/Voltage Control
Advanced BIOS Features Load Fail-Safe Defaults
Advanced Chipset Features Load Optimized Defaults
Integrated Peripherals Set Supervisor Password
Power Ma
PnP/PCI C
PC Health Status Exit Without Saving
Esc : Quit : Select Item
F10 : Save & Exit Setup
Load Fail-Safe Defaults (Y/N)? N
Load Fail-Safe Defaults
To load BIOS defaults value to CMOS SRAM, enter “Y”. If not,
enter “N”.
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4.2.10 Load Optimized Defaults
This option allows you to load the default values to your
system configuration. These default settings are optimal and
enable all high performance features.
CMOS Setup Utility-Copyright © Award Software
Standard CMOS Features Frequency/Voltage Control
Advanced BIOS Features Load Fail-Safe Defaults
Advanced Chipset Features Load Optimized Defaults
Integrated Peripherals Set Supervisor Password
Power Man
PnP/PCI Co
PC Health Status Exit Without Saving
Esc : Quit : Select Item
F10 : Save & Exit Setup
To load SETUP defaults value to CMOS SRAM, enter “Y”. If
not, enter “N”.
Load Optimized Defaults (Y/N)? N
Load Optimized Defaults
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4.2.11 Save & Exit Setup
This allows you to determine whether or not to accept the
modifications. Typing “Y” quits the setup utility and saves all
changes into the CMOS memory. Typing “N” brigs you back to
Setup utility.
CMOS Setup Utility-Copyright © Award Software
Standard CMOS Features Frequency/Voltage Control
Advanced BIOS Features Load Fail-Safe Defaults
Advanced Chipset Features Load Optimized Defaults
Integrated Peripherals Set Supervisor Password
Power Man
PnP/PCI Con
PC Health Status Exit Without Saving
Esc : Quit : Select Item
F10 : Save & Exit Setup
SAVE to CMOS and EXIT (Y/N)? Y
Save Data to CMOS
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4.2.12 Exit Without Saving
Select this option to exit the Setup utility without saving the
changes you have made in this session. Typing “Y” will quit
the Setup utility without saving the modifications. Typing “N”
will return you to Setup utility.
CMOS Setup Utility-Copyright © Award Software
Standard CMOS Features Frequency/Voltage Control
Advanced BIOS Features Load Fail-Safe Defaults
Advanced Chipset Features Load Optimized Defaults
Integrated Peripherals Set Supervisor Password
Power Man
PnP/PCI Con
PC Health Status Exit Without Saving
Esc : Quit : Select Item
F10 : Save & Exit Setup
Quit Without Saving (Y/N)? N
Abandon all Data
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A p p e n d i x A
Watchdog Timer
Using the Watchdog Function
The SBC82621 CPU card uses version 2.0 of the watchdog
timer. This onboard WDT generates either a system reset or
non-maskable interrupt (NMI), depending on the settings made
on jumper JP3 of SBC82621. Follow the steps below to enable
and program the watchdog function of SBC82621.
Start
↓
Un-Lock WDT : OUT 120H 0AH ; enter WDT function
OUT 120H 0BH ; enable WDT function
↓
Set multiple (1~4) : OUT 120 0NH ; N=1,2,3 or 4
↓
Set base timer (0~F) : OUT 121 0MH ; M=0,1,2,…F
↓
WDT counting
↓
re-set timer : OUT 121 0MH ; M=0,1,2,…F
↓
IF No re-set timer : WDT time-out, generate RESET or NMI
↓
IF to disable WDT : OUT 120 00H ; Can be disable at any time
Watchdog Timer
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M
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
N
1 2 3 4
0.5 sec. 5 secs. 50 secs. 100 secs.
1 sec. 10 secs. 100 secs. 200 secs.
1.5 secs. 15 secs. 150 secs. 300 secs.
2 secs. 20 secs. 200 secs. 400 secs.
2.5 secs. 25 secs. 250 secs. 500 secs.
3 secs. 30 secs. 300 secs. 600 secs.
3.5 secs. 35 secs. 350 secs. 700 secs.
4 secs. 40 secs. 400 secs. 800 secs.
4.5 secs. 45 secs. 450 secs. 900 secs.
5 secs. 50 secs. 500 secs. 1000 secs.
5.5 secs. 55 secs. 550 secs. 1100 secs.
6 secs. 60 secs. 600 secs. 1200 secs.
6.5 secs. 65 secs. 650 secs. 1300 secs.
7 secs. 70 secs. 700 secs. 1400 secs.
7.5 secs. 75 secs. 750 secs. 1500 secs.
F
8 secs. 80 secs. 800 secs. 1600 secs.
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Watchdog Timer
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