Avnet AVT3620C Users Manual
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Data Sheet and User Manual
AES-MS-MT3620-M-G Module
Data Sheet and User Manual
Features
Microsoft Azure Sphere SoC based module
solution for advanced end-to-end IOT security
Based on MediaTek MT3620AN Wi-Fi SoC
- 1x 500MHz Arm Cortex A7 application
processor with 4MB SRAM
- 2x 200MHz Arm Cortex M4F cores,
each with 64KB SRAM
- 4MB embedded RAM (shared)
- 16MB QSPI flash memory
- Dual-band 2.4/5GHz 802.11 a/b/g/n Wi-Fi
Module I/O peripheral support
- 3x ISU interfaces, pre-configured for
UART, SPI, I2C
- ADC/GPIO: 3x 12-bit ADC inputs (or GPIOs)
- PWM/GPIO: 9x PWM outputs
(or up to 24 GPIOs)
- RTC (requires VBAT supply)
- Programming & recovery interface
Microsoft Visual Studio IDE for accelerated
application software development & debug
OTA authentication & updates (device lifetime)
Dimensions: 33mm x 22mm x 3.5mm
Onboard dual-band 2.4/5GHz chip antenna
- (Pulse W3006)
Operating temperature:
- -35C to +85°C
(Note: For industrial temperature range,
please use the U.FL version module)
Certifications:
- FCC, IC, CE, MIC, RoHS (pending)
Note: Microsoft Azure Sphere OS support for
some MT3620 features is still being added
Applications
IoT edge devices
Smart home appliances / security
Smart retail
Remote access
Building automation
Factory automation
For more info on Azure Sphere MT3620 modules,
visit: http://avnet.me/mt3620-modules
To purchase an Azure Sphere MT3620 Starter Kit
visit: http://avnet.me/mt3620-kit
AES-MS-MT3620-M-G
Azure Sphere
MT3620 module
(with chip antenna)
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AES-MS-MT3620-M-G Module
Data Sheet and User Manual
Version
Date
Comment
1.0
05/07/2019
Initial release, new document scope, photos, pinout detail and content
1.1
05/07/2019
Added FCC Module Statement (USA)
1.2
05/16/2019
Updated OEM instructions
Part Number
Description
AES-MS-MT3620-M-G
Azure Sphere MT3620 Module (chip antenna)
Product Page: http://avnet.me/mt3620-modules
AES-MS-MT3620-SK-G
Azure Sphere MT3620 Starter Kit
Product Page: http://avnet.me/mt3620-kit
Document Control
Document Version: 1.0
Document Date: 05/07/2019
Document Author: Peter Fenn
Document Classification: Public
Document Distribution: Public
Version History
Ordering Information
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Table of Contents
Features ...................................................................................................................... 1
Applications ................................................................................................................. 1
Document Control ....................................................................................................... 2
Ordering Information ................................................................................................... 2
Overview ..................................................................................................................... 6
Module Block Diagram ................................................................................................ 7
Module Application Development and Programming .................................................. 8
Development Computer Software Installation ...................................................................................... 8
Module Interfaces with the Development Computer ............................................................................ 8
Module Integration onto an OEM Board ...................................................................... 9
Module Power Interfaces ..................................................................................................................... 9
Wi-Fi Network Settings ......................................................................................................................... 9
Wi-Fi Subsystem ................................................................................................................................ 10
Wi-Fi Antenna ..................................................................................................................................... 10
A7 Application Processor ................................................................................................................... 10
M4F IO Processors ............................................................................................................................ 10
Flash Memory ..................................................................................................................................... 10
Pluton Security Subsystem ................................................................................................................ 10
Real Time Clock (RTC) ...................................................................................................................... 10
Peripheral Serial Interfaces ................................................................................................................ 10
Other I/O Interfaces ............................................................................................................................ 10
MT3620 Bootstrap Pins ...................................................................................................................... 11
Module Placement and Ground plane requirements ......................................................................... 12
Module Pinout Locations .................................................................................................................... 13
Module Pinout Table .......................................................................................................................... 14
Electrical Specifications ............................................................................................ 16
Absolute Maximum Ratings ............................................................................................................... 16
Recommended Operating Conditions ................................................................................................ 16
DC Characteristics ............................................................................................................................. 16
Current Consumption ......................................................................................................................... 17
RF Characteristics .................................................................................................... 18
Wi-Fi 2.4GHz Band RF Receiver Specifications ................................................................................ 18
Wi-Fi 2.4GHz Band RF Transmitter Specifications ............................................................................ 20
Wi-Fi 5GHz Band RF Receiver Specifications ................................................................................... 21
Wi-Fi 5GHz Band RF Transmitter Specifications ............................................................................... 22
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Wi-Fi RF Receiver Blocking Specifications ........................................................................................ 23
Mechanical Specifications ......................................................................................... 24
Module Dimension Details ................................................................................................................. 24
Tape and Reel Packaging .................................................................................................................. 25
Soldering and Cleaning Recommendations .............................................................. 26
Optimum Soldering Reflow Profile ..................................................................................................... 26
Cleaning ............................................................................................................................................. 26
Certifications and Compliance .................................................................................. 27
RoHS Compliance .............................................................................................................................. 27
Regulatory Compliance ...................................................................................................................... 27
FCC and ISED Regulatory Notices (USA and Canada) .................................................................... 27
Modification statement ................................................................................................................... 27
Interference statement ................................................................................................................... 27
RF Radiation Exposure Statement ................................................................................................. 27
FCC Class B Digital Device Notice (USA) ..................................................................................... 28
FCC Module Statement (USA) ....................................................................................................... 28
CAN ICES-003 (B) ......................................................................................................................... 28
Labeling Requirements for the OEM Host Board ........................................................................... 28
29
FCC Requirements for User Manual of the OEM Host Board: ...................................................... 29
IC Requirements for User Manual of the OEM Host Board: .......................................................... 30
FCC Host 15B and 15C Compliance Statement (USA) ................................................................. 30
CE Statement (Europe) ...................................................................................................................... 30
CE Labeling Requirements (Europe) ............................................................................................. 30
OEM Instructions ................................................................................................................................ 31
Shipping, Handling and Storage ............................................................................... 31
Shipping ............................................................................................................................................. 31
Handling ............................................................................................................................................. 31
Moisture Sensitivity (MSL) ................................................................................................................. 31
Storage ............................................................................................................................................... 32
Contact Information ................................................................................................... 32
Legal Information ................................................................ ................................ ...... 33
Limitations .......................................................................................................................................... 33
Avnet Module License and Product Warranty .................................................................................... 33
Appendix-A: Programming Adaptor Footprint ........................................................... 35
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Table of Figures
Figure 1 – Simplified MT3620 SoC Block Diagram ........................................................................................... 6
Figure 2 – AES-MS-MT3620-M-G Module Block Diagram ............................................................................... 7
Figure 3 – Module with dual-band Chip Antenna ............................................................................................ 10
Figure 4 – OEM board Footprint for AES-MS-MT3620-M-G Module .............................................................. 12
Figure 5 – AES-MS-MT3620-M-G Module Pinout .......................................................................................... 13
Figure 6 – AES-MS-MT3620-M-G Module Mechanical Details ...................................................................... 24
Figure 7 – Tape and Reel Details ................................................................................................................... 25
Figure 8 – Recommended Soldering Profile for Lead-Free Solder ................................................................. 26
Figure 9 – Module Pinout to Recommended Service & Debug Interface Connector ..................................... 36
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Overview
The AES-MS-MT3620-M-G is a small form-factor, tri-core Wi-Fi SoC module, intended for use as a secure
Wi-Fi client, in internet-connected IoT applications. Avnet’s production-ready, certified module comes fitted
with a single dual-band chip antenna, for cost-optimized application in 2.4 GHz or 5GHz Wi-Fi networks
Based on the MediaTek MT3620AN SoC, this is a new class of connected SoC IoT device that facilitates
“end-to-end security”. User applications can target it’s 500 MHz ARM Cortex-A7 core as well as two general
purpose 200 MHz ARM Cortex-M4F I/O subsystem cores designed to support real-time requirements. The
on-chip peripherals (GPIO, UART, I2C, SPI, I2S, PWM and ADC) can be mapped to any of these three
user-accessible processor cores.
Figure 1 – Simplified MT3620 SoC Block Diagram
Further differentiators of the MT3620 device are its built-in Pluton security subsystem (with dedicated CM4F
core) for secure boot and secure system operation, its dual-band 802.11 a/b/g/n Wi-Fi connectivity, as well
as integration of on-chip PMU, RTC plus FLASH and SRAM memory. Wi-Fi based OTA firmware and user
application updates (using certificate-based authentication) are hosted by Microsoft for the device lifetime
The Cortex-A7 application processor runs Microsoft’s Azure Sphere Secure OS. Custom user applications
are developed in C using Microsoft’s Visual Studio IDE, which includes user-friendly debugging features
such as single-step execution, breakpoints and watch-points (supported via a dedicated service UART)
The module allows easy design migration and end-product enhancements. By integrating all necessary
support and RF front end circuitry onto a small 33 mm x 22 mm module, Avnet has reduced the design time
for implementing Sphere-based solutions. Developers can leverage the module’s wireless regulatory
certifications (pending) for their end product, saving considerable certification costs and testing time.
The Avnet Azure Sphere MT3620 chip module has a 33mm x 22mm form-factor, with 66 pad castellated
“stamp-hole” footprints. It has an on board chip antenna (Pulse W3006) with a 26MHz crystal oscillator.
Microsoft Visual Studio IDE is used for software development of applications that target this Azure Sphere
MT3620 Module. Instructions for installing this Integrated Development Environment, as well as it’s Azure
Sphere SDK companion application and necessary drivers, are detailed (with examples) in the User Guide
for Avnet’s Azure MT3620 Sphere Starter Kit
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Online authentication and firmware updates are supported for the MT3620 device lifetime.
Module Block Diagram
Figure 2 – AES-MS-MT3620-M-G Module Block Diagram
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Module Application Development and Programming
Development Computer Software Installation
In depth instructions are provided at the Microsoft Getting started with Azure Sphere webpage:
https://aka.ms/AzureSphereSDK
Microsoft’s Getting Started with Azure Sphere page details the download & install of two software items:
1) Azure Sphere SDK Preview for Visual Studio from the Visual Studio Marketplace
2) Visual Studio 2017 version 15.7 or later (free Community edition is sufficient)
as well as USB driver installation for a wired interface between a development computer and the module
Microsoft’s Azure Sphere SDK provides the following:
The azsphere command-line utility for managing devices, images, and deployments
Libraries for application development
Visual Studio extensions to support Azure Sphere development, debug and flash programming
Microsoft’s Visual Studio IDE provides a sophisticated development environment for editing, building and
debugging custom embedded C applications (a GCC cross-compiler and GDB debugger provide the
underlying build and debug tools)
For application development targeting this module, it is recommended that hardware and software
prototyping be done using the Avnet Azure Sphere MT3620 Starter Kit http://avnet.me/mt3620-kit )
Module Interfaces with the Development Computer
The module is designed to support up to four wired interfaces with the development computer.
Three 4-wire UART interfaces (SERVICE, RECOVERY and DEBUG) dedicated for connection with
the host development computer are pinned-out, each with hardware flow-control.
A 3-wire SWD interface is also pinned-out
RESET and RECOVERY (via DEBUG_RTS during boot) signals determine the module operating
mode
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Interface Pins
Description
Notes
3V3
Main input voltage to the module.
3.3V (+/- 10%)
Powered by an external PMU
or DC/DC convertor
3V3_RTC
Real Time Clock power input to module
Powered by external battery,
or connect this to the 3V3 rail
VREF_ADC
Reference voltage for on-chip A/D
convertor
Powered by external reference
voltage, or connect to the
MT3620 2.5V LDO output
EXT_PMU_EN
MT3630 output to enable / disable
external PMU or DC/DC convertor
May be left unconnected
PMU_EN
MT3630 input to enable / disable the
internal PMU
May be left unconnected
WAKEUP
MT3630 input to wake-up the A7
processor from power-saving sleep mode
May be left unconnected
Module Integration onto an OEM Board
Module Power Interfaces
To power this module, the OEM board must be able to supply a maximum of 2.5 Watts at 3.3V.
Prior to power-up of the module, the following interfaces need to be attended to:
Wi-Fi Network Settings
For Wi-Fi connected user applications, the module’s Wi-Fi network settings need to be configured by one of
the following methods:
a) In the application software (using #define statements), OEM factory-programmed into the module
b) Via a companion nRF52840 BLE device integrated onto the OEM’s end-product board
c) Via the SERVICE UART interface with a Windows-10 development computer running the
azsphere command-line utility (See Appendix-A detail of the suggested PCB footprint to support
temporary attachment of an FTDI FT4232HQ based USB to serial adaptor)
Upon power-up and connection to the designated Wi-Fi network, the module will communicate with the
Microsoft Azure Sphere Security Service, which authenticates and manages one or more of the following
downloads/uploads with the module:
Push of Azure Sphere OS firmware updates to the module
Deployment of custom application software to the module
Reporting of Sphere OS and application versions plus error information to the Azure Sphere Server
The Microsoft Azure Sphere Security Service will also authenticate data transfers between the custom user
application executing on the module and Microsoft Azure (or other) cloud services
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Figure 3 – Module with
dual-band Chip Antenna
Wi-Fi Subsystem
Dual-band 2.4/5GHz 802.11 a/b/g/n Wi-Fi (20 MHz channels only)
Has an N968 Andes 32bit MCU
Uses an external 26 MHz crystal oscillator on the module
Has an integrated 5GHz Balun
Uses external 2.4GHz Balun and Diplexer devices on the module
Wi-Fi Antenna
The module is fitted with an on-board dual-band
chip antenna for 2.4GHz and 5GHz operation
(Pulse Electronics antenna p/n: W3006)
An inline switched RF probe connector
is provided to facilitated RF conducted measurements
A7 Application Processor
1x 500MHz Arm Cortex A7 application processor
core, with 4MB SRAM (shared)
M4F IO Processors
2x 200MHz Arm Cortex M4F IO processor cores,
each with 64KB SRAM
The module pins-out the IO0_TXD and IO1_TXD pins from their dedicated UARTs
SWD interface based debug and programming of M4F IO MCU cores may at later date be enabled
Flash Memory
16MB 100MHz (on-die) QSPI flash memory
Pluton Security Subsystem
1x Cortex M4F MCU, dedicated RAM, ROM and GP timers, system control outputs
Real Time Clock (RTC)
Low-power RTC with timer/time of day control over system power (32KHz crystal oscillator)
Peripheral Serial Interfaces
Three ISU serial interfaces are pinned-out. Their accessible pins are limited to that needed for support of:
ISU0: UART, max rate=3Mbps (4-wire)
ISU1: SPI , max rate=40 MHz (5-wire)
ISU2: I2C , max rate=1MHz (2-wire)
Other I/O Interfaces
All pinned-out I/O pins (including ISU interfaces listed above) can be individually configured as GPIO pins.
A subset of these can be configured as:
PWM outputs
ADC inputs
EXT INT inputs
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Function
Pin Name
Strapping
Recommendation
Normal/Test mode
DEBUG_TXD
Pull-Down
Pull-down resistor is on module
Mode = Normal
Recovery mode
DEBUG_RTS
Pull-Down
Pull-down resistor required on OEM board!
Controlled via PC interface, - if present
RTC mode
RECOVERY_TXD
Pull-Up
Pull-up resistor is on module
RTC oscillator = 32 kHz crystal
26MHz
IO0_RTS
Pull-Up
MT3620 internal pull-up on module
Oscillator frequency = 26 MHz
26MHz
IO0_TXD
Pull-Down
Pull-down resistor is on module
Oscillator frequency = 26 MHz
N9 JTAG
IO1_TXD
Pull-Down
Pull-down resistor is on module
N9 JTAG = OFF
A7 JTAG
RECOVERY_RTS
Pull-Down
Pull-down resistor is on module
A7 JTAG = OFF
See the MT3620 Product Brief at the Mediatek webpage
for more detail on the MT3620AN SoC device…
https://www.mediatek.com/products/azureSphere/mt3620
MT3620 Bootstrap Pins
Note! Six of the seven bootstrap pins are already strapped on the module.
The DEBUG_RTS signal must however be strapped on the OEM board with a 2K2 pull-down resistor, to
ensure that RECOVERY mode remains disabled (This signal gets driven high to select RECOVERY via an
FTDI device based interface with the development computer when a Debug-Programmer cable is attached)
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