AUSTIN SMJ27C040-12JM, SMJ27C040-15JM Datasheet

Austin Semiconductor, Inc.
UVEPROM
SMJ27C040
4 MEG UVEPROM
UV Erasable Programmable Read-Only Memory
A V AILABLE AS MILIT AR Y SPECIFICA TIONS
• SMD 5962-91752
• MIL-STD-883
FEATURES
• Single +5V ±10% power supply
• Industry standard 32-pin dual-in-line package
• All inputs/outputs fully TTL compatible
• Static Operation (no clocks, no refresh)
• 8-bit output for use in microprocessor-based systems
• Power-saving CMOS technology
• 3-state output buffers
• 400-mV DC assured noise immunity with standarad TTL loads
• Latchup immunity of 250 mA on all input and output pins
• No pullup resistors required
• Low power dissipation (Vcc = 5.5V)
PActive - 385 mW Worst Case PStandby - 0.55 mW Worst Case (CMOS-input levels)
OPTIONS MARKING
• Timing
120ns access -1 2 150ns access -1 5
• Package(s)
Ceramic DIP (600mils) J No. 114
• Operating Temperature Ranges
Military (-55oC to +125oC) M
For more products and information
please visit our web site at
www.austinsemiconductor .com
PIN ASSIGNMENT
(Top View)
32-Pin DIP (J)
(600 MIL)
1
V
PP
2
A16
3
A15
4
A12
5
A7
6
A6
7
A5
8
A4
9
A3
10
A2
11
A1
12
A0
13
DQ0
14
DQ1
15
DQ2
16
GND
Pin Name Function
A0 - A18 Address Inputs
DA0-DQ7 Inputs (programming)/Outputs
E\ Chip Enable G\ Output Enable
GND Ground
V
5V Supply
CC
V
13V Power Supply*
PP
*Only in program mode.
Vcc
32
A18
31
A17
30
A14
29
A13
28
A8
27
A9
26
A11
25
G\
24
A10
23 22
E\
21
DQ7
20
DQ6
19
DQ5
18
DQ4
17
DQ3
GENERAL DESCRIPTION
The SMJ27C040 is a set of 4,194,304-bit, ultraviolet-light erasable, electrically programmable read-only memories (EPROMs). These devices are fabricated using CMOS technology for high speed and simple interface with MOS and bipolar circuits. All inputs (including program data inputs) can be driven by Series 54 TTL circuits. Each output can drive one Series 54 TTL circuit without external resistors. The data outputs are 3-state for connecting multiple devices to a common bus. The SMJ27C040 is offered in a 32-pin 600-mil dual-in-line ceramic package (J suffix) rated for operation from -55°C to 125°C. Since this EPROM operates from a single 5V supply (in the read mode), it is ideal for use in microprocessor-based systems. One other (13V) supply is needed for programming. All programming signals are TTL level. For programming outside the system, existing EPROM programmers can be used.
SMJ27C040
Rev. 1.0 9/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
Austin Semiconductor, Inc.
FUNCTIONAL BLOCK DIAGRAM*
EPROM 524,288 x 8
12
A0
11
A1
10
A2 A3
8
A4 A5 DQ0
6
A6 DQ1 A7 DQ2
27
A8 DQ3
26
A9 DQ4
23
A10 DQ5
25
A11 DQ6
4
A12 DQ7
28
A13
29
A14
3
A15
2
A16
30
A17
31
A18
22
E\
G\
24
[PWR DWN]
&
A
EN
0
524,287
A A A A A A A A
UVEPROM
SMJ27C040
13 14 15 17 18
19 20 21
* This symbol is in accordance with ANSI/IEEE std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the J package.
OPERATION
The seven modes of operation are listed in Table 1. The read mode requires a single 5V supply. All inputs are TTL level except for VPP during programming (13V), and VH (12V)i on A9 for signature mode.
T ABLE 1. OPERA TION MODES
FUNCTION
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
CC
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
A9 A0 DQ0-DQ7
X X Data Out X X High-Z X X High-Z X X Data In X X High-Z X X Data Out
V
V
*Signature Mode V
IH
IL
V
IL
MFG Code 97
Device Code 50
2
Read Output Disable Standby Programming Program Inhibit Verify
* X can be VIL or VIH. iVH = 12V ± 0.5V
SMJ27C040
Rev. 1.0 9/01
E\ G\
V
IL
V
IL
V
IH
V
IL
V
IH
V
IH
V
IL
V
PP
V
IL
V
IH
X
V
IH
V
IH
V
IL
V
IL
V
CC
V
CC
V
CC
V
PP
V
PP
V
PP
V
CC
Austin Semiconductor, Inc.
UVEPROM
SMJ27C040
READ/OUTPUT DISABLE
When the outputs of two or more SMJ27C040s are connected in parallel on the same bus, the output of any particular device in the circuit can be read with no interference from competing outputs of the other devices. T o read the output of a single device, a low level signal is applied to the E\ and G\ pins. All other devices in the circuit should have their outputs disabled by applying a high level signal to one of these pins. Output data is accessed at pins Q0-Q7.
LA TCHUP IMMUNITY
Latchup immunity on the SMJ27C040 is a minimum of 250mA on all inputs and outputs. This feature provides latchup immunity beyond any potential transients at the P .C. board level when the EPROM is interfaced to industry standard TTL or MOS logic devices. The input/output layout approach controls latchup without compromising performance or packing density .
POWER DOWN
Active ICC supply current can be reduced from 70mA to 1mA for a high TTL input on E\ and to 100µA for a high CMOS input on E\. In this mode all outputs are in the high­impedance state.
ERASURE
Before programming, the SMJ27C040 EPROM is erased by exposing the chip through the transparent lid to a high intensity ultraviolet-light (wavelength 2537 Å). The recommended minimum exposure dose (UV intensity x
exposure time) is 15-W.s/cm2. A typical 12-mW/cm2, filterless UV lamp erases the device in 21 minutes. The lamp should be located about 2.5cm above the chip during erasure. After erasure, all bits are in the high state. It should be noted that normal ambient light contains the correct wavelength for erasure. Therefore, when using the SMJ27C040, the window should be covered with an opaque label. After erasure (all bits in logic high state), logic lows are programmed into the desired locations. A programmed low can be erased only by ultraviolet light.
SNAP! PULSE PROGRAMMING
The SMJ27C040 is programmed by using the SNAP! Pulse programming algorithm. The programming sequence is shown in the SNAP! Pulse programming flow chart (Figure 1).
The initial setup is V
= 13V, V
PP
= 6.5V, E\ = VIH, and
CC
G\ = VIL. Once the initial location is selected, the data is presented in parallel (eight bits) on pins DQ1 through DQ8. Once addresses and data are stable, the programming mode is achieved when E\ is pulsed low (VIL) with a pulse duration of
t
. Every location is programmed only once before
W(PGM)
going to interactive mode.
In the interactive mode, the word is verified at V
= 13V,
PP
VCC= 6.5V, E\ = VIH, and G\ = VIL. If the correct data is not read, the programming is performed by pulling G\ high, then E\ low with a pulse duration of t
. This sequence of
W(PGM)
verification and programming is performed up to a maximum of 10 times. When the device is fully programmed, all bytes
are verified with VCC = VPP = 5V ± 10%.
PROGRAM INHIBIT
Programming can be inhibited by maintaining high level inputs on the E\ and G\ pins.
PROGRAM VERIFY
Programmed bits can be verified with VPP = 13V when G\ = VIL, and E\ = VIH.
SIGNA TURE MODE
The signature mode provides access to a binary code identifying the manufacturer and type. This mode is activated when A9 (pin 26) is forced to 12V. Two identifier bytes are accessed by toggling A0. All other addresses must be held low. The signature code for the SMJ27C040 is 9750. A0 low selects the manufacturer’s code 97 (Hex), and A0 high selects the device code 50 (Hex), as shown in Table 2.
TABLE 2. SIGNATURE MODES
IDENTIFIER*
MANUFACTURER CODE DEVICE CODE
* E\ = G\ = VIL, A1 - A8 = VIL, A9 = VH, A10 - A18 = VIL, VPP = VCC.
SMJ27C040
Rev. 1.0 9/01
A0 DQ7 DQ6 DQ5 DQ4 DQ3 DQ2 DQ1 DQ0 HEX
V
IL
V
IH
1001011197 0101000050
3
PINS
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
UVEPROM
SMJ27C040
Austin Semiconductor, Inc.
FIGURE 1. SNAP! PULSE PROGRAMMING FLOW CHART
START
Address = First Location
Increment
Address
VCC = 6.5V ± 0.25V, VPP = 13V ± 0.25V
Program One Pulse = tW = 100µs
Last
Address?
Yes
Address = First Location
X = 0
Verify
One
Byte
Pass
Fail
Increment Address
Program One Pulse = tW = 100µs
No
X = X+1
X = 10?
Program
Mode
Interactive
Mode
SMJ27C040
Rev. 1.0 9/01
No
VCC = VPP = 5V ± 0.5V
Last
Address?
Yes
Compare All Bytes
to Original
Data
Pass
Device Passed
Fail
Yes
Device Failed
Final
Verification
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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