1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration or
spot.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard
surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure human
earth when handling.
7) Do not open or modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) In case if a Module has to be put back into the packing container slot after once it was
taken out from the container, do not press the center of the CCFL reflector edge.
Instead, press at the far ends of the CCFL Reflector edge softly. Otherwise the TFT
Module may be damaged.
10) At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor tilt
the Interface Connector of the TFT Module.
11) After installation of the TFT Module into an enclosure, do not twist nor bend the TFT
Module even momentary. At designing the enclosure, it should be taken into
consideration that no bending/twisting forces are applied to the TFT Module from
outside. Otherwise the TFT Module may be damaged.
12) Cold cathode fluorescent lamp in LCD contains a small amount of mercury. Please follow local
ordinances or regulations for disposal.
13) Small amount of materials having no flammability grade is used in the LCD module. The LCD
module should be supplied by power complied with requirements of Limited Power Source
(IEC60950 or UL1950), or be applied exemption.
14) The LCD module is designed so that the CCFL in it is supplied by Limited Current Circuit
(IEC60950 or UL1950). Do not connect the CCFL in Hazardous Voltage Circuit.
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AU OPTRONICS CORPORATION
document version 0.1 4/24
Product Specification
RoHS Compliance
2. General Description
M154EW01 V0 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel, a
driver circuit, and backlight system. The screen format is intended to support the WXGA (1280(H) x
800(V)) screen and 262k colors (RGB 6-bits data driver). All input signals are LVDS interface
compatible.Inverter of backlight is not included.
2.1 General Specification
The following items are characteristics summary on the table at 25 ℃ condition:
Items Unit Specifications
Screen Diagonal [mm] 391 (15.4W”)
Active Area [mm] 331.2 X 207.0
Pixels H x V 1280x3(RGB) x 800
Pixel Pitch [mm] 0.2588X0.2588
Pixel Arrangement R.G.B. Vertical Stripe
Display Mode Normally White
White Luminance (ICCFL=6.5mA) [cd/m2] 200 cd/m2 @ 6.5mA (Typ)
Luminance Uniformity 80% (9 points)
Contrast Ratio
Optical Rise Time/Fall Time [msec] 6/2 typ.
Nominal Input Voltage VDD [Volt] +3.3 typ.
Power Consumption [Watt] PDD=1.6W, PCFL=9.7W (Max.)
Weight [Grams] 1180 max.
Physical Size [mm] 354.12 x 227.4 x 12.0(max)
Electrical Interface 1 channel LVDS
Surface Treatment
Support Color 262K colors ( RGB 6-bit )
Temperature Range
Operating
Storage (Non-Operating)
RoHS Compliance
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AU OPTRONICS CORPORATION
400 typ
240 min.
Glare, Hardness 3H,
Reflectance 4.3%
[oC]
[oC]
0 to +50
-20 to +60
document version 0.1 5/24
Product Specification
2.2 Optical Characteristics
The optical characteristics are measured under stable conditions at 25 (Room Temperature)℃ :
AU OPTRONICS CORPORATION
Item Unit Conditions Min.
White Luminance
ICCFL=6.5mA
Viewing Angle
Luminance Uniformity
[cd/m2]
[degree]
[%]
CR: Contrast Ratio
Cross talk
[%]
Response Time [msec]
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Color / Chromaticity
Coordinates
(CIE 1931)
Flicker [dB] -
Note 1. Definition of viewing angle
Viewing angle is the measurement of contrast ratio 10≧ and ≧5, at the screen center, over a 180° horizontal and
Horizontal (Right)
CR = 10 (Left)
Vertical (Upper)
CR = 10 (Lower)
Horizontal (Right)
CR = 5 (Left)
Vertical (Upper)
CR = 5 (Lower)
9 Points
160 200 - 4
-
-
-
-
-
-
-
-
70%
240 400 - 4
4 5
Rising
Falling
Rising + Falling
Red x
Red y
Green x
Green y
Blue x
Blue y
White x
White y
-
- 2 5
8 15
0.560 0.590 0.620
0.315 0.345 0.375
0.285 0.315 0.345
0.520 0.555 0.585
0.125 0.155 0.185
0.125 0.155 0.185
0.283 0.313 0.343
0.299 0.329 0.359
Typ. Max.
45
45
15
35
-
-
-
-
Note
1
60
60
35
55
-
-
-
-
80% 2,3
6
10
4,6
4
-20
7
180° vertical range (off-normal viewing angles). The 180° viewing angle range is broken down as follows; 90° (θ)
horizontal left and right and 90° (Φ) vertical, high (up) and low (down). The measurement direction is typically
perpendicular to the display surface with the screen rotated about its center to develop the desiredmeasurement
viewing angle.
document version 0.1 6/24
Minimum Brightness of
9
points
=
Maximum Brightness of
9
points
50 %
90 %
90 %
50 %
10 %
10 %
Note 2: 9 points position
Product Specification
AU OPTRONICS CORPORATION
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Note 3: The luminance uniformity of 9 points is defined by dividing the maximum luminance values by the minimum test
point luminance
FOR PROMATE INTERNAL USE ONLY
δ
W9
document version 0.1 7/24
Product Specification
Field=2
°
Note 4: Measurement method
The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change during
measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight for 30
minutes in a stable, windless and dark room.
AU OPTRONICS CORPORATION
Note 5: Definition of Cross Talk (CT)
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Photo detector
CT = | YB – YA | / YA × 100 (%)
Where
YA = Luminance of measured location without gray level 0 pattern (cd/m2)
YB = Luminance of measured location with gray level 0 pattern (cd/m2)
document version 0.1 8/24
Product Specification
Level
DC
Note 6: Definition of response time:
The output signals of photo detector are measured when the input signals are changed from “Full Black” to
“Full White” (rising time), and from “Full White” to “Full Black ”(falling time), respectively. The response time is
interval between the 10% and 90% of amplitudes. Please refer to the figure as below.
Note 7: Subchecker Pattern
AU OPTRONICS CORPORATION
R G B R G B
Gray Level = L127
R G B R G B
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R G B R G B
Method: Record dBV & DC value with (WESTAR)TRD-100
Amplitude
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DC
log20(dB)Flicker =
Gray Level = L0
Hz) 30Level(at AC
AC
Time
document version 0.1 9/24
Product Specification
DC POWER
Connector
LVDS
I/F + X
-
PCB
3. Functional Block Diagram
The following diagram shows the functional block of the 15.4 inches wide Color TFT/LCD Module:
AUO ASIC
LVDS
Receiver
AU OPTRONICS CORPORATION
Timing
Controller
G1
TFT-LCD
1280(x3) x 800
Pixels
+3.3V
G800
D1 D3840
DC/DC
Converter
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Gamma
Correction
Inverter
2 CCFL
document version 0.1 10/24
Product Specification
4. Absolute Maximum Ratings
Absolute maximum ratings of the module is as following:
4.1 Absolute Ratings of TFT LCD Module
Item Symbol Min Max Unit Conditions
Logic/LCD Drive
4.2 Absolute Ratings of Backlight Unit
Item Symbol Min Max Unit Conditions
CCFL Current ICCFL - 7.0 [mA] rms Note 1,2
4.3 Absolute Ratings of Environment
Item Symbol Min Max Unit Conditions
Operating
AU OPTRONICS CORPORATION
Vin -0.3 +4.0 [Volt] Note 1,2
TOP 0 +50 [oC] Note 3
Operation Humidity
Storage
Storage Humidity HST
Note 1: At Ta (25 )℃
Note 2: Permanent damage to the device may occur if exceed maximum values
Note 3: For quality performance, please refer to AUO IIS(Incoming Inspection Standard).
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HOP 5 90 [%RH] Note 3
TST -20 +60 [oC] Note 3
5 90
[%RH]
Note 3
Operating Range Storage Range
document version 0.1 11/24
Product Specification
90%
10%
5. Electrical characteristics
5.1 TFT LCD Module
5.1.1 Power Specification
Input power specifications are as follows:
AU OPTRONICS CORPORATION
Symble
Parameter Min Typ Max Units Note
VDD Logic/LCD Drive Voltage 3.0 3.3 3.6 [Volt]
PDD VDD Power
IDD IDD Current
IRushInrush Current
VDDrp
Note 1 : Maximum Measurement Condition:Black Patterm
Note 2:Measure Condition
(High to Low)
Control
Signal
SW1
SW MAG-SPST
12
Allowable
Logic/LCD Drive Ripple Voltage
+5.0V
R1
47K
R2
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1K
+12.0V
VR1
47K
D6
D5
D2S
D1
G
C3
0.01uF/25V
Q3
AO6402
D2SD1D5
G
D6
Q3
AO6402
F1
350
1.6 [Watt] Note 1
450 [mA]
2000 [mA]
[mV]
p-p
(LCD Module Input)
C1
1uF/16V
100
VCC
Note 1
Note 2
C2
1uF/25V
3.3V
0V
0.5ms
document version 0.1 12/24
Vin rising time
Product Specification
VSS
5.1.2 Signal Electrical Characteristics
Input signals shall be low or High-impedance state when VDD is off.
It is recommended to refer the specifications of THC63LVDF84A(Thine Electronics Inc.) in detail.
Signal electrical characteristics are as follows:
AU OPTRONICS CORPORATION
Parameter
Vth
Vtl
Vcm
Note: LVDS Signal Waveform
Vth
Vtl
Differential Input High
Threshold (Vcm=+1.2V)
Differential Input Low
Threshold (Vcm=+1.2V)
Differential Input
Common Mode Voltage
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Condition Min Max Unit
Vcm
-100
1.125
100
1.375
[mV]
[mV]
[V]
5.2 Backlight Unit
Parameter guideline for CCFL Inverter is under stable conditions at 25 (Room Temperature) ℃:
Parameter Min Typ Max Units Condition
CCFL Standard Current (ISCFL)
CCFL Operation current (IRCFL) 3.0 6.5 7.0 [mA] rms
CCFL Frequency (FCFL) 40 50 80 [KHz] Note 3,4,8
CCFL Ignition Voltage (ViCFL, Ta= 0℃)
CCFL Ignition Voltage (ViCFL, Ta= 25℃)
CCFL Voltage (VCFL)
CCFL Power consumption (PCFL)
CCFL Life Time (LTCFL) 40,000 50,000
document version 0.1 13/24
6.0 6.5 7.0
1290
990
-
- 8.36 9.7
643
@6.5mA
734 [Volt] rms Note 6
- [Hour] Note 7
[mA] rms
Note 2
[Volt] rms
Note 5
[Volt] rms
[Watt] Note 6
Product Specification
Note 1: Typ. are AUO recommended design points.
*1 All of characteristics listed are measured under the condition using the AUO test inverter.
*2 In case of using an inverter other than listed, it is recommended to check the inverter carefully.
Sometimes, interfering noise stripes appear on the screen, and substandard luminance or flicker at
low power may happen.
*3 In designing an inverter, it is suggested to check safety circuit very carefully. Impedance of CCFL,
for instance, becomes more than 1 [M ohm] when CCFL is damaged.
*4 Generally, CCFL has some amount of delay time after applying kick-off voltage. It is recommended
to keep on applying ignition voltage for 1 [Sec] until discharge.
*5 Reducing CCFL current increases CCFL discharge voltage and generally increases CCFL
discharge frequency. So all the parameters of an inverter should be carefully designed so as not to
produce too much leakage current from high-voltage output of the inverter.
Note 2: It should be employed the inverter which has “Duty Dimming”, if IRCFL is less than 3mA.
Note 3: CCFL discharge frequency should be carefully determined to avoid interference between inverter and
TFT LCD.
Note 4: The frequency range will not affect to lamp life and reliability characteristics.
AU OPTRONICS CORPORATION
Note 5: CCFL inverter should be able to give out a power that has a generating capacity of over 1290 voltage.
Lamp units need 1290 voltage minimum for ignition.
Note 6: The variance of CCFL power consumption is ±10%. Calculator value for reference (ISCFL × VCFL × 2=
PCFL)
Note 7: Definition of life: brightness becomes 50%. The typical life time of CCFL is under the condition at 6.5
mA lamp current.
Note 8: Requirement for system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp. It should help increase the lamp lifetime and reduce
its leakage current.
The frequency range will not affect to lamp lifetime and reliability characteristics. (Reference value)
The rate of unsymmetrical of lamp lighting waveform is shown (Lamp current waveform and lamp
voltagewaveform) at 5% or less.
Asymmetrical:(∣A∣-∣B∣) /∣C
Recommendation lighting frequency:50 ~ 60 KHz
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∣≦
5 %
A: Lamp current or lamp voltage o-p of +side
B: Lamp current or lamp voltage o-p of –side
C: Max(A,B) this is bigger in A or B
document version 0.1 14/24
1
6. Signal Characteristic
6.1 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format.
1st Line
800th Line
0
R GB R GB
R GB R GB
1278 1279
R GB R GB
R GB R GB
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Document version 0.1 15/24
Data Clock
6.2 The input data format
Signal Name
R5
R4
R3
R2
R1
R0
Description
Red Data 5 (MSB)
Red Data 4
Red Data 3
Red Data 2
Red Data 1
Red Data 0 (LSB)
Red-pixel Data
Red-pixel Data
Each red pixel's brightness data consists of
these 6 bits pixel data.
G5
G4
G3
G2
G1
G0
B5
B4
B3
B2
B1
B0
RxCLKIN
DE Display Timing This signal is strobed at the falling edge of
VS Vertical Sync The signal is synchronized to RxCLKIN .
HS Horizontal Sync The signal is synchronized to RxCLKIN .
Note: Output signals from any system shall be low or High-impedance state when VDD is off.
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Green Data 5 (MSB)
Green Data 4
Green Data 3
Green Data 2
Green Data 1
Green Data 0 (LSB)
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Green-pixel Data
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Blue Data 5 (MSB)
Blue Data 4
Blue Data 3
Blue Data 2
Blue Data 1
Blue Data 0 (LSB)
Blue-pixel Data
Green-pixel Data
Each green pixel's brightness data consists of
these 6 bits pixel data.
Blue-pixel Data
Each blue pixel's brightness data consists of
these 6 bits pixel data.
The typical frequency is 68.9 MHZ.. The signal
is used to strobe the pixel data and DE signals.
All pixel data shall be valid at the falling edge
when the DE signal is high.
RxCLKIN. When the signal is high, the pixel
data shall be valid to be displayed.
Document version 0.1 16/24
6.3 Signal Description/Pin Assignment
LVDS is a differential signal technology for LCD interface and high speed data transfer device.
PIN# Signal Name
1GNDGround
2VDD+3.3V Power Supply
3VDD+3.3V Power Supply
4V
5NCNo Connection (Reserve for AUO test)
6CLK
7DATA
8RxIN0-LVDS differential data input(R0-R5, G0)
9RxIN0+LVDS differential data input(R0-R5, G0)
10GNDGround
11RxIN1-LVDS differential data input(G1-G5, B0-B1)
12RxIN1+LVDS differential data input(G1-G5, B0-B1)
13GNDGround
14RxIN2-LVDS differential data input(B2-B5, HS, VS, DE)
15RxIN2+LVDS differential data input(B2-B5, HS, VS, DE)
+3.3V EDID Power
EDID
EDID Clock Input
EDID
EDID Data Input
EDID
Description
16GNDGround
17RxCLKIN-LVDS differential clock input
18RxCLKIN+LVDS differential clock input
19GNDGround
20NCNo Connection (Reserve for AUO test)
21NCNo Connection (Reserve for AUO test)
22GNDGround
23NCNo Connection (Reserve for AUO test)
24NCNo Connection (Reserve for AUO test)
25GNDGround
26NCNo Connection (Reserve for AUO test)
27NCNo Connection (Reserve for AUO test)
28NCNo Connection (Reserve for AUO test)
29NCNo Connection (Reserve for AUO test)
30NCNo Connection (Reserve for AUO test)
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Document version 0.1 17/24
12
Connector
Note1: Start from right side
30
NC
GND
Note2: Input signals shall be low or High-impedance state when VDD is off.
internal circuit of LVDS inputs are as following.
The module uses a 100ohm resistor between positive and negative data lines of each receiver input
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Signal Input
FOR PROMATE INTERNAL USE ONLY
Pin No .
8
RxIN0-
R
9
RxIN0+
11
RxIN1-
R
RxIN1+
14
RxIN2-
R
15
RxIN2+
LVDS Receiver
17
18
RxCLK IN-
RxCLKIN+
R
Document version 0.1 18/24
6.4 Interface Timing
6.4.1 Timing Characteristics
Basically, interface timings should match the 1280x800 /60Hz manufacturing guide line timing.
Parameter Symbol Min. Typ. Max. Unit
Frame Rate - 50 60 - Hz
Clock frequency 1/ T
Vertical
Section
Horizontal
Section
Note : DE mode only
6.4.2 Timing diagram
T
CLOCK
DOTCLK
Input
Data
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DE
FOR PROMATE INTERNAL USE ONLY
DE
Period T
Active T
Blanking T
Period T
Active T
Blanking T
Input Timing Definition ( DE Mode)
Invaild
Data
T
HB
Pixel
1
T
VB
50 68.9 80 MHz
Clock
V
VD
VB
H
HD
HB
803 816 1023
800 800 800
3 16 223
1303 1408 2047
- 1280 -
23 128 767
Pixel
2
T
Pixel
3
T
HD
H
T
V
Pixel
N-1
T
VD
Pixel
N
T
Line
T
Clock
Invaild
Data
Pixel
1
Document version 0.1 19/24
T3
T2
T1
T7
6.5 Power ON/OFF Sequence
VDD power and lamp on/off sequence is as follows. Interface signals are also shown in the chart.
Signals from any system shall be Hi-Z state or low level when VDD is off.
90%
10%
Power Supply VDD
Power Sequence Timing
Backlight On
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Value
Parameter
T10.5-10(ms)
T20-50(ms)
T30-50(ms)
T4400--(ms)
T5200--(ms)
T6200--(ms)
T70-10(ms)
Min.Typ.Max.
T5
VALID
DATA
Units
90%
10%
T4
T6
Document version 0.1 20/24
7. Connector Description
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following
components.
7.1 TFT LCD Module
Connector Name / Designation For Signal Connector
Manufacturer JAE or compatible
Type / Part Number FI-XB30SL-HF10 or compatible
Mating Housing/Part Number FI-X30H or compatible
7.2 Backlight Unit
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following
components.
Connector Name / Designation For Lamp Connector
Manufacturer CviLux
Type / Part Number CP0502SL09
Mating Type / Part Number CP0502P1ML0-LF
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7.3 Signal for Lamp connector
Connector No. Pin No. Input Color Function
1 Hot1 Pink High Voltage
2 Cold1 White Low Voltage
Upper
CN1
Connector No. Pin No. Input Color Function
Lower
CN2
Document version 0.1 21/24
1 Hot1 Pink High Voltage
2 Cold1 White Low Voltage
Contact Discharge: ± 8KV, 150pF(330Ω ) 1sec,
Air Discharge: ± 15KV, 150pF(330Ω ) 1sec
8. Reliability Test
Items Required Condition
Temperature Humidity Bias (THB) Ta= 50, 80%RH, 300hours℃
Note
High Temperature Operation (HTO) Ta= 50, 50%RH, 300hours℃
Low Temperature Operation (LTO) Ta= 0, 300hours℃
High Temperature Storage (HTS) Ta= 60, 300hours℃
Low Temperature Storage (LTS) Ta= -20, 300hours℃
Acceleration: 1.5 G
Vibration Test
(Non-operation)
Shock Test
(Non-operation)
Drop Test Height: 60 cm, package test
Thermal Shock Test (TST) -20℃/30min, 60℃/30min, 100 cycles
On/Off Test On/10sec, Off/10sec, 30,000 cycles
ESD (Electro Static Discharge)
Wave: Random
Frequency: 10 - 200 - 10 Hz
Sweep: 30 Minutes each Axis (X, Y, Z)
Acceleration: 50 G
Wave: Half-sine
Active Time: 20 ms
Direction: ±X, ±Y, ±Z (one time for each Axis)
8 points, 25 times/ point.
1
2
8 points, 25 times/ point.
Altitude Test
Note 1: The TFT-LCD module will not sustain damage after being subjected to 100 cycles of rapid
Note 2: According to EN61000-4-2 , ESD class B: Some performance degradation allowed. No data lost.
Self-recoverable. No hardware failures.
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temperature change. A cycle of rapid temperature change consists of varying the temperature
from -20 to 60, and back again. Power is not applied during the test. After temperature ℃℃
cycling, the unit is placed in normal room ambient for at least 4 hours before power on.
Operation:10,000 ft
Non-Operation:30,000 ft
Document version 0.1 22/24
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Document version 0.1 23/24
9. Mechanical Characteristics
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Document version 0.1 24/24
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