Version and Date Page Old description New Description Remark
1.0 2007/11/13 All First Edition for Customer All
1.1 2008/01/17 1
1.1 2008/01/17 27
Date: 11/22/2007Date: 1/17/2008
Add the gap spec.
between Active Area and
Front Bezel in 2D drawing
︱︱︱︱a – bbbb||||< 1
︱︱︱︱c – d||||< 1
< 1
< 1< 1
< 1
< 1< 1
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document version 1.1 3/27
Product Specification
1. Handling Precautions
1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration or spot.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure human earth
when handling.
7) Do not open or modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) In case if a Module has to be put back into the packing container slot after once it was taken out
from the container, do not press the center of the CCFL reflector edge. Instead, press at the far
ends of the CCFL Reflector edge softly. Otherwise the TFT Module may be damaged.
10) At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor tilt the
Interface Connector of the TFT Module.
11) After installation of the TFT Module into an enclosure, do not twist nor bend the TFT Module
even momentary. At designing the enclosure, it should be taken into consideration that no
bending/twisting forces are applied to the TFT Module from outside. Otherwise the TFT Module
may be damaged.
12) Cold cathode fluorescent lamp in LCD contains a small amount of mercury. Please follow local
ordinances or regulations for disposal.
13) Small amount of materials having no flammability grade is used in the LCD module. The LCD module
should be supplied by power complied with requirements of Limited Power Source (IEC60950 or
UL1950), or be applied exemption.
14) The LCD module is designed so that the CCFL in it is supplied by Limited Current Circuit (IEC60950 or
UL1950). Do not connect the CCFL in Hazardous Voltage Circuit.
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document version 1.1 4/27
Product Specification
2. General Description
M150EW01 V0 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel, a driver circuit,
and backlight system.
The screen format is intended to support the WXGA (1280(H) x 720(V)) screen and 16.7M colors. All input
signals are LVDS interface compatible.
Inverter of backlight is not included.
2.1 Display Characteristics
The following items are characteristics summary on the table at 25 ℃ condition:
Items Unit Specifications
Screen Diagonal [mm] 15.0”W
Active Area [mm] 332.16 (W) x 186.84 (H)
Pixels H x V 1280x3(RGB) x 720
Pixel Pitch [mm] 0.2595X0.2595
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Pixel Arrangement R.G.B. Vertical Stripe
Display Mode Normally White
White Luminance (ICCFL=7.5mA) [cd/m2] 200 cd/m2 @ 7.5mA (Typ)
Contrast Ratio 400 (typ)
Response Time [msec] 8 (Typ, on/off)
Nominal Input Voltage VDD [Volt] +3.3 typ.
Power Consumption [Watt]
Weight [Grams] 1160(Typ)
Physical Size(H x V x D) [mm] 354.12(W) x 227.4(H) x 12.0(D)(Typ)
Electrical Interface one channel LVDS
Surface Treatment Anti-Glare, Hardness 3H
Support Color
RoHS Compliance RoHS Compliance
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12.6W(Typ)
(PDD=2.6W, PCFL=10W@Lamp=7.5mA)
16.7M colors (RGB 6-bit + HiFRC)
document version 1.1 5/27
Product Specification
2.2 Optical Characteristics
The optical characteristics are measured under stable conditions at 25 (Room Temperature)℃ :
Item Unit Conditions Min. Typ. Max. Note
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Horizontal (Right)
CR = 10 (Left)
Vertical (Up)
Viewing Angle [degree]
Luminance Uniformity
Response Time [msec]
Color / Chromaticity
Coordinates
(CIE 1931)
White Luminance
ICCFL=7.5 mA
CR: Contrast Ratio
Cross talk [%]
Flicker [dB] -
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[%]
[cd/m2]
CR = 10 (Down)
Horizontal (Right)
CR = 5 (Left)
Vertical (Up)
CR = 5 (Down)
9 Points
Rising
Falling
Rising + Falling
Red x
Red y
Green x
Green y
Blue x
Blue y
White x
White y
240 400 - 4
35
35
10
30
45
45
20
40
70% 80% 2,3
0.559 0.589 0.619
0.307 0.337 0.367
0.282 0.312 0.342
0.522 0.552 0.582
0.128 0.158 0.188
0.115 0.145 0.175
0.283 0.313 0.343
0.299 0.329 0.359
160 200 - 4
Optical Equipment: BM-5A, BM-7, PR880, or equivalent
45
45
20
40
55
55
30
50
-
- 2 4
8
6
13
1.2 1.5
-20 7
-
-
-
1
-
-
-
-
9
4,6
4
5
document version 1.1 6/27
Product Specification
Note 1: Definition of viewing angle
Viewing angle is the measurement of contrast ratio 10≧ and ≧5, at the screen center, over a 180° horizontal and
180° vertical range (off-normal viewing angles). The 180° viewing angle range is broken down as follows; 90° (θ)
horizontal left and right and 90° (Φ) vertical, high (up) and low (down). The measurement direction is typically
perpendicular to the display surface with the screen rotated about its center to develop the desiredmeasurement
viewing angle.
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Note 2: 9 points position
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90 %
50 %
10 %
10 %
50 %
90 %
Note 3: The luminance uniformity of 9 points is defined by dividing the maximum luminance values by the minimum test
point luminance
document version 1.1 7/27
δ
Minimum Brightness of 9 points
=
W9
Maximum Brightness of 9 points
Product Specification
Note 4: Measurement method
The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change during
measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight for 30
minutes in a stable, windless and dark room.
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Photo detector
Field=2°
50 cm
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LCD Panel
Center of the screen
TFT-LCD Module
Note 5: Definition of Cross Talk (CT)
CT = | YB – YA | / YA × 100 (%)
Where
YA = Luminance of measured location without gray level 0 pattern (cd/m2)
YB = Luminance of measured location with gray level 0 pattern (cd/m2)
document version 1.1 8/27
Product Specification
Note 6: Definition of response time:
The output signals of photo detector are measured when the input signals are changed from “Full Black” to “Full White”
(rising time), and from “Full White” to “Full Black ”(falling time), respectively. The response time is interval between the
10% and 90% of amplitudes. Please refer to the figure as below.
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Note 7: Subchecker Pattern
R G B R G B
Gray Level = L127
R G B R G B
R G B R G B
Method: Record dBV & DC value with (WESTAR)TRD-100
Amplitude
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Gray Level = L0
DC
AC
Time
document version 1.1 9/27
log20(dB)Flicker =
Level DC
Hz) 30Level(at AC
Product Specification
3. Functional Block Diagram
The following diagram shows the functional block of the 15 inches wide Color TFT/LCD Module:
LVDS
Connector
LVDS
Receiver
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AUO ASIC
Timing
Controller
G1
TFT-LCD
1280(x3) x 720
Pixels
+3.3V
G720
DC/DC
Converter
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I/F + X-PCB
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Gamma
Correction
DC POWER
D1 D3840
Inverter
2 CCFL
document version 1.1 10/27
Product Specification
4. Absolute Maximum Ratings
Absolute maximum ratings of the module is as following:
4.1 Absolute Ratings of TFT LCD Module
Item Symbol Min Max Unit Conditions
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Logic/LCD Drive Voltage Vin -0.3 +3.6[Volt] Note 1,2
Y
4.2 Absolute Ratings of Backlight Unit
Item Symbol Min Max Unit Conditions
CCFL Current ICCFL - 8.0 [mA] rms Note 1,2
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document version 1.1 11/27
Product Specification
4.3 Absolute Ratings of Environment
Item Symbol Min. Max. Unit Conditions
Operating Temperature TOP 0 +50 [oC]
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Operating Humidity HOP 8 90 [%RH]
Storage Temperature TST -20 +60 [oC]
Storage Humidity HST 8 90 [%RH]
Note 1: At Ta (25 )℃
Note 2: Permanent damage to the device may occur if exceed maximum values
Note 3: For quality performance, please refer to AUO IIS(Incoming Inspection Standard).
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Note 3
Operating Range Storage Range
document version 1.1 12/27
Product Specification
5. Electrical characteristics
5.1 TFT LCD Module
5.1.1 Power Specification
Input power specifications are as follows:
Symble Parameter Min Typ Max Units Note
VDD Logic/LCD Drive Voltage 3.0 3.3 3.6 [Volt] ±10%
IDD VDD Current
IRush Inrush Current
PDD VDD Power
Note: Measure Condition
+3.3V
+5.0V
R1
47K
(High to Low)
Control Signal
SW
+12.0V
R2
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1K
F
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800 910
1.4 2
2.6 3
Q3
D6
D5
D2S
D1
G
C3
AO6402
D2SD1D5
G
D6
Q3
AO6402
F1
[mA]
[A]
Vin=3.3V, Black Pattern, at 60Hz
Note
[Watt] Vin=3.3V, Black Pattern, at 60Hz
VCC
(LCD Module Input)
C1
1uF/16V
C2
1uF/25V
VR1
47K
0.01uF/25V
90%
3.3V
0V
10%
0.47ms
document version 1.1 13/27
Vin rising time
Product Specification
5.1.2 Signal Electrical Characteristics
Input signals shall be low or Hi-Z state when Vin is off
It is recommended to refer the specifications of SN75LVDS82DGG (Texas Instruments) in detail.
Signal electrical characteristics are as follows:
SymbolParameterMinTypMaxUnitsCondition
VTH
VTL
│VID│
VICM
Note: LVDS Signal Waveform
Differential Input
High Threshold
Differential Input
Low Threshold
Input Differential
Voltage
Differential Input
Common Mode
Voltage
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- -
-100 -
100 400 600 [mV]
1.0 1.2 1.5 [V]
100 [mV]
- [mV]
VICM = 1.2V Note
VICM = 1.2V Note
Note
VTH/VTL = ± 100mV Note
VTH
VTL
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VICM
VSS
||||VID ︱︱︱︱
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Product Specification
5.2 Backlight Unit
Parameter guideline for CCFL Inverter is under stable conditions at 25 (Room Temperature) ℃:
Symbol Parameter Min. Typ. Max. Unit Condition
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IRCFL CCFL operation range
ICFL CCFL Inrush current
FCFL CCFL Frequency
ViCFL (0oC)
(reference)
ViCFL (25oC)
(reference)
VCFL CCFL Discharge Voltage -
CFL
CCFL Life Time LTCFL 40000 50000 [Hour] Note 5
Note 1: CCFL frequency should be carefully determined to avoid interference between inverter and TFT LCD.
Note 2: Calculator value for reference (IRCFLxVCFLx2=PCFL).
Note 3: CCFL inverter should be able to give output a voltage more than 1450 volt. Lamp units need 1450 volt
minimum for ignition.
CCFL Ignition Voltage
CCFL Ignition Voltage
CCFL Power
consumption @7.5mA
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3.0 7.5 8.0
- - 20
40 50 80
1450 - - [Volt] rms
1100 - - [Volt] rms
620
(@7.5mA)
- 10 11 [Watt] (Ta=25oC) Note 2
710
(@3mA)
[mA] rms (Ta=25oC) Note 4
[mA]
[KHz] (Ta=25oC) Note 1, 6
(Ta=0oC) Note 3
(Ta=25oC) Note 3
[Volt] rms (Ta=25oC) Note 2
Note 4: CCFL life time is 50,000hr at 7.5mA, it’s defined as when the brightness is reduced by half. It’s recommended
not to exceed 7.5mA for CCFL life time concern and it’s prohibited to exceed 8.0mA for safety concern.
Note 5: Definition of life: brightness becomes 50%. The typical life time of CCFL is under the condition at 8 mA lamp
current.
Note 6: Requirement for system inverter design, which is intended to have a better display performance, a better power
efficiency and a more reliable lamp. It should help increase the lamp lifetime and reduce its leakage current.
The frequency range will not affect to lamp lifetime and reliability characteristics. (Reference value)
The rate of unsymmetrical of lamp lighting waveform is shown (Lamp current waveform and lamp
voltagewaveform) at 10% or less.
Asymmetrical:(∣A∣-∣B∣) /∣C
A: Lamp current or lamp voltage o-p of +side
B: Lamp current or lamp voltage o-p of –side
C: Max(A,B) this is bigger in A or B
Recommendation lighting frequency:50 ~ 60 KHz
document version 1.1 15/27
∣≦
5 %
Product Specification
AU OPTRONICS CORPORATION
6. Signal Characteristic
6.1 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format.
1 2 1279 1280
1st Line
720th Line
R G B R GB
R G B R GB
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R G B R G B
R G B R G B
document version 1.1 16/27
6.2 The Input Data Format
CLKIN+
CLKIN-
Product Specification
AU OPTRONICS CORPORATION
RIN0 +/-
RIN1 +/-
RIN2 +/-
RIN3 +/-
OG0OR5OR4OR3OR2OR1OR0
OB0OG3OG4OG1OG2OB1OG5
DEVSHS
Rsvd
Current Cycle
Note1: Please follow PSWG.
Note2: 8-bit in
Note3:R/G/B data 7:MSB, R/G/B data 0:LSB
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OB5OB3OB4OB2
OR7OB7OR6OB6OG7OG6
document version 1.1 17/27
Product Specification
AU OPTRONICS CORPORATION
6.3 Signal Description
The module using a pair of LVDS receiver SN75LVDS82(Texas Instruments) or compatible. LVDS is a
differential signal technology for LCD interface and high speed data transfer device. Transmitter shall be
SN75LVDS83(negative edge sampling) or compatible. The first LVDS port(RxOxxx) transmits odd pixels
while the second LVDS port(RxExxx) transmits even pixels.
3 MSB240420 (STM)
Pin No. Symbol Description
1 VDD Power Supply, 3.3V (typical)
2 VDD Power Supply, 3.3V (typical)
3 VSS Ground
4 VSS Ground
5 Rin0- - LVDS differential data input (R0-R5, G0)
6 Rin0+ + LVDS differential data input (R0-R5, G0)
7 VSS Ground
8 Rin1- - LVDS differential data input (G1-G5, B0-B1)
9 Rin1+ + LVDS differential data input (G1-G5, B0-B1)
17 Rin3- - LVDS differential data input (R6-R7, G6-G7,B6-B7)
18 Rin3+ - LVDS differential data input (R6-R7, G6-G7,B6-B7)
19 VSS Ground
20 VSS Ground
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Ground
document version 1.1 18/27
Note1: Start from left side
Note2: Please follow PSWG.
Product Specification
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VSS
VDD
document version 1.1 19/27
6.4 Interface Timing
6.4.1 Timing Characteristics
Signal Item Symbol Min Typ Max Unit
Clock Timing Clock frequency Tclk 50 62.18 81 MHz
Horizontal active Thd 1280 1280 1280 Tclk
Product Specification
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Hsync Timing
Vsync Timing
Note: DE mode only
Note: Typical value refer to VESA STANDARD
Note*: Horizontal Blanking do not set between 173~195, they will cause ASIC signal error.
Horizontal
blanking(Note*)
Horizontal period Th 1320 1408 2040 Tclk
Vertical active Tvd 720 720 720 Th
Vertical blanking Tvbl 10 16 220 Th
Vertical period Tv 730 736 940 Th
Frame Rate F 50 60 75 Hz
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Thbl 50 128 760 Tclk
document version 1.1 20/27
6.4.2 Timing Digram
Product Specification
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document version 1.1 21/27
Product Specification
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6.5 Power ON/OFF Sequence
Vin power and lamp on/off sequence is as follows. Interface signals are also shown in the chart. Signals from any
system shall be Hi-Z state or low level when Vin is off.
Power Supply VDD
LVDS Signal
Backlight On
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Parameter
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T1
90%
10%
T2
T3
VALID
DATA
T4
90%
T5
T6
10%
T7
Power Sequence Timing
Value
Min. Typ. Max.
Unit
T1 0.5 - 10 [ms]
T2 30 40 50 [ms]
T3 200 - - [ms]
T4 100 - - [ms]
T5 0 16 50 [ms]
T6 - - 10 [ms]
T7 1000 - - [ms]
document version 1.1 22/27
Product Specification
AU OPTRONICS CORPORATION
7. Connector & Pin Assignment
Physical interface is described as for the connector on module.These connectors are capable of
accommodating the following signals and will be following components.
7.1 TFT LCD Module
7.1.1 Connector
Connector Name / Designation Interface Connector / Interface card
Manufacturer STM/ P-Two
Type Part Number MSB240420E/ 185066-20121
Mating Housing Part Number P240420
7.1.2 Pin Assignment
Pin# Signal Name Pin# Signal Name
1
3
5
7
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9
11
13
15
17
19
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VDD
VSS
Rin0-
VSS
Rin1+
Rin2-
VSS
ClkIN+
Rin3-
VSS
2 VDD
4 VSS
6
8 Rin1-
10 VSS
12 Rin2+
14
16 VSS
18 Rin3+
20 VSS
Rin0+
ClkIN-
document version 1.1 23/27
Product Specification
AU OPTRONICS CORPORATION
7.2 Backlight Unit
Physical interface is described as for the connector on module. These connectors are capable of
accommodating the following signals and will be following components.
Connector Name / Designation Lamp Connector / Backlight lamp
Manufacturer CviLux
Type Part Number CP0502SL09
Mating Type Part Number
7.2.1 Signal for Lamp connector
Connector No. Pin No. Input Color Function
1 Hot1 Pink High Voltage
2 Cold1 White Low Voltage
1 Hot1 Pink High Voltage
2 Cold1 White Low Voltage
Upper
Lower
CN1
Connector No. Pin No. Input Color Function
CN2
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CP0502P1ML0-LF
document version 1.1 24/27
Product Specification
AU OPTRONICS CORPORATION
8. Reliability Test
Items Required Condition
Temperature Humidity Bias (THB) Ta= 50, 80%RH, 300hours℃
High Temperature Operation (HTO) Ta= 50, 50%RH, 300hours℃
Low Temperature Operation (LTO) Ta= 0, 300hours℃
High Temperature Storage (HTS) Ta= 60, 300hours℃
Low Temperature Storage (LTS) Ta= -20, 300hours℃
Vibration Test
(Non-operation)
Shock Test
(Non-operation)
Acceleration: 1.5 G
Wave: Random
Frequency: 10 - 200 - 10 Hz
Sweep: 30 Minutes each Axis (X, Y, Z)
Acceleration: 50 G
Wave: Half-sine
Active Time: 20 ms
Direction: ±X, ±Y, ±Z (one time for each Axis)
Note 1: The TFT-LCD module will not sustain damage after being subjected to 100 cycles of rapid temperature change. A
cycle of rapid temperature change consists of varying the temperature from -20 to 60, and back again. Power ℃℃
is not applied during the test. After temperature cycling, the unit is placed in normal room ambient for at least 4
hours before power on.
Note 2: According to EN61000-4-2 , ESD class B: Some performance degradation allowed. No data lost.