AU Optronics B154EW04-V7 Product Specification

Product Specification

AU OPTRONICS CORPORATION

B154EW04 V7 (QD15TL04 Rev.03)

( ) Preliminary Specifications (V ) Final Specifications

Module

Model Name

Customer Date

Checked & Approved by

www.jxlcd.com

15.4” WXGA Color TFT-LCD

B154EW04 V7 (QD15TL04 REV.03)

Approved by Date

Beyond Yang

Prepared by

5/29/2007

Note: This Specification is subject to

change without notice.

Amy Tu 5/29/2007

MDBU Marketing Division / AU Optronics corporation

QD15TL04 Page

These specification sheets are the proprietary product of AUO and include materials

protected under copyright of AUO. Do not reproduce or cause any third party to reproduce

them in any form or by any means, electronic or mechanical, for any purpose, in whole or in

part, without the express written permission of AUO.

The device listed in these technical literature sheets was designed and manufactured for use

in OA equipment.

In case of using the device for applications such as control and safety equipment for

transportation (aircraft, trains, automobiles, etc.), rescue and security equipment and various

safety related equipment which require higher reliability and safety, take into consideration

that appropriate measures such as fail-safe functions and redundant system design should

be taken.

Do not use the device for equipment that requires an extreme level of reliability, such as

aerospace applications, telecommunication equipment (trunk lines), nuclear power control

1

equipment and medical or other equipment for life support.

AUO assumes no responsibility for any damage resulting from the use of the device, which

does not comply with the instructions, and the precautions specified in these technical

literature sheets.

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Contact and consult with a AUO sales representative for any questions about this device.

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Revision History

REV. Date ECN NO. Change Content

0 5/23/2005 N/A Preliminary Specification Initiation

QD15TL04 Page

2

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QD15TL04 Page

1. Application

This specification applies to a color TFT-LCD module, QD15TL04.

2. Overview

This module is a color active matrix LCD module incorporating amorphous silicon TFT

(Thin Film Transistor). It is composed of a color TFT-LCD panel; driver ICs, control circuit and

power supply circuit and a backlight unit. Graphics and texts can be displayed on a 1280×3

3

×

800 dots panel with 262,144 colors by using LVDS (L

interface and supplying +3.3V DC supply voltage for TFT-LCD panel driving and supply

voltage for backlight.

The TFT-LCD panel used for this module has very high aperture ratio. A low-reflection and

higher-color-saturation type color filter is also used for this panel. Therefore, high-brightness

and high-contrast image, which is suitable for the multimedia use, can be obtained by using

this module.

Optimum viewing direction is 6 o'clock.

[Features]

1) High aperture panel; high-brightness or low power consumption.

2) Brilliant and high contrast image.

3) Small footprint and thin shape.

4) Light weight.

5) Wide Screen 15.4” WXGA

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3. General Specifications

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ow Voltage Differential Signaling) to

Parameter Specifications Unit

Display size 390.1 (15.4”) Diagonal mm

Active area 331.2×207.0 mm

Pixel format 1280 (H)×800 (V) Pixel

(1 pixel = R+G+B dots)

Pixel pitch 0.2588(H) × 0.2588 (V) mm

Pixel configuration R, G, B vertical stripe

Display mode Normally white

Unit outline dimensions (typ.)*1 344.5(W)×222.5 (H)×6.35(T)max. mm

Mass 585 max. g

Surface treatment Haze 0; Hardness 3H; Low reflection

*1.Note: excluding backlight cables. Outline dimensions are shown in this specification.

QD15TL04 Page

4. Input Terminals

4-1. TFT-LCD panel driving CN1 (1 channel, LVDS signals – NSC/Ti standard and +3.3V DC power supply)

Using connector: FI-XB30Sx-HFxx/FI-X30Sx-HFxx/equivalent (JAE)

Interface Cable Pin Assignments

PIN NO . SYMBOL FUNCTION

1 VSS Ground

2 VDD Power Supply, 3.3 V (typical)

3 VDD Power Supply, 3.3 V (typical)

4 V EEDID DDC 3.3V power

5 TEST EDID Enable

6 Clk EEDID DDC Clock

7 DATA EEDID DDC Data

8 Rin0- - LVDS differential data input (R0-R5, G0) (odd pixels)

9 Rin0+ + LVDS differential data input (R0-R5, G0) (odd pixels)

10 VSS Ground

4

11 Rin1- - LVDS differential data input (G1-G5, B0-B1) (odd pixels)

12 Rin1+ + LVDS differential data input (G1-G5, B0-B1) (odd pixels)

13 VSS Ground

14 Rin2- - LVDS differential data input (B2-B5, HS, VS, DE) (odd pixels)

15 Rin2+ + LVDS differential data input (B2-B5, HS, VS, DE) (odd pixels)

16 VSS Ground

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17 ClkIN- - LVDS differential clock input (odd pixels)

18 ClkIN+ + LVDS differential clock input (odd pixels)

19 VSS Ground

20 NC No connect

21 NC No connect

22 NC No connect

23 NC No connect

24 NC No connect

25 NC No connect

26 NC No connect

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27 NC No connect

28 NC No connect

29 NC No connect

30 NC No connect

[Note 1] Relation between LVDS signals and actual data shows below section (4-2).

[Note 2] The shielding case is connected with signal GND.

4-2 Interface block diagram

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5

Using receiver：DS90CF364(National semiconductor) Corresponding Transmitter：DS90C363,DS90C383(National semiconductor

Controller

R0～R5

G0～G5

B0～B5

Hsync

Vsync

ENAB

（Computer side）

TxIN 0～ 5

6

TxIN 6～11

6

TxIN12～17

CLK

DS90C*363

RXIN0+(6)

RXIN0-(5)

RXIN1+(9)

RXIN1-(8)

TxIN18

TxIN19

TxIN20

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TxCLK IN

TTL PARALLEL-TO-LVDS

PLL

RXIN2+(12)

RXIN2-(11)

RXCLKIN+(1)

RXCLKIN-((14)(14)

DS90CF364

PLL

(TFT-LCD side)

RxOUT0～5

RxOUT6～11

RxOUT12～17

RxOUT18

RxOUT19

RxOUT20

LVDS-TO-PARALLEL TTL

RxCLK OUT

6

R0～R5

6

G0～G5

6

B0～B5

Hsync

Vsync

ENAB

CK

）

Internal circuits

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4-3. Inverter connector pin assign

CN3:(Inverter signals and Inverter Power Supply)

Using connector: LVC-D20SYFG (HONDA)

Corresponding connector: LVC-D20LVM-SG (HONDA)

Pin no. Symbol Function

1,2,3 INV SRC Input voltage

4 N.C No connect

5,8,11,13 GND Ground

6 5VSUS System +5V voltage (Inverter no use)

7 5VALW Dallas IC VCC Voltage

9 SDA Brightness control data signal (SMBUS DATA)

10 SCL Brightness control clock signal (SMBUS CLOCK)

12 FPBACK Control signal input into the inverter turning BLU

14 LAMP_STAT Lamp Status

15 N.C. No connect

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7

16 N.C. No connect

17 N.C. No connect

18 N.C. No connect

19 N.C. No connect

20 N.C. No connect

5. Absolute Maximum Ratings

5-1 LCD module

[Note1] LVDS signals

[Note2] Humidity：95%RH Max. at Ta≦40℃.

Maximum wet-bulb temperature at 39℃ or less at Ta>40℃.

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Parameter Symbol Condition Ratings Unit Remark

Input voltage

+3.3V supply voltage VDD Ta=25℃ 0 ～＋ 4

Storage temperature Tstg

Operating temperature (Ambient) Topa

VI

Ta=25

－

0.3 ～ VDD+0.3

℃ －

－25 ～＋60

0 ～＋50

Ｖ

℃

[Note1]

[Note2]

No condensation.

QD15TL04 Page

5-2 Inverter driving

5-2.1 Backlight lifetime

The backlight system is an edge-lighting type with single CCFT (Cold Cathode

Fluorescent Tube).

The lifetime of the lamp are shown in the following table.

Parameter Symbol Min. Typ. Max. Unit Remark

Lamp life time LL 20000 - - Hour [Note]

[Note] Lamp life time is defined as the time when X occurs in the continuous

operation under the condition of Ta = 25℃ and SDA data=00HEX

X Brightness becomes 50% of the original value under standard condition.

5-2.2 Recommended Operation Condition

Parameter Symbol Min. Typ Max Unit

8

Inverter power supply

voltage

Base of Brightness

control voltage

Brightness control IC

supply voltage

Logic signals SDA, SCL

5-2.3 DC Electrical Conditions Ta=25℃

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Parameter Symbol Condition Min. Typ Max Unit Remark

Brightness control IC

Vin 7.5 - 21 V

VBB 4.85 5.0 5.2 V

VBC 4.5 5.0 5.5 V

0 5 V

FPVEE

IVin VIN=7.5V,VBB=5V - 450 585 VIN supply current

VIN=21V,VBB=5V

200 -

IVbc VBC=4.5~5.5V - - 200 uA

300

mA Note

supply current

Input voltage

SDA

SCL

FPVEE

Note: Brightness control from minmum to maximum

low

Input voltage

high

Input voltage

low

Input voltage

high

Vil VBC=4.5~5.5V - -

Vih VBC=4.5~5.5V

Vil VIN=7.5~21V 0 - 0.6

Vih VIN=7.5~21V 3.0 - 5.0 V

0.7×

VBC

0.3×

VBC

- - V

V

QD15TL04 Page

V

N

t

9

5-2.4. Power ON/OFF sequence

7.5V≦Vin<21V

10ms≦td

5-2.5 FPVEE ON sequence

Backlight power on/off is possible with FPVEE.

Make sure to have more than 50-millisecond interval between each power-on.

50ms≦t1

t2≦20ms

5-2.6 The Condition of Shut Down

Please refer to the figure below for the conditions that will cause the inverter shut down.

FPVEE

0V O ff

FPVEE

Vin

7.2V

t1

td

On

3.0V

0.6V

t2

If the Vin voltage is higher than 8.0V but there is no enable signal, then the inverter will

shut down.

If the Vin voltage is down less than 8.0V, it will cause the inverter shut down.

The enable signal has to be reset to get the inverter started again.

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5-2.7 Brightness Control

Vin shut down voltage 7.2V

Vin

FPVEE

Output Current

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7.2

ON

0V OFF

0.6V

o Outpu

SDA data Brightness Notes

3.0

00HEX Maximum Brightness Set on power-up

01~FEHEX

FFHEX Minimum Brightness

↓

QD15TL04 Page

6. Electrical Characteristics

6-1.TFT-LCD panel driving Ta＝25℃

Parameter Symbol Min. Typ. Max. Unit Remark

VDD Supply voltage VDD +3.0 +3.3 +3.6 Ｖ

Current dissipation IDD －

Permissive input ripple voltage

Differential input High

Threshold voltage Low

Terminal resistor

Rush current I

[Note1] VCM : Common mode voltage of LVDS driver.

[Note2]

On-off conditions for supply voltage

V

RP

V

TH

V

TL

R

T

RUSH

－－

–100 －

－

1.5 A Rise time

400 600 ｍＡ

－－ +100 mV V

100 －

100 mV p-p Vcc=+3.3V

－

mV [Note1]

Ω Differential

input

470uS

[Note2]

[Note3]

=+1.2V

CM

10

0＜t1≦10 ms

10%

90%

t1

t2

t5

t

d

RGB

GS59

t6

RGB

GS63

0＜t2≦50 ms

0＜t3≦50 ms

400 ms≦t4

200 ms≦t5

200 ms≦t6

Vcc-dip conditions

1) 2.5 V≦Vcc＜3.0 V td≦10 ms

2) Vcc＜2.5 V

Vcc-dip conditions should also follow the On-off conditions for supply voltage

[Note3] Typical current situation : 16-gray-bar pattern.

VDD=+3.3V

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RGB

GS0

VDD

DATA

CCFL

RGB

GS3

RGB

GS7

t3

90%

10%

t4

10%

vcc

3.0V

2.5V

QD15TL04 Page

6-2. Backlight driving

The backlight system is an edge-lighting type with single CCFT (Cold Cathode

Fluorescent Tube).

The characteristics of the lamp are shown in the following table.

Parameter Symbol Min. Typ. Max. Unit Remark

Lamp current range IL 3.0 6.0 7.0 mArms [Note1]

Lamp voltage V L 657 730 803 Vrms

Lamp power consumption

Lamp frequency F

Kick-off voltage Vs

Lamp life time L

[Note1] Lamp current is measured with current meter for high frequency as shown below.

Module

PL

54 60 66 kHz [Note3]

L

15000

L

－

－－

1

2

4.38

－－－

－

1650 Vrms Ta=25 1920 Vrms Ta=0

－

Ｗ I

hour [Note5]

Inverter

6.0mA [Note2]

L=

A

℃

[Note4]

11

[Note2] Calculated Value for reference ( I

[Note3] Lamp frequency may produce interference with horizontal synchronous frequency,

[Note4] The voltage above this value should be applied to the lamp for more than 1 second to

[Note5] Lamp life time is defined as the time when either ① or ② occurs in the continuous

① Brightness becomes 50 % of the original value under standard condition.

② Kick-off voltage at Ta = 0℃ exceeds maximum value.

Note) The performance of the backlight, for example life time or brightness, is much

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and this may cause beat on the display. Therefore lamp frequency shall be

detached as much as possible from the horizontal synchronous frequency and

from the harmonics of horizontal synchronous to avoid interference.

start-up. Otherwise the lamp may not be turned on.

operation under the condition of Ta = 25℃ and I

influenced by the characteristics of the DC-AC inverter for the lamp. When you

design or order the inverter, please make sure that a poor lighting caused by the

mismatch of the backlight and the inverter (miss-lighting, flicker, etc.) never occur.

When you confirm it, the module should be operated in the same condition as it is

L × V L)

= 6.0 mArms.

L

installed in your instrument.

7. Timing characteristics of LCD module input signals

7-1. Timing characteristics

(This is specified at digital outputs of LVDS driver.)

Data

QD15TL04 Page

12

ENAB

Sync

（ Vertical ）

Item（symbol）

Vsync cycle (TVA)

Blanking period(TVB) 8 16

Sync pulse width (TVC) 2 4

Back porch (TVD) 5 8

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Sync pulse width + Back

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porch

Active display area (TVE) 800 800 800 line

Front porch (TVF) 1 4

Ｃ

808 816 850 line

(TVC+TVD)

ＤＥＦ

Ａ

Min. Typ. Max. Unit Remark

－

7 12

16.667

－

－－

－

ms Negative

line

Ｂ

( Horizontal )

Item（symbol）

Hsync cycle (THA)

1380 1408 1428 clock

Blanking period (THB) 100 128

Sync pulse width (THC) 16 32

Back porch (THD) 68 75

Sync pulse width + Back

porch (T

Active display area (THE) 1280 1280 1280 clock

Front porch (THF) 16 21

（Clock ）

Frequency 67.0 68.9 72.0 MHz [Note1]

Note) In case of lower frequency, the deterioration of display quality, flicker etc., may be

occurred.

+THD)

HC

Item Min. Typ. Max. Unit Remark

Min. Typ. Max. Unit Remark

－

84 107

20.44

－ μs

－－－－

－

clock

Negative

7-2. Input Data Signals and Display Position on the screen

QD15TL04 Page

13

D1, DH1

D1, DH2 D2, DH2

D1,DH768

D2, DH1

D3, DH1

R

D1024,DH1

G B

D1024,DH768

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8. Input Signals, Basic Display Colors and Gray Scale of Each Color

QD15TL04 Page

14

Colors &

Gray scale Gray

Scale

Black －

Blue －

Basic Color Gray Scale of Red Gray Scale of Green Gray Scale of Blue

Green －

Cyan －

Red －

Magenta －

Yellow －

White －

Black GS0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Darker GS2 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

×

Ø

GS1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

È

R0 R1 R2 R3 R4 R5 G0 G1 G2 G3 G4 G5 B0 B1 B2 B3 B4 B5

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1

0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0

0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1

1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0

1 1 1 1 1 1 0 0 0 0 0 0 1 1 1 1 1 1

1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

È

Data signal

È

Brighter GS61 1 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0

Red GS63 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0

Black GS0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Darker GS2 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0

Brighter GS61 0 0 0 0 0 0 1 0 1 1 1 1 0 0 0 0 0 0

Green GS63 0 0 0 0 0 0 1 1 1 1 1 1 0 0 0 0 0 0

Black GS0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Darker GS2 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0

Ø

×

Ø

×

Ø

GS62 0 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0

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GS1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0

È

GS62 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 0

GS1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0

È

Brighter GS61 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1

Blue GS63 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1

0 : Low level voltage, 1 : High level voltage

Each basic color can be displayed in 64 gray scales from 6 bit data signals. According to the

combination of total 18 bit data signals, the 262,144-color display can be achieved on the screen.

Ø

GS62 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1

QD15TL04 Page

9.EDID data structure

This is the EDID (Extended Display Identification Data) data format to support displays as

defined in the VESA Plug & Display.

Byte Byte Value Value

(decimal) (hex)

0 00

1 01

2 02

3 03

4 04

5 05

6 06

7 07

8 08

9 09

10 0A

11 0B

12 0C

13 0D

14 0E

15 0F

16 10

17 11

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18 12

19 13

20 14

21 15

22 16

23 17

24 18

25 19

26 1A

27 1B

28 1C

29 1D

30 1E

31 1F

32 20

33 21

34 22

35 23

36 24

37 25

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Header 00 00000000

Header FF 11111111

Header 00 00000000

EISA manufacture code = QDS 44 01000100

EISA manufacture code (Compressed ASCII) 93 10010011

Product code: 0070 (N15W6A) 46 01000110

Product code 00 00000000

LCD module Serial No (fixed ”0”) 00 00000000

Week of manufacture 00 00000000 Year of manufacture – 1990 (ex2000-1990=10), 2005-

1990=15=F (hex) EDID structure version # = 1 01 00000001

EDID revision # = 3 03 00000011

Video I/P definition = Digital I/P 80 10000000

Max H image size (cm) = 33cm 21 00100001

Max V image size (cm) = 21cm 15 00010101

Display gamma ( 2.2×100 ) –100= 120

Feature support (no DMPS, Active off, RGB, timing BLK1)

Red/Green Low bit 47 01000111

Blue/White Low bit 99 10011001

Red X (Rx)(written value “0.580”) 94 10010100

Red Y (Ry)(written value “0.340”) 57 01010111

Green X (Gx)(written value “0.310”) 4F 01001111

Green Y (Gy)(written value “0.550”) 8C 10001100

Blue X (Bx)(written value “0.156”) 27 00100111

Blue Y (By)(written value “0.129”) 21 00100001

White X (Wx)(written value “0.313”) 50 01010000

White Y (Wy)(written value “0.329”) 54 01010100

Established timings 1 00 00000000

Established timings 2 00 00000000

Established timings 3 (Manufacture’s reserved timing) 00 00000000

Field Name and Comments

(hex) (binary)

0F

0A 00001010

00001111

78 01111000

15

38 26

39 27

40 28

41 29

42 2A

43 2B

44 2C

45 2D

46 2E

47 2F

48 30

49 31

50 32

51 33

52 34

53 35

54 36

55 37

56 38

57 39

58 3A

59 3B

60 3C

61 3D

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62 3E

63 3F

64 40

65 41

66 42

67 43

68 44

69 45

70 46

71 47

72 48

73 49

74 4A

75 4B

76 4C

77 4D

78 4E

79 4F

80 50

Standard timing ID1 01 00000001

Standard timing ID2 01 00000001

Standard timing ID3 01 00000001

Standard timing ID4 01 00000001

Standard timing ID5 01 00000001

Standard timing ID6 01 00000001

Standard timing ID7 01 00000001

Standard timing ID8 01 00000001

Pixel Clock/10,000 (LSB) BC 10111100

Pixel Clock/10,000 (MSB) 1B 00011011

Horizontal Active 00 00000000

Horizontal Blanking (Thbp) A0 10100000

Horizontal Active/Horizontal Blanking (Thbp) 50 01010000

Vertical Active 20 00100000

Vertical Blanking (Tvbp) 17 00010111

Vertical active/Vertical blanking (Tvbp) 30 00110000

Horizontal Sync, Offset (Thfp) 30 00110000

Horizontal Sync, Pulse Width 20 00100000

Vertical Sync, Offset (Tvfp)/Sync Width 26 00100110

Horizontal Vertical Sync Offset/Width upper 2 bits 00 00000000

Horizontal Image Size 4B 01001011

Vertical Image Size CF 11001111

Horizontal Image Size / Vertical Image Size 10 00010000

Horizontal Border 00 00000000

Vertical Border 00 00000000 Non-interlaced, Normal, no stereo, Separate sync, H/V

pol Negatives, DE only note: LSB is set to “1” if panel is DE-timing only. H/V can be ignored.

Flag 00 00000000

Data Type Tag: Descriptor Defined by Manufacturer 0F 00001111

Flag 00 00000000

Value = HSPW

Value = Thbp

/2 (pixel clks) 08 00001000

min

/2 (pixel clks) 00 00000000

max

/2 (pixel clks) 2A 00101010

min

/2 (pixel clks) 00 00000000

max

QD15TL04 Page

18 00011000

16

81 51

82 52

83 53

84 54

85 55

86 56

87 57

88 58

89 59

90 5A

91 5B

92 5C

93 5D

94 5E

95 5F

96 60

97 61

98 62

99 63

100 64

101 65

102 66

103 67

104 68

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105 69

106 6A

107 6B

108 6C

109 6D

110 6E

111 6F

112 70

113 71

114 72 SMBUS Value=17nits

115 73

116 74

117 75

118 76

119 77

120 78

121 79

122 7A

123 7B

Value = VSPW

Value = Tvbp

= value*2 + HA

Thp

min

Thp

Tvp

Module “A” Revision =0 00 00000000

Flag 00 00000000

Dummy Descriptor FE 11111110

Flag 00 00000000

Dell PN Character G 47 01000111

Dell PN Character D 44 01000100

Dell PN Character 7 37 00110111

Dell PN Character 3 33 00110011

Dell PN Character 8 38 00111000

LCD Supplier EEDID Reversion # 00 00 00000000

Manufacturer PN 00 00000000

Manufacturer PN 00 00000000 Manufacturer P/N (if <13 char, then terminate with ASCII

code 0Ah, set remaining char =20h) Flag 00 00000000

Flag 00 00000000

Data Type Tag ASCII String FE 11111110

Flag 00 00000000

SMBUS Value=10nits E0 11100000

SMBUS Value=24nits C0 11000000

SMBUS Value=30nits B8 10111000

SMBUS Value=60nits 98 10011000

SMBUS Value=110nits 68 01101000

SMBUS Value=150nits 40 01000000

SMBUS Value=max nits (Typical=00h) 00 00000000

Number of LVDS receiver chips 01 00000001

Panel type-EDID Enable 01 00000001 (If<13 char, then terminate with ASCII code 0Ah, set

remaining char=20h)

= value*2 + HA

max

= value*2 + VA

min

= value*2 + VA

max

/2 (line pulses) 01 00000001

min

/2 (line pulses) 00 00000000

max

/2 (line pulses) 04 00000100

min

/2 (line pulses) 00 00000000

max

pixel clks

pixel clk

lines

(pixel clks) 32 00110010

(pixelclks) 4A 01001010

(line pulses) 04 00000100

(line pulses) 14 00010100

QD15TL04 Page

00 00000000

D0 11010000

0A 00001010

17

124 7C

125 7D

126 7E

127 7F

QD15TL04 Page

(If<13 char, then terminate with ASCII code 0Ah, set remaining char=20h)

Extension flag 00 00000000

Checksum 5F 01011111

20 00100000

18

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10. Optical Characteristics

QD15TL04 Page

19

Ta=25

Parameter Symbol Condition Min. Typ. Max. Unit Remark

Viewing Horizontal

Angle Vertical θ11 10

Range θ12 30

Contrast ratio

Response Rise Tr

Time Decay Td

Chromaticity of Wx 0.295 0.315 0.335 [Note4]

White Wｙ 0.310 0.330 0.350

Chromaticity of

Red

Chromaticity of

Green

Chromaticity of

Blue

21,θ22 CR>10 40

θ

ＣＲ

Rx

Ry

Gx

Gy

Bx

By

n

θ=0°

300 350

－

0.560

0.320

0.290

0.530

0.135

0.110

－

8

17

0.580

0.340

0.310

0.550

0.155

0.130

－

0.600

0.360

0.330

0.570

0.175

0.150

℃

, Vcc=+3.3V

Deg. [Note1,4]

Deg.

[Note2,4]

ms [Note3,4]

ms

Luminance of white

[Note4]

White Uniformity

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The optical characteristics shall be measured in a dark room or equivalent state with the method

shown in Fig.3.

Photodetector (BM-5A: TOPCON)

TFT-LCD module

ＹＬ２

δＷ

5 Points 150 165

5 Points

13 Points

Field=2o

－

Cd/m2 IL = 6.0

－

mArms

F

=55kHz

L

－

400 mm

20%

35%

LCD Panel

[Note5]

Fig 3. Optical characteristics measurement method

Center of the screen

[

V

Note1] Definitions of viewing angle range:

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20

[Note2] Definition of contrast ratio:

The contrast ratio is defined as the following.

Contrast Ratio (CR) =

[Note3] Definition of response time:

6 o’clock direction

Normal Direction

θ22

θ21

θ11

θ12

Luminance (brightness) with all pixels white Luminance (brightness) with all pixels black

The response time is defined as the following figure and shall be measured by

switching the input signal for "black" and "white" .

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100%

(Relative Value)

[Note4] This shall be measured at center of the screen.

[Note5] Definition of white uniformity:

Maximun Lum (5p/13p) - Minimum Lum

Photodetector Output

White

90%

10%

0%

τr

Time

δw =

Maximum Lum (5/13p)

A

White Black

τd

H

D

1/4V

1/4V 1/4V

*1) 5 Points are A,B,C,D,E

B

C

E

1/4V

QD15TL04 Page

11. Display Quality

The display quality of the color TFT-LCD module shall be in compliance with the Incoming

Inspection Standard.

12. Handling Precautions

a) Be sure to turn off the power supply when inserting or disconnecting the cable.

b) Be sure to design the cabinet so that the module can be installed without any extra

stress such as warp or twist.

c) Since the front polarizer is easily damaged, pay attention not to scratch it.

d) Wipe off water drop immediately. Long contact with water may cause discoloration or

spots.

e) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.

f) Since the panel is made of glass, it may break or crack if dropped or bumped on hard

surface. Handle with care.

g) Since CMOS LSI is used in this module, take care of static electricity and injure the

human earth when handling.

21

h) Observe all other precautionary requirements in handling components.

i) This module has its circuitry PCBs on the rear side and should be handled carefully in

order not to be stressed.

j) Laminated film is attached to the module surface to prevent it from being scratched.

Peel the film off slowly just before the use with strict attention to electrostatic

charges. Ionized air shall be blown over during the action. Blow off the 'dust' on the

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polarizer by using an ionized nitrogen gun, etc..

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K) Mounting screw hole can stand torque 1.3~1.5 Kgf-cm.

13. Reliability test items

Test item Conditions

No.

1 High temperature storage test Ta = 60℃ 240h

2 Low temperature storage test Ta = -25℃ 240h

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22

3 High temperature

& High humidity operation test

4 High temperature operation test Ta = 50℃ 240h

5 Low temperature operation test Ta = 0℃ 240h

6 Vibration test

(non- operating)

7 Shock test

(Non- operating)

Remark:

(1) A failure is defined as the appearance of pixel failured on any color layer or the

appearance of horizontal or vertical lines, bars etc.

(2) Low temperature storage “ Panel must return to operating temperature range prior to

Ta = 40℃ ; 90 %RH 240h ; (As remark #3)

(No condensation)

(The panel temp. must be less than 60℃)

Frequency: 10～500Hz, 1.5G, Test period : 3 hours

(1 hour for each direction of X,Y,Z)

Max. Gravity: 220G

Pulse width: 2 ms, Half sine wave

Direction : ±X,±Y,±Z

Once for each direction.

activation.”

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(3) Hi temperature / Humidity test

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o

Max. wet-bulb temperature is less than 39

Temperature and relative humidity range is shown in the figure below.

Relative Humidity (% RH)

100

80

60

Operating Range

40

-60

20

-40 -20

Temperature (oC)

Storage Range

0

C ; At glass temperature high than 40 oC.

20

40 60

80

14. Others

1) Lot No. Label:

QD15TL04 Page

23

2) Adjusting volume has been set optimally before shipment, so do not change any

adjusted value. If adjusted value is changed, the specification may not be satisfied.

3) Disassembling the module can cause permanent damage and should be strictly

avoided.

4) Please be careful since image retention may occur when a fixed pattern is displayed

for a long time.

5) If any problem occurs in relation to the description of this specification, it shall be

resolved through discussion with spirit of cooperation.

Serial number Product Name

JFC1171000001 QD15TL04 Rev.03

01

Serial Number Bar Code

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15. Mechanical Outline Dimension

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QD15TL04 Page

24

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QD15TL04 Page

25

QD15TL04 Page

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AU Optronics B154EW04-V7 Product Specification

Specifications and Main Features

Frequently Asked Questions

User Manual