5.2 Backlight Unit ...................................................................................................................................15
6. Signal Characteristic ............................................................. 16
6.1 Pixel Format Image ...........................................................................................................................16
6.2 The input data format ........................................................................................................................17
6.3 Signal Description/Pin Assignment...................................................................................................18
9. Vibration and Shock Test ...................................................... 27
9.1 Vibration Test ....................................................................................................................................27
9.2 Shock Test Spec:................................................................................................................................27
0.5 2008/2/27 5 Power consumption to 4.9W(max) Total Power consumption <4.2W
0.6 2008/3/12 24 LED Power ON/OFF Sequence Add Panel Power ON/OFF Sequence
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Modify (1) Pixel Format Image
(2) LCM Outline drawing
(3) Pin assignment
(4) Power Consumption
(5) Logic Power Consumption
(6) EDID code
Old description New Description Remark
(1) Modify RGB orders
(2) Modify connector position
(3) Modify Pin assignment 30~40
(4) Total Power Consumption=4.9W
(5) Logic Power Consumption=1.1W
(6) Update EDID code
te
(1)Pin assigment (1) Update Pin assigment
exclused the conversion efficiency
B141EW05 V0 Document Version: 0.6
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Product Specification
1. Handling Precautions
1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration or
spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard
surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure
human earth when handling.
7) Do not open nor modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor
tilt the Interface Connector of the TFT Module.
AU OPTRONICS CORPORATION
11) After installation of the TFT Module into an enclosure (Notebook PC Bezel, for
example), do not twist nor bend the TFT Module even momentary. At designing the
enclosure, it should be taken into consideration that no bending/twisting forces are
applied to the TFT Module from outside. Otherwise the TFT Module may be
damaged.
12) Small amount of materials having no flammability grade is used in the LCD module. The
LCD module should be supplied by power complied with requirements of Limited Power
Source (IEC60950 or UL1950), or be applied exemption.
13) Disconnecting power supply before handling LCD modules, it can prevent electric shock, DO
NOT TOUCH the electrode parts, cables, connectors and LED circuit part of TFT module
that a LED light bar build in as a light source of back light unit. High voltage is supplied to
these parts when power turn on.
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B141EW05 V0 Document Version: 0.6
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Product Specification
(Note1)
Thickness
2. General Description
B141EW05 V0 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel, a
driver circuit, and LED backlight system. The screen format is intended to support the WXGA
(1280(H) x 800(V)) screen and 262k colors (RGB 6-bits data driver) with LED backlight driving
circuit. All input signals are LVDS interface compatible.
B141EW05 V0 is designed for a display unit of notebook style personal computer and industrial
machine.
AU OPTRONICS CORPORATION
2.1 General Specification
The following items are characteristics summary on the table at 25 ℃ condition:
Items Unit Specifications
Screen Diagonal [mm] 301.7 (14.1W”)
Active Area [mm] 303.36 X 189.6
Pixels H x V 1280x3(RGB) x 800
Pixel Pitch [mm] 0.237
Pixel Format B.G.R. Vertical Stripe
Display Mode Normally White
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White Luminance (I
Note: I
Luminance Uniformity 1.25 max. (5 points)
Contrast Ratio 500 typ
LED
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is LED current
LED
=20mA)
[cd/m2] 220 typ. (5 points average)
187 min. (5 points average)
Response Time [ms] 8 typ / 12 Max
Nominal Input Voltage VDD [Volt] +3.3 typ.
Power Consumption [Watt] 4.2 max. (Include Logic and Blu power)
Weight [Grams] 375 max.
Physical Size without inverter,
bracket.
Electrical Interface 1 channel LVDS
Surface Treatment Glare, Hardness 3H,
B141EW05 V0 Document Version: 0.6
[mm]
Min. Typ. Max.
Length 319 319.5 320
Width 205 205.5 206
4.8 - 5.5
(Note1)
5 of 36
Product Specification
RoHS Compliance
Support Color 262K colors ( RGB 6-bit )
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Temperature Range
Operating
Storage (Non-Operating)
RoHS Compliance
Note 1. Total power consumption including LED power efficiency <4.9W max.
[oC]
[oC]
0 to +50
-20 to +65
2.2 Optical Characteristics
The optical characteristics are measured under stable conditions at 25℃ (Room Temperature) :
Item Symbol
White Luminance
I
LED
=20mA
Viewing Angle
Luminance
Uniformity
Luminance
Uniformity
Contrast Ratio CR
Cross talk %
Response Time
Color /
Chromaticity
Coodinates
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Red x
Red y
Green x
Green y
Blue x
Blue y
White x
White y
θθθθR
θθθθL
ψψψψH
ψψψψL
δδδδ5P
δδδδ
13P
Tr Rising
Tf Falling
TRT Rising + Falling
Conditions Min. Typ. Max.
5 points average
Horizontal (Right)
CR = 10 (Left)
Vertical (Upper)
CR = 10 (Lower)
5 Points
13 Points
400 500 -
4
CIE 1931
187 220 - cd/m
40
40
10
30
- - 1.25
- - 1.50
-
- TBD -
- 8 12
TBD
TBD
TBD
TBD
TBD
TBD
0.263 0.313 0.363
0.279 0.329 0.379
45
45
15
35
TBD
-
-
-
-
-
Unit Note
2
1, 4, 5.
degree
4, 9
1, 3, 4
2, 3, 4
4, 6
4, 7
msec
4, 8
4
NTSC %
B141EW05 V0 Document Version: 0.6
- 45 -
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Product Specification
=
Maximum Brightness of thirteen points
Minimum Brightness of thirteen points
Maximum Brightness of five
points
=
Minimum Brightness of fiv
e points
Note 1: 5 points position (Ref: Active area)
H /4
H /4
AU OPTRONICS CORPORATION
W / 4W / 4W / 4W / 4
W
12
H
H /4
H /4
Note 2: 13 points position (Ref: Active area)
W /4
1 0
1 0
H /4
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H /4
H
H /4
1
6
3
4
W
W /4
45
W /4
2
7
5
W /4
1 0
3
8
9
H /4
1 0
1 1
1 2
Note 3: The luminance uniformity of 5 or13 points is defined by dividing the maximum luminance values by the
minimum test point luminance
δ
W5
1 0
1 3
δ
Note 4: Measurement method
B141EW05 V0 Document Version: 0.6
W13
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Product Specification
Field=2
°
Contrast ratio (CR)=
Brightness on the “White” state
Brightness on the “Black” state
The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change
during measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight
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for 30 minutes in a stable, windless and dark room, , and it should be measured in the center of screen.
Photo detector
Note 5: Definition of Average Luminance of White (YL):
Measure the luminance of gray level 63 at 5 points,Y
L (x) is corresponding to the luminance of the point X at Figure in Note (1).
Note 6: Definition of contrast ratio:
Note 7: Definition of Cross Talk (CT)
CT = | YB – YA | / YA × 100 (%)
Where
YA = Luminance of measured location without gray level 0 pattern (cd/m2)
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= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
L
Contrast ratio is calculated with the following formula.
B141EW05 V0 Document Version: 0.6
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Product Specification
YB = Luminance of measured location with gray level 0 pattern (cd/m2)
Note 8: Definition of response time:
The output signals of BM-7 or equivalent are measured when the input signals are changed from “Black” to
“White” (falling time) and from “White” to “Black” (rising time), respectively. The response time interval between the
10% and 90% of amplitudes. Refer to figure as below.
AU OPTRONICS CORPORATION
"Black"
100%
S
i
90%
g
n
a
l
(
R
e
l
a
t
i
v
e
v
a
l
u
e
)
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10%
0%
Tr
Tf
"White""White"
B141EW05 V0 Document Version: 0.6
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Product Specification
Note 9. Definition of viewing angle
Viewing angle is the measurement of contrast ratio ≧10, at the screen center, over a 180° horizontal and
180° vertical range (off-normal viewing angles). The 180° viewing angle range is broken down as follows; 90° (θ)
horizontal left and right and 90° (Φ) vertical, high (up) and low (down). The measurement direction is typically
perpendicular to the display surface with the screen rotated about its center to develop the desired measurement
viewing angle.
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B141EW05 V0 Document Version: 0.6
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Product Specification
3. Functional Block Diagram
The following diagram shows the functional block of the 14.1 inches wide Color TFT/LCD 40 Pin (One
ch/connector Module:
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B141EW05 V0 Document Version: 0.6
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Product Specification
4. Absolute Maximum Ratings
An absolute maximum rating of the module is as following:
4.1 Absolute Ratings of TFT LCD Module
Item Symbol Min Max Unit Conditions
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Logic/LCD Drive Voltage
Vin -0.3 +4.0 [Volt] Note 1,2
4.2 Absolute Ratings of Backlight Unit
Item Symbol Min Max Unit Conditions
LED Driving Voltage
LED Driving Current I
V
-
LED
-
LED
36 (Row Output)
30 (Row Output)
[Volt] Note 1,2,3
[mA] rms Note 1,2,3
4.3 Absolute Ratings of Environment
Item Symbol Min Max Unit Conditions
Operating Temperature
Operation Humidity HOP 8 95 [%RH] Note 4
Storage Temperature
Storage Humidity HST
Note 1: At Ta (25℃ )
Note 2: Permanent damage to the device may occur if exceed maximum values
Note 3: LED specification refer to section 5.2
Note 4: For quality performance, please refer to AUO IIS (Incoming Inspection Standard).
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TOP 0 +50 [oC] Note 4
TST -20 +65 [oC] Note 4
5 95
Twb=39°C
[%RH]
Note 4
Operating Range
B141EW05 V0 Document Version: 0.6
Storage Range
12 of 36
Product Specification
Voltage
-
90%
10%
5. Electrical characteristics
5.1 TFT LCD Module
5.1.1 Power Specification
Input power specifications are as follows;
The power specification are measured under 25℃ and frame frenquency under 60Hz
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Symble Parameter Min Typ Max Units
VDD Logic/LCD Drive
PDD VDD Power
IDD IDD Current
I
Rush
Inrush Current
VDDrp Allowable
3.0 3.3 3.6 [Volt]
- 1.1 [Watt] Note 1/2
- 350
- -
- -
450
2000 [mA]
100 [mV]
Logic/LCD Drive
Ripple Voltage
Note 1 : Maximum Measurement Condition:Black Pattern
Input signals shall be low or High-impedance state when VDD is off.
It is recommended to refer the specifications of THC63LVDF84A (Thine Electronics Inc.) in
detail.
Signal electrical characteristics are as follows;
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Parameter
Vth
Vtl
Vcm
Note: LVDS Signal Waveform
V
t
Differential Input High
Threshold (Vcm=+1.2V)
Differential Input Low
Threshold (Vcm=+1.2V)
Differential Input
Common Mode Voltage
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Condition Min Max Unit
Vcm
-
-100
1.125
100
-
1.375
[mV]
[mV]
[V]
B141EW05 V0 Document Version: 0.6
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Product Specification
5.2 Backlight Unit
LED Parameter guideline for LED driving selection (Ref. Remark 1)
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Parameter
LED Forward Voltage VF 2.95 3.15 3.35
LED Forward Current IF 20 30 [mA]
LED Power
consumption
LED Life-Time
Output PWM frequency
Duty ratio
Note 1: Calculator value for reference IF×VF =P
Symbol
P
3.78
LED
N/A 10,000
F
PWM
-- 20 -- 100
Min Typ Max
- -
180 200 220
Units Condition
[Volt]
[Watt]
Hour
Hz
%
(Ta=25℃)
(Ta=25℃)
(Ta=25℃)
Note 1
(Ta=25℃)
IF=20 mA
Note 2
Note 2: The LED life-time define as the estimated time to 50% degradation of initial luminous.
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B141EW05 V0 Document Version: 0.6
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Product Specification
R GB
B
6. Signal Characteristic
6.1 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format.
1
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1280
1st Line
800th Line
R GB B GR
R GB
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R GB R GB
R GB R G
B141EW05 V0 Document Version: 0.6
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Product Specification
Data Clock
6.2 The input data format
Signal Name
R5
R4
R3
R2
R1
R0
Description
Red Data 5 (MSB)
Red Data 4
Red Data 3
Red Data 2
Red Data 1
Red Data 0 (LSB)
Red-pixel Data
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Red-pixel Data
Each red pixel's brightness data consists of
these 6 bits pixel data.
G5
G4
G3
G2
G1
G0
B5
B4
B3
B2
B1
B0
RxCLKIN
DE Display Timing This signal is strobed at the falling edge of
VS Vertical Sync The signal is synchronized to RxCLKIN .
HS Horizontal Sync The signal is synchronized to RxCLKIN .
Note: Output signals from any system shall be low or High-impedance state when VDD is off.
Green Data 5 (MSB)
Green Data 4
Green Data 3
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Green Data 2
Green Data 1
Green Data 0 (LSB)
Green-pixel Data
Blue Data 5 (MSB)
Blue Data 4
Blue Data 3
Blue Data 2
Blue Data 1
Blue Data 0 (LSB)
Blue-pixel Data
Green-pixel Data
Each green pixel's brightness data consists of
these 6 bits pixel data.
Blue-pixel Data
Each blue pixel's brightness data consists of
these 6 bits pixel data.
The signal is used to strobe the pixel data and
DE signals. All pixel data shall be valid at the
falling edge when the DE signal is high.
RxCLKIN. When the signal is high, the pixel
data shall be valid to be displayed.
B141EW05 V0 Document Version: 0.6
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Product Specification
6.3 Signal Description/Pin Assignment
LVDS is a differential signal technology for LCD interface and high speed data transfer device.
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4
4
6
6
7
7
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EDID
EDID
EDID
EDID
EDID
EDID
Ground GND1
Ground GND1
+3.3V Power SupplyVDD2
+3.3V Power SupplyVDD2
+3.3V Power SupplyVDD3
+3.3V Power SupplyVDD3
+3.3V EDID PowerV
+3.3V EDID PowerV
No Connection (Reserve for AUO test)NC5
No Connection (Reserve for AUO test)NC5
EDID Clock InputCLK
EDID Clock InputCLK
EDID Data InputDATA
EDID Data InputDATA
LVDS differential data input(R0-R5, G0)RxIN0-8
LVDS differential data input(R0-R5, G0)RxIN0-8
LVDS differential data input(R0-R5, G0)RxIN0+9
LVDS differential data input(R0-R5, G0)RxIN0+9
Ground GND10
Ground GND10
LVDS differential data input(G1-G5, B0-B1)RxIN1-11
LVDS differential data input(G1-G5, B0-B1)RxIN1-11
LVDS differential data input(G1-G5, B0-B1)RxIN1+12
LVDS differential data input(G1-G5, B0-B1)RxIN1+12
Ground GND13
Ground GND13
LVDS differential data input(B2-B5, HS, VS, DE)RxIN2-14
LVDS differential data input(B2-B5, HS, VS, DE)RxIN2-14
LVDS differential data input(B2-B5, HS, VS, DE)RxIN2+15
LVDS differential data input(B2-B5, HS, VS, DE)RxIN2+15
DescriptionSignal NamePIN#
DescriptionSignal NamePIN#
Ground GND16
Ground GND16
LVDS differential clock inputRxCLKIN-17
LVDS differential clock inputRxCLKIN-17
LVDS differential clock inputRxCLKIN+18
LVDS differential clock inputRxCLKIN+18
Ground GND19
Ground GND19
No Connection (Reserve for AUO test)NC20
No Connection (Reserve for AUO test)NC20
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Product Specification
AU OPTRONICS CORPORATION
DescriptionSignalNamePIN#
DescriptionSignal NamePIN#
NoConnection(ReserveforAUOtest)NC21
No Connection (Reserve for AUO test)NC21
GroundGND22
Ground GND22
NoConnection(ReserveforAUOtest)NC23
No Connection (Reserve for AUO test)NC23
NoConnection(ReserveforAUOtest)NC24
No Connection (Reserve for AUO test)NC24
GroundGND25
Ground GND25
NoConnection(ReserveforAUOtest)NC26
No Connection (Reserve for AUO test)NC26
NoConnection(ReserveforAUOtest)NC27
No Connection (Reserve for AUO test)NC27
GroundGND28
Ground GND28
NoConnection(ReserveforAUOtest)NC29
No Connection (Reserve for AUO test)NC29
NoConnection(ReserveforAUOtest)NC30
No Connection (Reserve for AUO test)NC30
LEDGroundVLED_GND31
LED GroundVLED_GND31
LEDGroundVLED_GND32
LED GroundVLED_GND32
LEDGroundVLED_GND33
LED GroundVLED_GND33
LEDPowerSupply7V-20V VLED34
LED Power Supply 7V-20V VLED34
LEDPowerSupply7V-20V VLED35
LED Power Supply 7V-20V VLED35
LEDPowerSupply7V-20V VLED36
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LED Power Supply 7V-20V VLED36
LEDPowerSupply7V-20V VLED37
LED Power Supply 7V-20V VLED37
SystemPWMsignalInputS_PWMIN38
System PWM signal Input S_PWMIN38
LEDenablepin(+3V input)LED_EN39
LED enable pin (+3V input)LED_EN39
NCNC40
NCNC40
B141EW05 V0 Document Version: 0.6
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1
GND
Note1: Start from right side
Product Specification
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Note2: Input signals shall be low or High-impedance state when VDD is off.
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40
Panel PWM
signal output
B141EW05 V0 Document Version: 0.6
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Product Specification
12
internal circuit of LVDS inputs are as following.
The module uses a 100ohm resistor between positive and negative data lines of each receiver input
Signal Input
Pin No .
8
RxIN0-
9
RxIN0+
11
RxIN1-
RxIN1+
14
RxIN2-
15
RxIN2+
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LVDS Receiver
R
R
R
17
18
RxCLK IN-
RxCLKIN+
R
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B141EW05 V0 Document Version: 0.6
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Product Specification
6.4 Interface Timing
6.4.1 Timing Characteristics
Basically, interface timings should match the 1280x800 /60Hz manufacturing guide line timing.
Parameter Symbol Min. Typ. Max. Unit
Frame Rate - - 60 - Hz
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Clock frequency 1/ T
Vertical
Section
Horizontal
Section
Note : DE mode only
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Period TV 803 816 1023
Active TVD 800 800 800
Blanking TVB 3 16 223
Period TH 1303 1408 2047
Active THD 1280 1280 1280
Blanking THB 23 118 767
- 68.9 - MHz
Clock
T
T
Line
Clock
B141EW05 V0 Document Version: 0.6
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6.4.2 Timing diagram
T
CLOCK
DOTCLK
Input
Data
DE
DE
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Invaild
Data
Product Specification
AU OPTRONICS CORPORATION
Input Timing Definition ( DE Mode)
Pixel
1
T
HB
T
VB
Pixel
2
T
Pixel
3
T
HD
H
T
V
Pixel
N-1
T
VD
Pixel
N
Invaild
Data
Pixel
1
B141EW05 V0 Document Version: 0.6
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Product Specification
6.5 Power ON/OFF Sequence
VDD power on/off sequence is as follows. Interface signals are also shown in the chart. Signals
from any system shall be Hi-Z state or low level when VDD is off
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B141EW05 V0 Document Version: 0.6
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Product Specification
LED on/off sequence is as follows. Interface signals are also shown in the chart.
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Note: The duty of LED dimming signal should be more than 20% in T2 and T3.
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Power Sequence Timing
Symbol
T1
T2
T3
T4
T5
Min Typ Max
10 --- --- ms
10 --- --- ms
50 --- --- ms
0 --- --- ms
10 --- --- ms
Valus
Unit
B141EW05 V0 Document Version: 0.6
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Product Specification
7. Connector Description
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following
components.
7.1 TFT LCD Module
Connector Name / Designation For Signal Connector
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Manufacturer
Type / Part Number
Mating Housing/Part Number
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IPEX
or compatible
IPEX 20347-340E-12
IPEX 20347-340E-12
or compatible
or compatible
B141EW05 V0 Document Version: 0.6
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Product Specification
8. LED Driving Specification
8.1 Connector Description
It is a intergrative interface and comibe into LVDS connector. The type and mating refer to
section 7.
8.2 Pin Assignment
Ref. to 6.3
9. Vibration and Shock Test
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9.1 Vibration Test
Test Spec:
Test method: Non-Operation
Acceleration: 1.5 G , Half sine pulse
Frequency: 5 - 150Hz Random
Sweep: 30 Minutes each Axis (X, Y, Z)
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9.2 Shock Test Spec:
Test Spec:
Test method: Non-Operation
Acceleration: 240 G , Half sine pulse
Active time: 2 ms
Pulse: X,Y,Z .one time for each side
B141EW05 V0 Document Version: 0.6
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10. Reliability
Items
Temperature
Humidity Bias
High Temperature
Operation
Low Temperature
Operation
High Temperature
Storage
Low Temperature
Storage
Thermal Shock
Test
Product Specification
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Required Condition Note
Ta= 40℃℃℃℃, 90%RH, 300h
Ta= 50℃℃℃℃, Dry, 300h
Ta= 0℃℃℃℃, 300h
Ta= 60℃℃℃℃, 300h
Ta= -20℃℃℃℃, 300h
Ta=-20℃℃℃℃to 60℃℃℃℃, Duration at 30 min, 100 cycles
ESD
Note1:
Remark:
According to EN 61000-4-2 , ESD class B: Some performance degradation allowed. No data lost
. Self-recoverable. No hardware failures.
MTBF (Excluding the LED): 30,000 hours with a confidence level 90%
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Contact : ±8 KV
Air : ±15 KV
Note 1
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Product Specification
11. Mechanical Characteristics
11.1 LCM Outline Dimension
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Product Specification
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Product Specification
11.2 Screw Hole Depth and Center Position
Screw hole minimum depth, from side surface = 2.1 mm (See drawing)
Screw hole center location, from front surface = 3.1 ± 0.2mm (See drawing)
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Screw Torque: Maximum 2.5 kgf-cm
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Product Specification
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12. Shipping and Package
12.1 Shipping Label Format
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Product Specification
12.2 Carton package
The outside dimension of carton is 455 (L)mm x 380 (W)mm x 355 (H)mm
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11.3 Shipping package of palletizing sequence
B141EW05 V0 Document Version: 0.6
33 of 36
Product Specification
13. Appendix: EDID description
AU OPTRONICS CORPORATION
Address
HEX
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14
15
16
17
18
19
1A
1B
1C
1D
1E
1F
20
21
22
23
24
25
26
27
28
29
2A
2B
B141EW05 V0 Document Version: 0.6
Video input def.
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www.jxlcd.com
Max H image size
Max V image size
Display Gamma
Feature support
Red/green low bits
Blue/white low bits
FUNCTION Value Value Value
HEX BIN DEC
Header 00 00000000 0
FF 11111111 255
FF 11111111 255
FF 11111111 255
FF 11111111 255
FF 11111111 255
FF 11111111 255
00 00000000 0
EISA Manuf. Code LSB 06 00000110 6
Compressed ASCII AF 10101111 175
Product Code
hex, LSB first
32-bit ser # 00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
Week of manufacture 01 00000001 1
Year of manufacture 11 00010001 17
EDID Structure Ver. 01 00000001 1
EDID revision # 03 00000011 3
(digital I/P, non-TMDS, CRGB)
(rounded to cm)
(rounded to cm)
(=(gamma*100)-100)
(no DPMS, Active OFF, RGB, tmg Blk#1)
(Lower 2:2:2:2 bits)
(Lower 2:2:2:2 bits)
Red x
(Upper 8 bits)
Red y/ highER 8 bits 58 01011000 88
Green x 50 01010000 80
Green y 8E 10001110 142
Blue x 27 00100111 39
Blue y 27 00100111 39
White x 50 01010000 80
White y 54 01010100 84
Established timing 1 00 00000000 0
Established timing 2 00 00000000 0
Established timing 3 00 00000000 0
Standard timing #1 01 00000001 1
01 00000001 1
Standard timing #2 01 00000001 1
01 00000001 1
Standard timing #3 01 00000001 1
01 00000001 1
44 01000100 68
50 01010000 80
80 10000000 128
21 00100001 33
15 00010101 21
78 01111000 120
0A 00001010 10
1C 00011100 28
F5 11110101 245
97 10010111 151
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Product Specification
2C
2D
2E
2F
30
31
32
33
34
35
36
Pixel Clock/10000 LSB
37
Pixel Clock/10000 USB
Horz active
38
Horz blanking
39
3A
3B
3C
3D
4A
4B
4C
4D
5A
HorzAct:HorzBlnk
Vertical Active
Vertical Blanking
Vert Act : Vertical Blanking
3E
3F
40
41
42
43
44
45
46
47
48
49
4E
4F
50
51
52
53
54
55
56
57
58
59
HorzSync. Offset
HorzSync.Width
VertSync.Offset : VertSync.Width
Horz&Vert Sync Offset/Width
Horizontal Image Size
Vertical Image Size
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www.jxlcd.com
Horizontal & Vertical Image Size
Horizontal Border
Vertical Border
Signal
(non-intr, norm, no stero, sep sync, neg pol)
Standard timing #4 01 00000001 1
Standard timing #5 01 00000001 1
Standard timing #6 01 00000001 1
Standard timing #7 01 00000001 1
Standard timing #8 01 00000001 1
Lower 8bits
Lower 8bits
Lower 8bits
Detailed timing/monitor 00 00000000 0
Detailed timing/monitor 00 00000000 0
AU OPTRONICS CORPORATION
01 00000001 1
01 00000001 1
01 00000001 1
01 00000001 1
01 00000001 1
C7 11000111 199
1B 00011011 27
Upper 4:4 bits
Lower 8bits
Lower 8bits
Lower 8bits
(zero for internal LCD)
(zero for internal LCD)
(upper 4:4 bit)
Upper 2bits
(upper 4:4 bits)
descriptor #2 00 00000000 0
00 00000000 0
0F 00001111 15
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
20 00100000 32
00 00000000 0
A0 10100000 160
50 01010000 80
20 00100000 32
17 00010111 23
30 00110000 48
30 00110000 48
20 00100000 32
36 00110110 54
00 00000000 0
4B 01001011 75
CF 11001111 207
10 00010000 16
00 00000000 0
00 00000000 0
18 00011000 24
B141EW05 V0 Document Version: 0.6
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Product Specification
5B
5C
5D
5E
5F
60
61
62
63
64
65
66
67
68
69
6A
6B
6C
6D
6E
6F
70
71
72
73
74
75
76
77
78
79
7A
7B
7C
7D
7E
7F
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www.jxlcd.com
Detailed timing/monitor 00 00000000 0
Manufacture P/N 42 01000010 66
Manufacture P/N 31 00110001 49
Manufacture P/N 34 00110100 52
Manufacture P/N 31 00110001 49
Manufacture P/N 45 01000101 69
Manufacture P/N 57 01010111 87
Manufacture P/N 30 00110000 48
Manufacture P/N 35 00110101 53
Manufacture P/N 20 00100000 32
Manufacture P/N 56 01010110 86
Manufacture P/N 30 00110000 48
AU OPTRONICS CORPORATION
descriptor #3 00 00000000 0
00 00000000 0
FE 11111110 254
00 00000000 0
Manufacture 41 01000001 65
Manufacture 55 01010101 85
Manufacture 4F 01001111 79
0A 00001010 10
20 00100000 32
20 00100000 32
20 00100000 32
20 00100000 32
20 00100000 32
20 00100000 32
20 00100000 32
20 00100000 32
20 00100000 32
descriptor #4 00 00000000 0
00 00000000 0
FE 11111110 254
00 00000000 0
20 00100000 32
0A 00001010 10
Extension Flag 00 00000000 0
Checksum AB 10101011 171
B141EW05 V0 Document Version: 0.6
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