AU Optronics B140RW01-V2 Product Specification

Product Specification
( ( V ) Final Specifications
Module 14.0” HD+ Color TFT-LCD with LED Backlight Displayport
interface design
AU OPTRONICS CORPORATION
Model Name
Note ( )
Customer Date
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Checked &
Approved by
B140RW01 V2 (H/W:1A)
LED Backlight with driving circuit design
Date
Approved by Date
Bonnie Chen
Prepared by
03/03/2010
Note: This Specification is subject to change without notice.
Johnny Tu
NBBU Marketing Division /
AU Optronics corporation
03/02/2010
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Product Specification
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Contents
1. Handling Precautions .............................................................. 4
2. General Description ................................................................ 5
2.1 General Specification ..........................................................................................................................5
2.2 Optical Characteristics ........................................................................................................................6
3. Functional Block Diagram ..................................................... 11
4. Absolute Maximum Ratings................................................... 12
4.1 Absolute Ratings of TFT LCD Module.............................................................................................12
4.2 Absolute Ratings of Environment .....................................................................................................12
5. Electrical characteristics ....................................................... 13
5.1 TFT LCD Module..............................................................................................................................13
5.2 Backlight Unit ...................................................................................................................................19
6. Signal Characteristic ............................................................. 20
6.1 Pixel Format Image ...........................................................................................................................20
6.2 Integration Interface and Pin Assignment..........................................................................................21
7. Connector Description........................................................... 25
7.1 TFT LCD Module..............................................................................................................................25
8. LED Driving Specification ...................................................... 26
8.1 Connector Description.......................................................................................................................26
8.2 Pin Assignment..................................................................................................................................26
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9. Vibration and Shock Test ...................................................... 27
9.1 Vibration Test ....................................................................................................................................27
9.2 Shock Test Spec:................................................................................................................................27
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10. Reliability............................................................................ 28
11. Mechanical Characteristics.................................................. 29
11.1 LCM Outline Dimension.................................................................................................................29
11.2 Screw Hole Depth and Center Position ...........................................................................................31
12. Shipping and Package ......................................................... 32
12.1 Shipping Label Format....................................................................................................................32
12.2 Carton package................................................................................................................................33
12.3 Shipping package of palletizing sequence.......................................................................................34
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Product Specification
ncrease signal cable
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Record of Revision
Version and Date Page
0.1 2008/12/26 ALL
0.2 2009/02/09 ALL Create display port interface
ALL Create display port interface
0.3 2009/02/09
0.4 2009/09/15
0.5 2009/10/ 07 35 Revise EDID
0.6 2010/03/02 17 Revise T2 T3 T9
18 I
32 H/W: 0A H/W: 1A
32 Revise shipping label
Old description New Description Remark
First Edition for Customer
impedance request
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Product Specification
1. Handling Precautions
1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration or spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure human earth when handling.
7) Do not open nor modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
9) At the insertion or removal of the Signal Interface Connector, be sure not to rotate
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nor tilt the Interface Connector of the TFT Module.
11) After installation of the TFT Module into an enclosure (Notebook PC Bezel, for example), do not twist nor bend the TFT Module even momentary. At designing the enclosure, it should be taken into consideration that no bending/twisting forces are applied to the TFT Module from outside. Otherwise the TFT Module may be damaged.
12) Small amount of materials having no flammability grade is used in the LCD module. The LCD module should be supplied by power complied with requirements of Limited Power Source (IEC60950 or UL1950), or be applied exemption.
13) Disconnecting power supply before handling LCD modules, it can prevent electric shock, DO NOT TOUCH the electrode parts, cables, connectors and LED circuit part of TFT module that a LED light bar build in as a light source of back light unit. It can prevent electronic breakdown.
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Product Specification
Thickness
2. General Description
B140RW01 V2 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel, a driver circuit, and LED backlight system. The screen format is intended to support the HD (1600(H) x 900(V)) screen and 262k colors (RGB 6-bits data driver) with LED backlight driving circuit. All input signals are eDP interface compatible.
B140RW01 V2 is designed for a display unit of notebook style personal computer and industrial machine.
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2.1 General Specification
The following items are characteristics summary on the table at 25 condition:
Items Unit Specifications
Screen Diagonal [mm] 354.95 (14.0W”)
Active Area [mm] 309.60 X 174.15
Pixels H x V 1600x3(RGB) x 900
Pixel Pitch [mm] 0.1935X0.1935
Pixel Format R.G.B. Vertical Stripe
Display Mode Normally White
White Luminance (ILED=20mA) (Note: ILED is LED current)
Luminance Uniformity 1.25 max. (5 points) Contrast Ratio 400 typ Response Time [ms] 8 typ / 12 Max
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[cd/m2] 200 typ. (5 points average)
170 min. (5 points average)
Nominal Input Voltage VDD [Volt] +3.3 typ.
Power Consumption [Watt] 5.5 max. (Include Logic and Blu power)
Weight [Grams] 375 max. Physical Size without inverter,
bracket.
Electrical Interface eDP 1 Main Link Differential Pair
Surface Treatment Anti-Glare, Hardness 3H,
Support Color 262K colors ( RGB 6-bit )
Temperature Range
Operating Storage (Non-Operating)
RoHS Compliance RoHS Compliance
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[mm]
[oC] [oC]
Min. Typ. Max.
Length 323 323.5 324
Width 191.5 192 192.5
5.2
0 to +50
-20 to +60
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Product Specification
2.2 Optical Characteristics
The optical characteristics are measured under stable conditions at 25 (Room Temperature) :
Item Symbol Conditions Min. Typ. Max. Unit Note
White Luminance
ILED=20mA
Viewing Angle
Luminance Uniformity
Luminance Uniformity
Contrast Ratio CR
Cross talk %
Response Time
Red
Color /
Chromaticity
Coodinates
Green
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Blue
White
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θR
θL ψH ψL
δ5P
δ
13P
Tr Rising
Tf Falling
TRT Rising + Falling
Rx
Ry
Gx
Gy
Bx
By
Wx
Wy
5 points average
Horizontal (Right)
CR = 10 (Left)
Vertical (Upper)
CR = 10 (Lower)
5 Points
13 Points
CIE 1931
170 200
40 40
10 30
- - 1.25 1, 3, 4
- - 1.50 2, 3, 4
300 400 - 4, 6
4 4, 7
-
- -
- 8 12
0.590 0.620 0.650
0.310 0.340 0.370
0.300 0.330 0.360
0.540 0.570 0.600
0.120 0.150 0.180
0.030 0.060 0.090
0.283 0.313 0.343
0.299 0.329 0.359
45 45
15 35
-
-
-
-
-
-
cd/m
degree
msec
2
1, 4, 5.
4, 9
4, 8
4
NTSC %
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-
45
-
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Product Specification
=
Maximum Brightness of thirteen points
Minimum Brightness of thirteen points
Maximum Brightness of five
points
=
Minimum Brightness of five points
Note 1: 5 points position (Ref: Active area)
H /4
H /4
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W / 4 W / 4 W / 4 W / 4
W
1 2
H
H /4
H /4
Note 2: 13 points position (Ref: Active area)
W /4
1 0
1 0
H /4
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H /4
H
H /4
1
6
3
4
W
W /4
4 5
W /4
2
7
5
W /4
1 0
3
8
9
H /4
1 0
1 1
1 2
Note 3: The luminance uniformity of 5 or13 points is defined by dividing the maximum luminance values by the minimum test point luminance
δ
W5
1 0
1 3
δ
Note 4: Measurement method
The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change
during measuring. In order to stabilize the luminance, the measurement should be executed after lighting
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Product Specification
Field=2
°
Contrast ratio (CR)=
Brightness on the “White” state
Brightness on the “Black” state
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Backlight for 30 minutes in a stable, windless and dark room, and it should be measured in the center of screen.
Photo detector
Note 5 Definition of Average Luminance of White (YL):
Measure the luminance of gray level 63 at 5 pointsY
L (x) is corresponding to the luminance of the point X at Figure in Note (1).
Note 6 Definition of contrast ratio:
Note 7 Definition of Cross Talk (CT)
CT = | YB – YA | / YA × 100 (%)
Where
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Contrast ratio is calculated with the following formula.
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
L
YA = Luminance of measured location without gray level 0 pattern (cd/m2)
YB = Luminance of measured location with gray level 0 pattern (cd/m2)
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Product Specification
Note 8: Definition of response time:
The output signals of BM-7 or equivalent are measured when the input signals are changed from “Black” to
“White” (falling time) and from “White” to “Black” (rising time), respectively. The response time interval between
the 10% and 90% of amplitudes. Refer to figure as below.
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"Black"
100%
S i
90%
g n a l
(
R e
l
a t
i
v
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e
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v a l
u
10%
e )
0%
Tr
Tf
"White""White"
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Product Specification
Note 9. Definition of viewing angle
Viewing angle is the measurement of contrast ratio 10, at the screen center, over a 180° horizontal and
180° vertical range (off-normal viewing angles). The 180° viewing angle range is broken down as follows; 90°
(θ) horizontal left and right and 90° (Φ) vertical, high (up) and low (down). The measurement direction is
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typically perpendicular to the display surface with the screen rotated about its center to develop the desired
measurement viewing angle.
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Product Specification
3. Functional Block Diagram
The following diagram shows the functional block of the 14.0 inches wide Color TFT/LCD 30 Pin (1 main link differential pair / connector Module)
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Product Specification
4. Absolute Maximum Ratings
An absolute maximum rating of the module is as following:
4.1 Absolute Ratings of TFT LCD Module
Item Symbol Min Max Unit Conditions
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Logic/LCD Drive Voltage
Vin -0.3 +4.0 [Volt] Note 1,2
4.2 Absolute Ratings of Environment
Item Symbol Min Max Unit Conditions
Operating Temperature
Operation Humidity HOP 10 90 [%RH] Note 4
Storage Temperature
Storage Humidity HST
Note 1: At Ta (25 )
Note 2: Permanent damage to the device may occur if exceed maximum values
Note 3: LED specification refer to section 5.2
Note 4: For quality performance, please refer to AUO IIS (Incoming Inspection Standard).
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TOP 0 +50 [oC] Note 4
TST -20 +60 [oC] Note 4
10 90
Twb=39°C
[%RH]
Note 4
Operating Range
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Storage Range
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Product Specification
Voltage
-
90%
10%
5. Electrical characteristics
5.1 TFT LCD Module
5.1.1 Power Specification
Input power specifications are as follows;
The power specification are measured under 25 and frame frenquency under 60Hz
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Symble Parameter Min Typ Max Units
VDD Logic/LCD Drive
PDD VDD Power IDD IDD Current
I
Rush
Inrush Current
VDDrp Allowable
3.0 3.3 3.6 [Volt]
2 [Watt] Note 1/2
- 364
- -
- -
467
2000 [mA]
100 [mV] Logic/LCD Drive Ripple Voltage
Note 1 : Maximum Measurement ConditionBlack Pattern
Note 2Typical Measurement Condition: Mosaic Pattern
Note 3Measure Condition
+5.0V
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R1 47K
(High to Low) Control Signal
SW1
SW MAG-SPST
1 2
+12.0V
R2
1K
VR1
47K
D6 D5 D2 S D1
G
C3
0.01uF/25V
Q3 AO6402
D2SD1D5
G
D6
Q3
AO6402
F1
[mA]
p-p
Note 1/2
Note 3
C1 1uF/16V
(LCD Module Input)
Note
VCC
C2 1uF/25V
0V
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0.5ms
Vin rising time
3.3V
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Product Specification
5.1.2 Signal Electrical Characteristics
Input signals shall be low or High-impedance state when VDD is off. It is recommended to refer the specifications of VESA Display Port Standard V1.1a in detail.
Signal electrical characteristics are as follows;
Display Port main link signal:
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VCM Differential common mode voltage --- 0 --- V
VDiffP-P level1 Differential peak to peak voltage level1 0.34 0.4 0.46 V
VDiffP-P level2 Differential peak to peak voltage level2 0.51 0.6 0.68 V
VDiffP-P level3 Differential peak to peak voltage level3 0.69 0.8 0.92 V
VDiffP-P level4 Differential peak to peak voltage level4 1.02 1.2 1.38 V
Fallow as VESA display port standard V1.1a at both 1.62 and 2.7Gbps link rates.
Display Port AUX_CH signal:
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Display Port main link
Min Typ Max unit
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Product Specification
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Fallow as VESA display port standard V1.1a.
Display Port V
Fallow as VESA display port standard V1.1a.
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HPD
signal:
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Product Specification
Display Port panel power sequence:
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Display Port AUX_CH transaction only:
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Product Specification
Display Port panel power sequence timing parameter:
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Note 1: The sink must include the ability to generate black video autonomously. The sink must automatically enable black video under the following conditions:
-upon LCDVDD power on (with in T2 max)
-when the "Novideostream_Flag" (VB-ID Bit 3) is received from the source (at the end of T9).
-when no main link data, or invalid video data, is received from the source. Black video must be displayed within 50ms (typ) from the start of either condition. Video data can be deemed invalid based on MSA and timing information, for example.
Note 2: The sink may implement the ability to disable the black video function, as described in Note 1, above, for system development and debugging purpose.
Note 3: The sink must support AUX_CH polling by the source immediately following LCDVDD power on without causing damage to the sink device (the source can re-try if the sink is not ready). The sink must be able to respond to an AUX_CH transaction with the time specified within T3 max.
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Product Specification
Display Port signal cable impedance request:
Signal cable impedance:
The variation of the cable impedance must be within 100ohms +/-15% from a system to a panel connector.
Parameter Condition Min. Typ. Max.
Cable impedance
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Unit
System to panel connector 85 100 115 Ohm
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5.2 Backlight Unit
5.2.1 LED characteristics
Parameter
Product Specification
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Symbol
Min Typ Max Units
Condition
Backlight Power Consumption
LED Life-Time
Note 1: Calculator value for reference P
Note 2: The LED life-time define as the estimated time to 50% degradation of initial luminous.
5.2.2 Backlight input signal characteristics
Parameter
LED Power Supply
LED Enable Input
High Level
LED Enable Input
PWM Logic Input
PWM Logic Input
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Low Level
High Level
Low Level
PLED - - 3.21
N/A 10000 - -
= VF (Normal Distribution) * IF (Normal Distribution) / Efficiency
LED
Symbol
VLED 6.0 12.0 21.0 [Volt]
VLED_EN
VPWM_EN
Min Typ Max Units Remark
2.5 - 5.5 [Volt]
- - 0.8 [Volt]
2.5 - 5.5
- - 0.8
[Watt]
Hour
[Volt]
[Volt]
(Ta=25), Note 1 Vin =12V
(Ta=25), Note 2
IF=20 mA
Define as
Connector
Interface
(Ta=25)
PWM Input Frequency
PWM Duty Ratio
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FPWM 100 - 20K
Duty 5 -- 100
Hz
%
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Product Specification
6. Signal Characteristic
6.1 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format.
1600
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1
1st Line
900th Line
R G B R G B
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R G B R G B
R G B R G B
R G B R G B
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Product Specification
6.2 Integration Interface and Pin Assignment
eDP lane is a differential signal technology for LCD interface and high speed data transfer device.
PIN NO Symbol Function
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1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
NC No Connection
NC No Connection
NC No Connection
NC No Connection
H_GND High Speed Ground
Lane0_N Complement Signal Link Lane 0
Lane0_P True Signal Link Lane 0
H_GND High Speed Ground
AUX_CH_P True Signal Auxiliary Ch.
AUX_CH_N Complement Signal Auxiliary Ch.
H_GND High Speed Ground
LCD_VCC LCD logic and driver power
LCD_VCC LCD logic and driver power
Self Test (BIST) Built-In Self Test (active high)
LCD GND LCD logic and driver ground
LCD GND LCD logic and driver ground
17
18
19
20
21
22
23
24
25
26
27
28
29
30
HPD HPD signal pin (Hot Plug Detect)
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BL_GND Back light_ground
BL_GND Back light_ground
BL_GND Back light_ground
BL_GND Back light_ground
BL_ENABLE Backlight On/off
BL PWM DIM System PWM signal input for dimming
NC-Reserved Reserved for LCD manufacture's use
NC-Reserved Reserved for LCD manufacture's use
BL_PWR Backlight power
BL_PWR Backlight power
BL_PWR Backlight power
BL_PWR Backlight power
NC No Connection
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Connector
Note1: Start from right side
Product Specification
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30
Note2: Input signals shall be low or High-impedance state when VDD is off.
internal circuit of eDP inputs are as following.
1
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Product Specification
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Product Specification
6.3 Power ON/OFF Sequence
VDD power on/off sequence is as follows. Interface signals are also shown in the chart. Signals from any system shall be Hi-Z state or low level when VDD is off
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Value
Parameter
Min. Typ. Max.
T1 0.5 - 10 (ms) T2 5 - 50 (ms) T3 0.5 - 50 (ms)
T4 400 - - (ms)
T5 300 - - (ms)
T6 200 - - (ms) T7 0 - 10 (ms)
T8 10 --- --- (ms)
T9 10 --- --- (ms) T10 0 --- --- (ms) T11 10 --- --- (ms)
Units
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Product Specification
6.4 Interface Timing
6.4.1 Timing Characteristics
Basically, interface timings should match the 1600X900 / 60Hz manufacturing guide line timing.
Parameter Symbol Min. Typ. Max. Unit
Frame Rate - - 60 - Hz
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Clock frequency 1/ T
Vertical
Section
Horizontal
Section
Note : DE mode only
7. Connector Description
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following components.
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Period TV 902 - -
Active TVD 900
Blanking TVB 2 - -
Period TH 4095
Active THD 1600
Blanking THB 10 370 2495
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25 53.9 208 MHz
Clock
T
T
Line
Clock
7.1 TFT LCD Module
Connector Name / Designation For Signal Connector
Manufacturer IPEX
Type / Part Number
Mating Housing/Part Number
IPEX 20455-030E-12R or compatible
IPEX 20453-030T-01
or compatible
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Product Specification
8. LED Driving Specification
8.1 Connector Description
It is a intergrative interface and comibe into eDP connector. The type and mating refer to section 7.
8.2 Pin Assignment
Ref. to 6.3
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Product Specification
9. Vibration and Shock Test
9.1 Vibration Test
Test Spec:
Test method: Non-Operation
Acceleration: 1.5 G
Frequency: 10 - 500Hz Random
Sweep: 30 Minutes each Axis (X, Y, Z)
9.2 Shock Test Spec:
Test Spec:
Test method: Non-Operation
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Acceleration: 220 G , Half sine wave
Active time: 2 ms
Pulse: X,Y,Z .one time for each side
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10. Reliability
Items
Temperature
Humidity Bias
High Temperature
Operation
Low Temperature
Operation
High Temperature
Storage
Low Temperature
Storage
Thermal Shock
Test
Product Specification
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Required Condition Note
Ta= 40℃℃, 90%RH, 300h
Ta= 50℃℃, Dry, 300h
Ta= 0℃℃, 300h
Ta= 60℃℃, 300h
Ta= -20℃℃, 250h
Ta=-20℃℃to 60℃℃℃℃, Duration at 30 min, 100 cycles
ESD
Note1: According to EN 61000-4-2 , ESD class B: Some performance degradation allowed. No data lost
. Self-recoverable. No hardware failures.
Remark: MTBF (Excluding the LED): 30,000 hours with a confidence level 90%
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Contact : ±8 KV
Air : ±15 KV
Note 1
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11. Mechanical Characteristics
11.1 LCM Outline Dimension
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Note: Prevention IC damage, IC positions not allowed any overlap over these areas.
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Note: Prevention IC damage, IC positions not allowed any overlap over these areas.
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11.2 Screw Hole Depth and Center Position
Screw hole maximum depth, from side surface = 2.65 mm (see drawing)
Screw hole center location, from front surface = 3.1 ± 0.2mm (See drawing) Screw Torque: Maximum 2.5 kgf-cm
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12. Shipping and Package
12.1 Shipping Label Format
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12.2 Carton package
The outside dimension of carton is 405(L)mm* 376(W)mm* 302(H)mm, carton and cushion weight are 2200g.
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12.3 Shipping package of palletizing sequence
The outside dimension of Pallet is 114(L)mm* 83(W)mm* 13.8(H)mm By air:6 * 4 layers, one pallet put 24 boxes, total 600 pcs module.
By sea:6 * 6 layers, one pallet put 36 boxes, total 900 pcs module.
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13. Appendix: EDID description 0928 Checksum = C1
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B140RW01 V2 EDID Code
Address
HEX
00
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
10
11
12
13
14 Video input def. (digital I/P, non-TMDS, CRGB)
15 Max H image size (rounded to cm)
16 Max V image size (rounded to cm)
17 Display Gamma (=(gamma*100)-100)
18 Feature support (no DPMS, Active OFF, RGB, tmg Blk#1)
19 Red/green low bits (Lower 2:2:2:2 bits)
1A Blue/white low bits (Lower 2:2:2:2 bits)
1B Red x (Upper 8 bits)
1C
1D
1E
1F
20
21
22
23
24
25
26
27
28
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FUNCTION Value Value Value Note
HEX BIN DEC
Header 00 00000000
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
FF 11111111
00 00000000
EISA Manuf. Code LSB 06 00000110
Compressed ASCII AF 10101111
Product Code
hex, LSB first
32-bit ser # 00 00000000
00 00000000
00 00000000
00 00000000
Week of manufacture 00 00000000
Year of manufacture 13 00010011
EDID Structure Ver. 01 00000001
EDID revision # 04 00000100
Red y/ highER 8 bits 57 01010111
Green x 54 01010100
Green y 92 10010010
Blue x 26 00100110
Blue y 0F 00001111
White x 50 01010000
White y 54 01010100
Established timing 1 00 00000000
Established timing 2 00 00000000
Established timing 3 00 00000000
Standard timing #1 01 00000001
01 00000001
Standard timing #2 01 00000001
3E 00111110
12 00010010
95 10010101
1F 00011111
11 00010001
78 01111000
02 00000010
C8 11001000
95 10010101
9E 10011110
0
255
255
255
255
255
255
0
6
175
62
18
0
0
0
0
0
19
1
4
149
31
17
120
2
200
149
158
87
84
146
38
15
80
84
0
0
0
1
1
1
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29
2A
2B
2C
2D
2E
2F
30
31
32
33
34
35
36
Pixel Clock/10000 LSB 1C 00011100
37
Pixel Clock/10000 USB 2A 00101010
38 Horz active Lower 8bits
39 Horz blanking Lower 8bits
3A HorzAct:HorzBlnk Upper 4:4 bits
3B
3C
3D
3E
3F
40
41 Horz&Vert Sync Offset/Width Upper 2bits
42
43
44
45
46
47
48
49
4A
4B
4C
4D
4E
4F
50
51
52
53
54
Vertical Active Lower 8bits
Vertical Blanking Lower 8bits
Vert Act : Vertical Blanking (upper 4:4 bit)
HorzSync. Offset
HorzSync.Width
VertSync.Offset : VertSync.Width
Horizontal Image Size Lower 8bits
Vertical Image Size Lower 8bits
Horizontal & Vertical Image Size (upper 4:4 bits)
Horizontal Border (zero for internal LCD)
Vertical Border (zero for internal LCD)
Signal (non-intr, norm, no stero, sep sync, neg pol)
Pixel Clock/10,000 (LSB)
Pixel Clock/10,000 (MSB)
Horizontal Addressable Pixels, lower 8 bits
Horizontal Blanking Pixels, lower 8 bits
H Pixels, upper nibble : H Blanking, upper nibble
Vertical Addressable Lines, lower 8 bits
Vertical Blanking Lines, lower 8 bits
V lines, upper nibble : V blanking, upper nibble
Horizontal Front Porch, lower 8 bits
Horizontal Sync Pulse, lower 8 bits
V Front Porch, lower nibble : V Sync Pulse, lower nibble
VFP, 2 bits: VSP 2 bits: HFP 2 bits: HFP 2 bits
Horizontal Image Size in mm, lower 8 bits
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Standard timing #3 01 00000001
Standard timing #4 01 00000001
Standard timing #5 01 00000001
Standard timing #6 01 00000001
Standard timing #7 01 00000001
Standard timing #8 01 00000001
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01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
01 00000001
40 01000000
72 01110010
61 01100001
84 10000100
0C 00001100
30 00110000
30 00110000
DC 11011100
44 01000100
00 00000000
35 00110101
AE 10101110
10 00010000
00 00000000
00 00000000
18 00011000
13 00010011
1C 00011100
40 01000000
72 01110010
61 01100001
84 10000100
0C 00001100
30 00110000
30 00110000
DC 11011100
44 01000100
00 00000000
35 00110101
1
1
1
1
1
1
1
1
1
1
1
1
1
28
42
64
114
97
132
12
48
48
220
68
0
53
174
16
0
0
24
19
28
64
114
97
132
12
48
48
220
68
0
53
40Hz frame rate
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Vertical Image Size in mm, lower 8 bits
55
H Image Size, upper nibble : V Image Size, upper nibble
56
Horizontal Border
57
Vertical Border
58
Bit Encode Sync Information
59
DC
5A
HTOTAL
5B
HA
5C
HBL
5D
HFP
5E
HFPe
5F
HBP
60
HB
61
HSO
62
HS
63
VTOTAL
64
VA
65
VBL
66
VFP
67
VBP
68
VB
69
VSO
6A
VS
6B
Detailed time decription #4
6C
Flags
6D
Reserved
6E
For Brightness table and Power consumption
6F
Flags
70
PWM % [7:0] @ STEP 0
71
PWM % [7:0] @ STEP 5
72
PWM % [7:0] @ STEP 10
73
Nits [7:0] @ STEP 0
74
Nits [7:0] @ STEP 5
75
Nits [7:0] @ STEP 10
76
Panel Electronics Power @ 32X32 Chess Pattern
77
Backlight Power @ 60nits
78
Backlight Power @ step10
79
Nits @ 100% PWM duty
7A
Flags
7B
Flags
7C
Flags
7D
7E
7F
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Extension Flag 00 00000000
Checksum
AE 10101110
10 00010000
00 00000000
00 00000000
18 00011000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
00 00000000
02 00000010
00 00000000
0C 00001100
3F 00111111
CC 11001100
0A 00001010
3C 00111100
64 01100100
21 00100001
12 00010010
24 00100100
7D 01111101
20 00100000
20 00100000
20 00100000
C1
SUM
11000001
174
16
0
0
24
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
2
0
12
63
204
10
60
100
33
18
36
125
32
32
32
0
193
6400
5%
25%
80%
10nits
60nits
200nits
1320mW
720mW
2880mW
250nits
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B140RW01 V2 Document Version 0.4
SUM to HEX
1900
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www.jxlcd.com
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B140RW01 V2 Document Version 0.4
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