
AUO
Display Specification for B133EW07 V1
13.3” Wide (1280x800) TFT-LCD
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LED Backlight with High Color Gamut
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Title: Spec, Elec., Dspl., AUO, 13.3” TFT-LCD, DWG Number: 646-0634 Rev.01

Revision History
DATE REV # Section # CHANGE DESCRIPTION
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Title: Spec, Elec., Dspl., AUO, 13.3” TFT-LCD DWG Number: 069-3542 Rev.01

Table of Content
Revision History 2
1. General Description 6
2. ORDER OF PRECEDENCE OF DOCUMENTATION AUTHORITY 7
2.1. The Purchase Order 7
2.2. This Specification 7
2.3. Reference Documents 7
3. PHYSICAL DESCRIPTION 8
4. MECHANICAL REQUIREMENTS 9
5. ELECTRICAL REQUIREMENTS 11
5.1. Block Diagram 11
5.2. Display PCB Schematics 12
5.3. Display PCB Layout 13
5.4. Display Subsystem (PCB & TFT Panel) 13
5.4.1.
Pin-Out (Single Channel LVDS Interface) 13
5.4.2.
Connector Diagram 14
5.4.3.
Color Input Data Reference 15
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5.4.4.
5.4.5.
5.4.6.
5.4.6.1. Signal Impedance 22
5.4.6.2. Timing Data 22
5.4.6.3. Video Timing Diagram 23
5.4.7.
5.4.8.
5.4.9.
5.5. Near-Field Noise 27
5.6. Backlight Subsystem 27
6. OPTICAL REQUIREMENTS 30
6.1. Optical Specifications 30
6.2. Measuring Conditions 31
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EDID Interface (Per Vesa EDID 1.x standard requirements) 17
Electrical Ratings 20
Signal Timing 22
Power Measurements (W/O backlight) 25
Power on-off sequence 26
Vcc Dip Condition 26

6.3.
6.3.1.
6.3.2.
6.3.3.
Definition 33
Center Point Luminance 33
Average Luminance 33
Luminance Uniformity 33
6.3.3.1. Global Luminance Uniformity: 33
6.3.3.2. Worst Neighbor Luminance Uniformity (The 4 points that are closest to the test point)
34
6.3.4.
6.3.5.
6.3.5.1. Panel to Panel White Color Uniformity 34
6.3.5.2. Max Color Difference with respect to the center within a panel 35
6.3.5.3. Max Color Difference between any two points within the panel 35
6.3.5.4. Max Color Difference between two neighbors 35
6.3.6.
6.3.7.
6.3.8.
6.3.9.
6.3.9.1. On and Off Response Time 36
6.3.9.2. Gray to Gray Response Time 36
6.3.10. Gray Scale Linearity or Gamma Value 37
Contrast Ratio 34
White Color Uniformity 34
RGB Color Chromaticity 35
Viewing Angle 35
Gray Scale Inversion 36
Response Time 36
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6.3.11. Flicker 37
6.3.12. Cross-talk 38
6.4. Hot Spot Specifications: 38
7. ENVIRONMENTAL 40
7.1. Shock and Vibration 40
7.2. Temperature and Humidity 41
7.2.1.
General Performance Requirements 41
7.2.2.
Non-operational Testing 42
7.2.2.1. Low Temperature 42
7.2.2.2. High Temperature 42
7.2.2.3. High Temperature and High Humidity 42
7.2.2.4. Thermal Shock 42
7.2.3.
Operational Testing 42
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7.2.3.1.
Low Temperature 42
7.2.3.2. High Temperature 42
7.2.3.3. High Temperature and High Humidity 42
7.2.3.4. Four Corner Test (72 hrs – operating) 42
7.3. Altitude 43
8. RELIABILITY 43
8.1. Resistance to Normal Abuse 43
8.1.1.
Torsion Test 43
8.1.2.
Test Conditions: 43
8.1.3.
Test Set-up 44
8.1.4.
Static Load Deflection and Breakage 44
8.2. Electrostatic Discharge (ESD) 44
8.3. MTBF 44
8.4. LCD Glass Strength 45
9. COSMETIC REQUIREMENTS 50
10.
REGULATORY 51
10.1. Product Safety (Environmental, Ergonomics, Safety and Health) 51
10.2. RoHS Compliance and other Substance Regulations 51
10.3 Halogen Free 51
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10.3. Environmental Markings and Recycling 51
10.4. Product Safety 52
10.5. Ergonomics 52
10.6. Electromagnetic Compatibility (EMC) 52
11 FACTORY/SERVICE REQUIREMENTS 54
12 REFERENCE DOCUMENTS 55
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1. General Description
This document establishes the requirements for the display device for the B133EW07 V1
Category Parameter Specification
General
Electrical
Optical
Manufacturer AUO
Mfg. P/N B133EW07 V1
LCD TYPE Normally-White, Transmissive TN TFT-LCD
Diagonal 13.282” (33.74cm)
Pixel Format 1280 (RGB stripe, H) x 800 (V)
Pixel Pitch 0.2235(V) x 3x0.0745(H) mm
Color Depth 18-bits (6R, 6G, 6B), 262144 colors
Pooling requirement Rigid Post Spacer with strong pooling resistance
Packaging Protective film on front polarizer. Displays packaged
and air-tight sealed in anti-static bags.
Interface 3.3V single-channel LVDS
Power Consumption 4.36 W @ Black (typical, the logic plus the backlight
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Luminance 275 nits @ 94% duty cycle @23 mA (typical center)
@94% duty cycle @23mA, 3.3V forward bias voltage)
Mechanical
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White LED Backlight 6 strings, 9 LED per string. Nichia NNSW208
Hot Spots No visible hot spot at any angle
Viewing Direction 6:00 for worst dark inversion (pcb driver on the bottom)
Contrast 500 typical
Top Polarizer Glossy Surface, 3H Hard Coating, LT4/ARC7 AR
coating
Diffuser Sheet Tsujiden D153GS (top) & Tsujiden D120 (Bottom)
BEF Sheet 2 X BEF2-G2 MR (Halogen free)
Reflector E6SR or equivalent (sulfur free)
LGP PMMA
Active Area 286.08 mm (H) x 178.80 mm (V)

Minimum Viewing Area 288.08 mm (H) x 180.80 mm (V)
Environmental
Pre-Aging
2. ORDER OF PRECEDENCE OF DOCUMENTATION AUTHORITY
In the case of any conflict in any specification related to these parts, this order of precedence of
authority shall apply:
2.1. The Purchase Order
2.2. This Specification
Module Outline Size 297.150 mm (H) x 192.150 mm (V)
Connector IPEX 20474-030E-12
Mating Connector IPEX 20472-030T-10
Weight 300 grams typical
Operating Temperature 0°C ~ +50°C
Storage Temperature -25°C ~ +65°C
Before shipment Minimum 2 hours at 50°C, panel on
2.3. Reference Documents
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Title: Spec, Elec., Dspl., AUO, 13.3” TFT-LCD DWG Number: 069-3542 Rev.01

3. PHYSICAL DESCRIPTION
3.1. Display Mode
Normally White, Transmissive, Twisted Nematic Liquid Crystal Displays
3.2. Pixel Configuration
RGB Vertical Stripe
3.3. Pixel Pitch
0.2235 mm x 0.2235 mm
3.4. Resolution
1280 (RGB stripe, H) x 800 (V)
3.5. Aperture Ratio
Minimum > 50%
3.6. Optimum Viewing Cone
6 o’clock worst dark inversion direction (PCB on the bottom)
3.7. Interface & Driving Scheme
3.3V single-channel LVDS (Flat Link) interface, requiring Hsync and Vsync
signals, along with DE (Data Enable) mode, 2-dot inversion
3.8. Front Surface Treatment
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Low-reflection gloss surface, ~1% Reflectance, ≥3H hardness (Sumitomo LT4, or
Nitto Denko ARC7)
3.9 Environmental Requirements:
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Any homogeneous component must meet Halogen-Free Specification, 069-1857.
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Title: Spec, Elec., Dspl., AUO, 13.3” TFT-LCD DWG Number: 069-3542 Rev.01

4. MECHANICAL REQUIREMENTS
4.1. Dimensions and Tolerances
The LCD module outline is described in the following table.
Dimension Min Typ Max Unit
Horizontal (H) 296.85 297.15 297.45 mm
Vertical (V) 191.85 192.15 192.45 mm
Depth (D) 3.08 3.38 3.68 mm
4.2. Weight
300 g (typical), 310 g (max)
4.3. Stack-up (tentative)
Mechanical Stack-up Part # Thickness /mm
Top Polarizer
(glossy, LT4 or ARC7) Sumika, SRW862APK-LT4
LCD Glass CF 0.5
LCD Glass TFT 0.5
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Title: Spec, Elec., Dspl., AUO, 13.3” TFT-LCD DWG Number: 069-3542 Rev.01
Bottom Polarizer 0.215
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Total Design Gap - 0.135
Upper Diffuser Tsujiden D131S 0.095
Upper BEF (Halogen Free) BEF II-GII MR 0.155
Lower BEF (Halogen Free) BEF II-GII MR 0.155
Lower Diffuser Tsujiden D120 0.12
Light Guide PMMA 0.72
White Reflector (Sulfur-free
reflector for PMMA
backlight) E6SR 0.188
Rear Bezel SUS 304 0.3
Tape 0.1
Total Typical Thickness w/o PCB 3.38
Maximum Tolerance 0.3
Total Maximum Thickness
PCB Thickness (8 Layer
PCB) 0.8
Maximum Component - 1
side (include Solder) 1.15
(w/o PCB) 3.68
0.215

Maximum Component - 2
side (include Solder) 0.2
Total Maximum PCB
Thickness 2.15
4.4. Exposed Areas and Restrictions
The display module shall not have exposed edges or components, which may cause injury
or damage during handling, inspection, assembly, and service. Exposed areas of the display
module (those not protected or shielded by construction) must be insulated and otherwise
protected to eliminate the possibility of electrical shorting or destructive ESD discharges
(per Section 7.2) during handling, inspection, assembly, and service.
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Title: Spec, Elec., Dspl., AUO, 13.3” TFT-LCD DWG Number: 069-3542 Rev.01

ELECTRICAL REQUIREMENTS
4.5. Block Diagram
Connector
User
I C BUS
EDID BUS
Input
Panel IF
D
GAMMA
VON/VOFF
(EEPROM)
DC/DC
DC/DC
DC/DCDC/DC
Converter
EDID
EDID
EDIDEDID
Buck
DC/DC
Generator
Controller
Controller
ControllerController
Gamma
Gamma
GammaGamma
VCOM
VCOM
VCOMVCOM
Timing
Timing
TimingTiming
SOURCE
SOURCE
SOURCESOURCE
DRIVE IC
DRIVE IC
DRIVE ICDRIVE IC
13.3” WXGA
(1280 x 800 × RGB)
GATE DRIVE IC
GATE DRIVE IC
GATE DRIVE ICGATE DRIVE IC
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Backlight Driving Architecture
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Title: Spec, Elec., Dspl., AUO, 13.3” TFT-LCD DWG Number: 069-3542 Rev.01

4.6. Display PCB Schematics
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Title: Spec, Elec., Dspl., AUO, 13.3” TFT-LCD DWG Number: 069-3542 Rev.01

4.7. Display PCB Layout
Display Subsystem (PCB & TFT Panel)
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4.7.1. Pin-Out (Single Channel LVDS Interface)
Connector: IPEX 20474-030E-12 or equivalent (1.0 mm thickness, lock-in type, pin 1
starts from left on the front)
Matching Connector: IPEX 20472-030T-10 or equivalent (micro-coax type)
Interface Chips: (need update according the latest Configuration Sheet), integrated LVDS
and timing controller)
Single Channel LVDS Configuration
Pin Symbol Description Micro-coax cable gauge
1 GND Ground 40
2 Vcc Power Supply (+3.3V)
(AWG)
36
3 V
4 V
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Title: Spec, Elec., Dspl., AUO, 13.3” TFT-LCD DWG Number: 069-3542 Rev.01
Power Supply (+3.3V)
analog
DDC Power +3.3V 40
EDID
36

5 Vsync Vsync 40
6 Clk
7 DATA
8 Rin0- Differential Data Input 40
9 Rin0+ Differential Data Input 40
10 GND Ground 40
11 Rin1- Differential Data Input 40
12 Rin1+ Differential Data Input 40
13 GND Ground 40
14 Rin2- Differential Data Input 40
15 Rin2+ Differential Data Input 40
16 GND Ground 40
17 Clkin- Differential Clock Input 40
18 Clkin+ Differential Clock Input 40
19 GND Ground 40
20 NC NC 40
21 Vdc(1 &2) LED Annold (Positive) 40
22 Vdc(3&4) LED Annold (Positive) 40
DDC Clock 40
EDID
DDC Data 40
EDID
23 NC NC 40
24 Vdc1 LED Cathode (Negative) 40
25 Vdc2 LED Cathode (Negative) 40
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26 Vdc3 LED Cathode (Negative) 40
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27 Vdc4 LED Cathode (Negative) 40
28 Vdc5 LED Cathode (Negative) 40
29 Vdc6 LED Cathode (Negative) 40
30 NC NC 40
4.7.2. Connector Diagram
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PIN #1
PIN #30

4.7.3. Color Input Data Reference
The brightness of each primary color (red, green and blue) is based on the 6-bit gray
scale data input for the color. The higher the binary input, the brighter the color. The
table below provides a reference for color versus data input.
COLOR DATA REFERENCE
Input Color Data
Color Red
MSB LSB
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Black
Red(63)
Green(63)
Basic
Blue(63)
Colors
Cyan
Magenta
Yellow
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White
Red(00) Dark
Red(01)
Red(02)
Red
Red(61)
Red(62)
Red(63) Bright
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
:
:
:
:
:
:
:
1
1
1
1
0
1
0
1
1
1
1
1
0
0
1
1
1
1
1
1
0
Green
MSB LSB
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
MSB LSB
0
0
0
0
1
0
0
1
1
1
0
1
1
0
1
1
0
0
0
0
0
0
:
:
0
0
0
0
0
0
Blue
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
Green(00)Dark
Green(01)
Green(02)
Green
Green(61)
Green(62)
Green(63)Bright
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0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0

in e 0
Blue(00) Dark
Blue(01)
Blue(02)
Blue
Blue(61)
Blue(62)
Blue(63) Bright
R G B R G B
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
:
:
:
:
:
:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Pixel Format on the Display
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
0
:
:
:
:
:
:
:
:
:
:
:
:
0
0
0
0
0
0
1
1
1
1
0
1
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
0
0
0
1
1
1
1
1
1
R G B R G B
Scan Direction
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Flex Bonding Edge
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4.7.4. EDID Interface (Per Vesa EDID 1.x standard requirements)
2 B133EW07 Value Value Note
Header
Header
HeaderHeader
00 00000000 0
FF 11111111 255
FF 11111111 255
FF 11111111 255
FF 11111111 255
FF 11111111 255
FF 11111111 255
EISA Manuf. Code LSB
EISA Manuf. Code LSB
EISA Manuf. Code LSBEISA Manuf. Code LSB
Compressed ASCII
Compressed ASCII
Compressed ASCIICompressed ASCII
Product Code
Product Code
Product CodeProduct Code
hex, LSB first
hex, LSB first
hex, LSB firsthex, LSB first
32
32----bit ser #
bit ser #
3232
bit ser #bit ser #
01 00000001 1
01 00000001 1
01 00000001 1
Week of manufacture
Week of manufacture
Week of manufactureWeek of manufacture
Year of manufa
Year of manufacture
Year of manufaYear of manufa
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EDID Structure Ver.
EDID Structure Ver.
EDID Structure Ver.EDID Structure Ver.
EDID revision #
EDID revision #
EDID revision #EDID revision #
Video input definition
Video input definition
Video input definitionVideo input definition
Max H image size
Max H image size
Max H image sizeMax H image size
Max V image size
Max V image size
Max V image sizeMax V image size
Display Gamm
Display Gammaaaa
Display GammDisplay Gamm
Feature support
Feature support
Feature supportFeature support
Red/green low bits
Red/green low bits
Red/green low bitsRed/green low bits
Blue/white low bits
Blue/white low bits
Blue/white low bitsBlue/white low bits
Red x/ high bits
Red x/ high bits
Red x/ high bitsRed x/ high bits
Red y
Red y
Red yRed y
Green x
Green x
Green xGreen x
Green y
Green y
Green yGreen y
Blue x
Blue x
Blue xBlue x
Blue y
Blue y
Blue yBlue y
White x
White x
N
White xWhite x
cture
cturecture
HEX BIN DEC
00 00000000 0
06 00000110 6
10 00010000 16 0 00001(A) 10000(P) 10000(P)
C2 11000010 194
9C 10011100 156
01 00000001 1
01 00000001 1
13 00010011 19
01 00000001 1
03 00000011 3
80 10000000 128 Digital Input
1D 00011101 29
12 00010010 18
78 01111000 120
0A 00001010 10 no DPMS,Active off,RGB color
C5 11000101 197
95 10010101 149
A3 10100011 163 Rx=0.640
57 01010111 87 Ry=0.340
4F 01001111 79 Gx=0.310
9C 10011100 156 Gy=0.610
26 00100110 38 Bx=0.150
0F 00001111 15 By=0.060
50 01010000 80 Wx=0.313
9CC2 (apple assigned code)
19(2009
19(2009----1990=19)
19(200919(2009
APP9CC2
APP9CC2
APP9CC2APP9CC2
unused
unused
unusedunused
Week 1
Week 1
Week 1Week 1
1990=19)
1990=19)1990=19)
28.6cm
28.6cm
28.6cm28.6cm
17.9cm
17.9cm
17.9cm17.9cm
Gamma 2.2
Gamma 2.2
Gamma 2.2Gamma 2.2
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White y
White y
White yWhite y
Established timing 1
Established timing 1
Established timing 1Established timing 1
Established timing 2
Established timing 2
Established timing 2Established timing 2
Manufacturer's Timing
Manufacturer's Timing
Manufacturer's TimingManufacturer's Timing
Standard timing #1
Standard timing #1
Standard timing #1Standard timing #1
01 00000001 1
Standard timing #2
Standard timing #2
Standard timing #2Standard timing #2
01 00000001 1
Standard timing #3
Standard timing #3
Standard timing #3Standard timing #3
01 00000001 1
Standard timing #4
Standard timing #4
Standard timing #4Standard timing #4
01 00000001 1
Standard timing #5
Standard timing #5
Standard timing #5Standard timing #5
01 00000001 1
Standard timing #6
Standard timing #6
Standard timing #6Standard timing #6
01 00000001 1
Standard timing #7
Standard timing #7
Standard timing #7Standard timing #7
01 00000001 1
Standard timing #8
Standard timing #8
Standard timing #8Standard timing #8
01 00000001 1
Pixel Clock/10,000 (LSB)
Pixel Clock/10,000 (LSB)
Pixel Clock/10,000 (LSB)Pixel Clock/10,000 (LSB)
Pixel Clock/10,000 (MSB)
Pixel Clock/10,000 (MSB)
Pixel Clock/10,000 (MSB)Pixel Clock/10,000 (MSB)
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Horiz. Active pixels(Lower 8 bits) 00 00000000 0
Horiz.Blanking (Lower 8 bits) 8F 10001111 143
Horiz. Active pixels:Horiz. Blanking
(Upper4:4 bits)
20 00100000 32
2E 00101110 46
Vert. Active pixels:Vert. Blanking
(Upper4:4 bits)
30 00110000 48
20 00100000 32
Vert. Sync. Offset=xx lines, Sync
Width=xx lines
Horz. Ver. Sync/Width (upper 2 bits)
Hori. Image size (Lower 8 bits) 1E 00011110 30
Vert. Image size (Lower 8 bits) B3 10110011 179
Hori. Image size : Vert. Image size
(Upper 4 bits) 10 00010000 16
00 00000000 0
54 01010100 84 Wy=0.329
00 00000000 0 unused
00 00000000 0
00 00000000 0
01 00000001 1 unused
01 00000001 1
01 00000001 1
01 00000001 1
01 00000001 1
01 00000001 1
01 00000001 1
01 00000001 1
52 01010010 82
1C 00011100 28
50 01010000 80
30 00110000 48
36 00110110 54
00 00000000 0
Timing Descriptor #1
1280x800 @60_mode:pixel
1280x800 @60_mode:pixel
1280x800 @60_mode:pixel 1280x800 @60_mode:pixel
clock=
clock=72.5
72.5MHz
72.572.5
MHz
MHzMHz
ixels
ixelsixels
clock=clock=
Horiz active=1280 pixels
Horiz active=1280 pixels
Horiz active=1280 pixelsHoriz active=1280 pixels
Horiz blanking=143p
Horiz blanking=143pixels
Horiz blanking=143pHoriz blanking=143p
Vertcal active=800 lines
Vertcal active=800 lines
Vertcal active=800 linesVertcal active=800 lines
Vertical blanking=46 lines
Vertical blanking=46 lines
Vertical blanking=46 linesVertical blanking=46 lines
Horiz sync. Offset=48 pixels
Horiz sync. Offset=48 pixels
Horiz sync. Offset=48 pixelsHoriz sync. Offset=48 pixels
Horiz sync. Pulse Width=32 pixel
Horiz sync. Pulse Width=32 pixelssss
Horiz sync. Pulse Width=32 pixelHoriz sync. Pulse Width=32 pixel
Verti sync. Offset=3 lines,Sync
Verti sync. Offset=3 lines,Sync
Verti sync. Offset=3 lines,Sync Verti sync. Offset=3 lines,Sync
Width=6 lines
Width=6 lines
Width=6 linesWidth=6 lines
Hori image size= 286 mm
Hori image size= 286 mm
Hori image size= 286 mmHori image size= 286 mm
Verti image size = 179mm
Verti image size = 179mm
Verti image size = 179mmVerti image size = 179mm
Horizontal Border = 0
Horizontal Border = 0
Horizontal Border = 0 Horizontal Border = 0
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00 00000000 0
18 00011000 24
Detailed timing/monitor
Detailed timing/monitor
Detailed timing/monitorDetailed timing/monitor
descriptor #2
descriptor #2
descriptor #2descriptor #2
00 00000000 0
Version
Apple edid signature
Apple edid signature
Link Type (LVDS Link,MSB
justified)
Pixel and link component format
(6-bit panel interface)
Panel features (No inverter)
0A 00001010 10
20 00100000 32
Detailed timing/monitor
Detailed timing/monitor
Detailed timing/monitorDetailed timing/monitor
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descriptor #3
descriptor #3
descriptor #3descriptor #3
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00 00000000 0
FE 11111110 254
00 00000000 0
42 01000010 66 B
31 00110001 49 1
33 00110011 51 3
33 00110011 51 3
45 01000101 69 E
57 01010111 87 W
30 00110000 48 0
37 00110111 55 7
20 00100000 32
56 01010110 86 V
31 00110001 49 1
0A 00001010 10
00 00000000 0
00 00000000 0
01 00000001 1
00 00000000 0
06 00000110 6
10 00010000 16
20 00100000 32
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
00 00000000 0
Vertical Border = 0
Vertical Border = 0
Vertical Border = 0 Vertical Border = 0
For apple
For apple
For apple
For apple
For apple
For apple
For apple
ASCII Data String:B133EW07 V1
ASCII Data String:B133EW07 V1
ASCII Data String:B133EW07 V1ASCII Data String:B133EW07 V1
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Detailed timing/monitor
Detailed timing/monitor
Detailed timing/monitorDetailed timing/monitor
descriptor #4
descriptor #4
descriptor #4descriptor #4
Extension Flag
Extension Flag
Extension FlagExtension Flag
20 00100000 32
Mon
Monitor Name: Color LCD
itor Name: Color LCD
MonMon
00 00000000 0
00 00000000 0
00 00000000 0
FE 11111110 254
00 00000000 0
43 01000011 67 C
6F 01101111 111 o
6C 01101100 108 l
6F 01101111 111 o
72 01110010 114 r
20 00100000 32
4C 01001100 76 L
43 01000011 67 C
44 01000100 68 D
0A 00001010 10
20 00100000 32
20 00100000 32
20 00100000 32
00 00000000 0
itor Name: Color LCDitor Name: Color LCD
Checksum
Checksum
ChecksumChecksum
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4.7.5.
Power Supply Input Voltage
Power Supply Ripple
Electrical Ratings
PARAMETER SYMBOL
6D 01101101 109
SUM
V
CC
6400
VALUES
Min. Typ. Max.
3.0
3.3
50
3.6
UNIT NOTES
V (DC)
mV
p-p
1
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Power Supply Input Current
Differential Impedance
Power Consumption
Rush current
Notes: (1) The power supply ripple is measured whereas a black pattern is displayed;
(2) The specified current and power consumption are under the conditions at Vcc = 3.3 V, T =
25ºC, and fv = 60 Hz, f
(3) This impedance value is needed to a proper display and is measured from LVDS mating
connector to LVDS Rx
(4) The following is a typical Vcc circuit on the system side
CONTROL SIGNAL
(HIGH to LOW)
12V
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C3
1uF
Vcc rise time is about 470 µs
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I
CC
Zm
Pc
I
RUSH
=72.5MHz, whereas a mosaic pattern (typical) is displayed;
CLK
R1
47K
R2
1K
R3
47K
0.9Vcc
-
90
-
-
M1
2SK1059
C2
10000pF
M2
2SK1399
242
100
0.8
-
FUSE
273
110
0.9
1.5
C1
1uF
3.3V
0.1Vcc
470 µs
mA
Ω
W
A
V
cc
(
LCD INPUT)
2
3
2
4

The duration of the rush current is about 20 ms.
4.7.6. Signal Timing
4.7.6.1. Signal Impedance
Defined in VESA standard for LVDS FPDI 2
4.7.6.2. Timing Data
This is the signal timing required at the input of the control ASIC concerned with
LVDS as a FlatLink or equivalent. All of the interface signal timing should be
satisfied with the following specifications based on the VESA timing guideline
(1280x800 @ 60 Hz) for its proper operation.
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Video Timing Data
Signal Parameter Symbol Min Typ Max
D
Clock Period
CLK
DE
(Data Enable
Only)
(DTMG)
Data
H
H
sync
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V
V
sync
Clock Frequency
Duty Ratio (% High)
Rise Time
Fall Time
DE Setup Time
Data Setup Time
Data Hold Time
Horizontal Period
Horizontal Blank Period
Vertical Period
Vertical Blank Period
Back Porch
sync
H
Pulse Width
sync
H
Front Porch
sync
Horizontal Active Period
Back Porch
sync
V
Pulse Width
sync
V
Front Porch
sync
Vertical Active Period
T
Kdr
T
R CLK
T
F CLK
T
Tsd
Thd
TH
Tha
TV
T
H
T
Hfp
THD
V
TWV
Vfp
TVD
fC
wvb
WH
C
se
bp
bp
40
-
-
4
4
2
1280
800
13.79
72.50
50
4.42
4.42
-
-
-
1440
160
823
23
80
32
48
1280
14
6
3
800
60
-
-
-
-
-
1280
800
Unit Note
ns
MHz
%
ns
ns
ns
ns
ns
TC
TC
TH
TH
T
C
TC
TC
TC
T
H
TH
TH
TH
1
1/T
TCh /TC
2
fV=59.94 Hz, 3
Display Period
Display Period
C
Note: (1) When the WXGA+ controller sets DE Mode, and H
(DTMG) signal must be longer than 1 clock period (TC) at every horizontal sync period;
(2) Horizontal Period = One Line Scanning Time;
(3) The vertical period TV is related to the frame frequency fV, i.e., 60 Hz.
sync
and V
are required. The duration of DE
sync
4.7.6.3. Video Timing Diagram
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DE
DE
DEDE
DCLK
DCLK
DCLKDCLK
DE
DEDE
Da t a
Da t a
Da t aData
DE
T vd
Valid
Valid Dis p lay
Dis play Data
ValidValid
Dis playDis play
T v
T h d
T h
Data ((((1111111155552222pix e ls)
DataData
pixe ls )
pixe ls )pixe ls )
T w vb
T h s
T c
T ch
90 %
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DCLK
DCLK
DCLKDCLK
Display
Display
DisplayDispla y
data
data
datada ta
DE
DE
DEDE
50 %
10 %
T r clk
T d s
T e s
90 %
50 %
50 %
10 %
T fclk
T d h
90 %
10 %
90 %
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4.7.7. Power Measurements (W/O backlight)
Pattern Min Typ Max Unit
White To be updated
Mosaic 242 273 mA
V. Stripe To be updated
Black 273 303 mA
Note: (1) Display data pins and timing signal pins should be connected (GND = 0V);
(2) Operation conditions: fV = 60 Hz, f
(3) Power dissipation patterns are as follows.
(a) White screen (b) Mosaic (or checker) pattern
20x20 pixel black and white boxes
mA
mA
= 72.5 MHz, Vcc = 3.3 V;
CLK
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Display Brightest Gray Level
Display Darkest Gray Level
(c) Vertical Stripe Pattern
sub-pixel vertical line on/off alternation,
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R G B R G B R G B
R G B R G B R G B
R G B R G B R G B
R G B R G B R G B

4.7.8. Power on-off sequence
Power-on includes both system starting from power-off state and wake from sleep state;
power-off includes both system shutdown and entering sleep state.
Power on
Power Supply for
LCD VCC
Interface Signal
(LVDS Signal of
Transmitter), Vi
Power for Lamp
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0V
0V
10%
Values Parameter
90%
OFF
Power off Restart
90%
10%
T
T
2
T
1
Valid Data
T3
ON
T
4
T
T
OFF
Unit
7
Min. Typ. Max.
T
T
T
T
T
T
T7
1
2
3
4
5
6
0.15
1
200
200
0
5
500
-
20
250
250
20
-
-
10
50
-
-
50
20
-
ms
ms
ms
ms
ms
ms
ms
4.7.9. Vcc Dip Condition
The Vcc dip is the Vcc voltage drop during panel start-up.
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(1) 2.5V ≤ V
(2) For Vcc < 2.5V, Vcc should follow the power on-off sequence defined in 4.7.8
4.8. Near-Field Noise
The RF emissions from the panel (especially the LVDS input and Tcon) interfere with Wifi
operation.
Note that this spec compliance requirement is in addition to the legal EMI compliance
requirements.
< 3.0 V, Td ≤ 20 ms;
cc
td
Vcc
4.9. Backlight Subsystem
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4.9.1. General Information
LED Manufacturer Nichia
LED Manufacturer Assembly P/N Nichia NNSW208
Number of LEDs 54
LED Ranks V630 and up
LED Brightness Bin 50 mcd per bin
LED Vf Bin Rank 1 (2.8-3.0 V) and 2 (3.0-3.2 V)
LED Forward Voltage Range for All 6
LED Series Lines
4.9.2. Backlight Synchronization Requirement (to avoid BL shimmering)
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(Characterized at LVDS Connector for 23 mA)
MAX: 28.8 V

The Vsync/STV signal is a once-per-frame pulse that has a constant phase delay with
respect to the start of the frame. This signal is used by the backlight LED driver to
synchronize BL PWM with the frame update to avoid shimmering (waterfall) artifacts in
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the image.
The minimum pulse width is 1 us.
4.9.3. Backlight Electrical Characteristics
The backlight brightness test shall be tested at 600Hz PWM 94% cycle & 23 mA peak current
with following percentage duty cycle
LED Current (%
duty cycle)
LED Forward
Voltage for any
LED string
Power (W)
Assuming 3.2V
max forward bias
Luminance (nits)
Display Typical
Luminance (nits)
Display
Maximum
Luminance (nits)
94% 28.8 V 3.73 250 275 300
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19% 28.8 V 0.75 50 55 60
5% 28.8 V 0.19 12 14 15
4.9.4. LED Connection
String LED1 LED2 LED3 LED4 LED5 LED6 LED7 LED8 LED9
1
2
3
4
5
6
1 7 13 19 25 31 37 43 49
2 8 14 20 26 32 38 44 50
3 9 15 21 27 33 39 45 51
4 10 16 22 28 34 40 46 52
5 11 17 23 29 35 41 47 53
6 12 18 24 30 36 42 48 54
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5.
OPTICAL REQUIREMENTS
5.1. Optical Specifications
Supplier must submit optical measurement data from 20 samples for items marked critical in
Table 6.1.1. The optical performance will be based on supplier’s measurement data, visual
inspection of the samples, verification measurements, and specification correlation.
Table 6.1.1: Optical Characteristics
Parameter Symbol
Iso-Contrast Viewing Angle
CR ≥ 10
Contrast ratio CR Optimal 400 600 -- -- 1,2,3
Luminance Y I
Global Luminance Uniformity Optimal 50 -- % 1,2
Worst Neighbor Luminance
Uniformity
Gamma
Flicker F No Visual Flicker
Cross Talk D
Worst Low Level (dark)
Inversion Viewing Direction
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θ
down 45 50
left/right 55/55 60/60
Optimal 80 -- % 1,2
γ
Optimal -- 2.0 % 1,2,3
SHA
PCB on the
Condition Min. Typ. Max. Unit Note
up 45 50 -- Degrees 1,2,3
=23 mA
LED
@94% duty cycle
-- -- 2.2 -- -- 1,2,3
bottom
220 250 -- cd/m2 1,2,4
-- -- -30 dB 1,2,3
-- 6:00 -- o’clock 1,2
Response (rise+fall time)
Gray to Gray Response time
(all panels)
(Within one panel)
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τ
θ = 0°, Ta=25°C
on+off
τ
θ = 0°, Ta=25°C
G2G
x CIE 1931 0.297 0.313 0.329 -- 1,2,3 White Chromaticity
y 0.313 0.329 0.345 -- 1,2,3
delta x 0.005 White Chromaticity
delta y 0.008
x CIE 1931 0.620 0.640 0.660 -- 1,2,3 Red Chromaticity
y 0.315 0.330 0.345 -- 1,2,3
-- 16 25 ms 1,2,3
-- 40 ms 1,2,3

Parameter Symbol
Condition Min. Typ. Max. Unit Note
Green Chromaticity
Max color difference within
one panel
Max color difference w.r.t.
Center within one panel
Max color difference from
panel to panel
Max color difference between
neigbors
Note 1: The testing conditions are specified in 6.2.
Note 2: The definitions of optical characteristics are shown in 6.3.
Note 3: Measured at center point. Equivalent performance over the entire panel required.
Note 4: Both center point and average of 160 points.
x CIE 1931 0.290 0.310 0.330 -- 1,2,3
Y 0.590 0.610 0.630 -- 1,2,3
X CIE 1931 0.120 0.150 0.170 -- 1,2,3 Blue Chromaticity
Y 0.040 0.060 0.080 -- 1,2,3
du’v’ white 0.005 1,2
du’v’ white 0.003 1,2
du’v’ white 0.008
du’v’ white 0.0025
1,2
5.2. Measuring Conditions
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The optical characteristics are determined after the unit has been ‘ON’ and stable for
approximately 30 minutes at the maximum brightness, in a dark environment at an
ambient temperature at 25°C ± 2°C. The electrical conditions include Vcc = 3.3 V, fv =
60 Hz, f
measuring equipments for luminance and color are CCD based imaging systems such as
Radiant Imaging Prometric 1400 system, or Colorimeter such as Photo Research PR650,
TOPCON BM-5A or similar. The measuring distance should be about 50 cm from the
LCD surface at normal unless otherwise specified. Measurements should be done on the
160 grid points as shown in the following figures. The measurement spot at the center is
approximately 12 mm in diameter from a distance of 400 mm by TOPCON BM-5A or
15 mm in diameter from a distance of 500 mm by PR 650.
= 72.5 MHz, IBL = 23 mA @94% duty cycle with 600Hz. Recommended
CLK
Viewing angle measurements should be done by an Eldim EZ Color system or similar.
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The CIE 1931 or 1976 Standards will be used.
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Luminance and Color Measurement
X-Y Stage
LCD Module
TOPCON BM-5A
or PR650 or CCD
400 or 500 mm
Viewing Angle Measurement
ELDIM EZ Color or equivalent
Figure 6-1: Optical Measurement Set-up
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Figure 6-2: Measurement point location. L and W are the length and width of Active Area
respectively.
5.3. Definition
5.3.1. Center Point Luminance
Lct =(L
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5.3.2. Average Luminance
L
where L1 to L
5.3.3. Luminance Uniformity
The entire display active area shall be scanned with the luminance measurement
with white screen set full brightness.
two kinds of data for brightness uniformity: Luminance Uniformity, and Worst
Neighbor Luminance Uniformity. The definitions are shown in below:
72+ L73+ L88+ L89
= SUM(L1:L
Ave
160
)/4{Average Luminance value at point #72, 73, 88, 89}
) / 160
160
are the luminance values measured at point #1 to #160.
5.3.3.1. Global Luminance Uniformity:
U = 100% - (L
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where, L
max-Lmin
= max {Luminance values at 160 points},
max
)/L
max

= min {Luminance values at 160 points}
L
min
5.3.3.2. Worst Neighbor Luminance Uniformity (The 4 points that are closest to
the test point)
WNU=100%-Max(∆L1, ∆L2, ∆L3, ∆L4)/L0
Global WNU = min (WNU1, …WNU160)
5.3.4. Contrast Ratio
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CR = Luminance at G
#72, 73, 88, 89}
5.3.5. White Color Uniformity
The entire display active area shall be scanned with the color coordinate
measurement with white screen set full brightness.
5.3.5.1. Panel to Panel White Color Uniformity
The center point (as defined by the average value at point #72, 73, 88, 89) white
color coordinate of any panel shall be within the box with 4 corners coordination
boundary listed in Table 6.1.
/ Luminance at G
max
{Average contrast value at point
min
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5.3.5.2.
Max Color Difference with respect to the center within a panel
On each panel, the maximum color difference between any of the 160 points and
the center point (defined as the average value at point #72, 73, 88, 89),
represented in delta u’v’.
5.3.5.3. Max Color Difference between any two points within the panel
On each panel, the maximum color difference between any two of the 143 points ,
represented in delta u’v’.
5.3.5.4. Max Color Difference between two neighbors
On each panel, the maximum color difference between any two neighboring
points on the panel, represented in delta u’v’
5.3.6. RGB Color Chromaticity
The entire display active area shall be scanned with the color coordinate
measurement with screen set to full brightness and solid R, G, B color
respectively. The measured color coordinate of any panel shall be within the box
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with 4 corners coordination boundary listed in Table 6.1.
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5.3.7. Viewing Angle
The viewing angle is defined as the viewing angle range under the condition at
CR > 10:1 .
Normal Line
o
φ = 0
θ
L
φ
o
θ L =90
6 O’clock
direction
φ L= 90o
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x
L
o
,
θ = 0
θ
R
φ
H
y
12 O’clock
direction
x'y'
θR =90
φ H = 90o
o

Figure 6-4: Viewing angle definition
5.3.8. Gray Scale Inversion
Luminance vs. viewing angle curves are measured based on gray level 255, 223,
191, 159, 127, 95, 63, 32 and 0, in the viewing angle of left, right, up, down, with
PCB on the bottom side. Gray scale inversion happens when a higher gray scale
measures the same luminance or lower luminance than any of the lower gray scale.
5.3.9. Response Time
5.3.9.1. On and Off Response Time
The On/Off response time, tR + tF, is defined in the following figure and shall be
measured by switching the input signal for “black” and “white”.
s
Display data
Optical
Response
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5.3.9.2. Gray to Gray Response Time
White (TFT OFF)
100%
90%
10%
0%
Black (TFT ON)
t
R
Figure 6-5: Response Time Measurement
White (TFT OFF)
t
F
Time
Gray to Gray Response Time is measured in a similar method. But instead of
switching display between black and white, panel is switched between two gray
scales. The maximum gray-to-gray response time is based on 9 levels of gray
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scales. The 9 levels are: gray level 255, 223, 191, 159, 127, 95, 63, 32 and 0.
Figure 6-6 shows an example of Gray to Gray Response Time measurement data.
Response護Tim
e
50
40
30
[ms]
20
10
255
223
191
Start Gray scale
159
127
95
63
32
0 0
63
32
127
95
159
Arrival Gray scale
0
255
223
191
Figure 6-6: Gray to Gray Response Time
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5.3.10. Gray Scale Linearity or Gamma Value
The display luminance, LG, is measured at the different gray scales, G
, …, G
min
max
.
The exponential fitting is used to determine the gamma (γ) value, which should be
an intrinsic or uncorrected characteristic.
LG ~ Gϒ.
5.3.11. Flicker
No visual flicker will be allowed
. The flicker level should be measured with
either vertical stripes or a checker pattern, defined in Sec. 5.3.6. The output signal
of a photometer is sent to an FFT analyzer. The flicker is essentially a ratio of the
powers in the frequency spectrum at 30 Hz (Px) and 0 Hz (P0),
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i.e
.,

5.3.12. Cross-talk
No visual cross-talk will be allowed. Two luminance values are measured at
F = 10 Log (P
/ P0).
x
center spot with 50 x 50 pixels. The cross-talk, D
D
= (LB – LA)/LB • 100%,
SHA
Where, LA = Luminance in Pattern A
LB = Luminance in Pattern B.
Pattern A
Gray Scale = 127/255 in center
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5.4. Hot Spot Specifications:
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, is defined as,
SHA
Pattern B
Gray Scale = 127/255 full screen
The LED hot spot shall be inspected from 70 degree to -40 degree per the drawing
below. There shall be no visible hot spot or no worse than “limited sample” hot spot (if
there is a “limited sample” set up.
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6. ENVIRONMENTAL
The display modules shall meet all functional and cosmetic specifications after testing to the
nvironmental quality standards listed in this section. Additionally, the LCD modules in products
shall pass all the system testing requirements listed in the end of this document.
6.1. Shock and Vibration
7.1.1 There will be no functional or cosmetic defects following a shock to all 6 sides
delivering at least 200 G in a half sine pulse no longer than 2 ms to the display
module, secured by its designated mounting details, in accordance with MIL-STD-
202F Method 213B, test condition A.
7.1.2 There will be no functional defects following a shock delivering at least 260 g in a
half sine pulse no longer than 2 ms to each of 6 sides. Each of the 6 sides will be
shock tested with one each display, for a total of 6 displays. The displays are secured
by designated mounting details, in accordance with MIL-STD-202F Method 213B,
test condition A.
7.1.3 There will be no functional or cosmetic defects following a shock delivering at least
60 G in a pulse 11 msec or longer to the display module, secured by its designated
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mounting details, in accordance with MIL-STD-202F Method 213B, test condition A.
7.1.4 There shall be no functional or cosmetic defects following a vibration test,
conducted at
with the display secured by its designated mounting details, and conducted in
accordance with MIL-STD-202F, method 201A.
3.0
G from 5–150 Hz, 0.37 Oct/min with sine wave for 30 min./axis,
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6.2.
Temperature and Humidity
Unless otherwise stated in this specification, the display module must meet functional
and cosmetic requirements after testing in accordance with Spec. # 080-0859, non-
operating and operating conditions.
For these tests, the following limits set forth in Specification #080-0859 shall be altered
to read.
6.2.1. General Performance Requirements
90%
60
80%
50%
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-25 0 10 20 30
Note:
1) Maximum wet bulb temp operating temperature is 39°C.
Wet Bulb
Temperature
39
30
20
10
0
Dry Bulb Temperature [°C]
50
48
40
40 50 60 70 80
40%
30%
20%
10%
Humidity [%(RH)]
+
Operation
2) Maximum wet bulb temp storage temperature is 48°C.
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6.2.2. Non-operational Testing
6.2.2.1. Low Temperature
6.2.2.2. High Temperature
65°C @ 500 hrs
6.2.2.3. High Temperature and High Humidity
60°C @ 500 hrs, R.H. = 75% ± 10%
6.2.2.4. Thermal Shock
Cycle display from -25°C to 65°C with 5-minute transfer time,
100 cycles at -25°C/65°C/-25°C.
6.2.3. Operational Testing
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6.2.3.1. Low Temperature
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-25°C @ 500 hrs
0°C for 500 hours
6.2.3.2. High Temperature
50°C for 500 hours
6.2.3.3. High Temperature and High Humidity
50°C and 90% R.H. for 240 hours (Functional Check)
Maximum wet-bulb temperature at 39°C or lower without
condensation.
6.2.3.4. Four Corner Test (72 hrs – operating)
40°C @ 10% RH
40°C @ 90% RH
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10°C @10% RH
10°C @ 90% RH
Altitude
6.3.
72 hour storage
Operational: 15,000 Ft.
Non-Operational: 40,000 Ft.
7. RELIABILITY
7.1. Resistance to Normal Abuse
7.1.1. Torsion Test
Module is fixed by 4 mounting holes (A, B, & C) on stable supports. Tester is
connected to mounting hole on free floating module corner. Push/Pull test is
conducted on all four corners.
7.1.2. Test Conditions:
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Applied Force 20 N
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Cycles 10 K
Frequency (F=push / pull)1 Hz (1 cycle / sec.)
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7.1.3. Test Set-up
7.1.4. Static Load Deflection and Breakage
Supplier shall demonstrate compliance per Specification 062-2208 Static
Breakage Test
7.2. Electrostatic Discharge (ESD)
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Display modules are to be tested for ESD susceptibility per specification 062-
0302. The display modules must meet the Level 1 for the bare module, and Level
1 through III test requirements stated in the above referenced specification, when
assembled in a portable computer.
7.3. MTBF
Supplier to demonstrate display module meets minimum 50,000 Hrs.@90%
Confidence Supplier to include any acceleration factors included in the
calculations. Power cycling frequency during this test is to be approved.
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7.4. LCD Glass Strength
The LCD glass strength (failure load) will be defined at a single 90% survival rate value on
Weibull distribution. Please provide the optimized loading performance in the similar chart
format below. The failure load of the 90% Weibull survival rate shall be higher than TBD N.
Probability Plot for bendload
Complete Data - LSXY Estimates
99
90
80
70
60
50
40
30
20
Percent
10
5
3
2
1
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The 4 point bend test shall be used for the LCD glass strength test. The detailed fixture design/
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shall follow the ASTM standard C158-02. The fixture is used in conduction with a load-
displacement machine, commonly known as Instron.
EXAMPLE ONLY
Bending Load (Newton)
bendload
Weibull
Table of Statistics
Shape
Scale 0.0024863
Mean 0.0023964
StDev 0. 0002073
Median 0. 0024227
IQR 0. 0002677
Failure 22
Censor 0
AD* 1.220
Correlation 0.972
0.00280.00260.00240.00220.00200.0018
14.1433
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Two orientations must be tested for this specification: orientation A (Figure 2.A) and orientation B
(Figure 2.B)
This test shall be performed on 30 samples, WITH current POLARIZERS laminated on both top
and bottom of the LCD glass, per applicable orientation as a First Article Inspection and when
settings, tooling, and equipment are modified. Supplier is responsible for monitoring glass strength
on an ongoing production basis. The test shall be conducted with a top rollers velocity of 1 mm/min.
As soon as the first plane breaks, the test shall be stopped to prevent the second plane from
breaking.
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Orientation A. Longer plane parallel to ledge Orientation B. Shorter plane parallel to ledge
Figure 2. Display orientations measuring strength at edges
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LCD glass strength data collection
Failure initiation site must be determined by visual inspection by selecting one of the different cases shown below
(Figure 3).
Case A) If the failure is starting from the bottom edge or close to it, enter letter A.
Case B) If the failure is starting from the top edge or close it, enter letter B.
Case C) If the failure is starting from the surface of glass, away from the edges and showing branching in both
directions, enter letter C.
Case D) When testing in orientation D (Figure 1.D), if the failure is starting at the epoxy region between the panes,
enter letter C edges of the glass (case D).
Case E) If during testing a snap is heard, but no crack is visible, enter letter E
Case O) If the failure does not match any of the above or cannot be easily recognized due to catastrophic breakage,
enter letter O.
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Initiation site
Initiation site
Initiation site
Initiation site
Initiation site
Initiation site
OR
OR
OR
Small branching
Small branching
Small branching
near edge
near edge
near edge
Case A. Failure from bottom edge (with or without slight branching near edge)
OR
OR
Initiation site
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Case B. Failure from top edge (with or without slight branching near edge)
Initiation site
Approximate
Approximate
initiation site
initiation site
Small branching
Small branching
near edge
near edge
Epoxy
Epoxy
Ledge
Ledge
Initiation site
Initiation site
Failure
Failure
Approximate
Approximate
initiation
initiation
initiation site
initiation site
site
site
Case C. Initiation on surface of glass Case D. Failure at surface on epoxy region (Orientation D)
Figure 3 Surface crack initiation.
All failure loads and failure initiation sites will be entered in the following table below.
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Orientation a b c d (Circle one)
W [mm] = Llong [mm] =
Lshort [mm] = t [mm] =
Failure Initiation
Unit # Failure Load [N]
D, E, or O)
1
2
3
4
5
6
7

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8. COSMETIC REQUIREMENTS
Cosmetic Specification for Notebook Display, 062-7003E.
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9. REGULATORY
9.1. Product Safety (Environmental, Ergonomics, Safety and Health)
Materials: specific chemical composition information or certifications necessary for the
product to enter countries, markets, and/or for component(s) material identification, or for
to respond to customer requests for information. The information may be in the form of,
but is not limited to, Material Safety Data Sheets, material specification sheets, health
hazard information, certifications, or other forms of documentation.
9.2. RoHS Compliance and other Substance Regulations
This product’s components, parts, and packaging shall be manufactured or assembled
based upon the following requirements.
10.2.1 The display module must comply with the European RoHS directive, As evidence
of such compliance, the supplier must provide a declaration of conformity in
accordance with RoHS Declaration of Conformity Procedure, 080-2153.
10.2.2 In addition to RoHS compliance, the display module and its manufacturing
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process shall comply with Regulated Substances Specification, 069-0135.
10.2.3 The vendor shall provide a written statement declaring the average and maximum
amount of mercury in the display module.
10.3 Halogen Free
Flat panel display must be must be halogen-free in accordance with the Halogen-Free
Specification, 069-1857
9.3. Environmental Markings and Recycling
10.3.1 Flat panel display must be modular in design so that parts can be easily separated,
without any special tools, for ease of proper recycling/disposal at the product's
end-of-life.
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10.3.2
Flat panel display plastic parts >25 grams must be marked according to ISO
11469 (except for the LGP (light guide panel) and optical films in the backlight).
9.4. Product Safety
Flat panel display assembly shall comply with Specification,
069-0279, Product Safety Requirements for Component Flat Panel Display
Assemblies.
9.5. Ergonomics
The flat panel display must comply with the ergonomic requirements of ISO 13406 parts
1 and 2. The vendor shall provide a written statement that the flat panel display, is
certified to comply with ISO 13406, parts 1 and 2.
9.6. Electromagnetic Compatibility (EMC)
10.6 Emissions
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The final product must meet Class B Emission Standards for home electronic
device when configured within a system Spec. #062-0718. The display supplier
must provide all necessary support as required to meet this requirement. EMI
measurements are taken at the worst-case contrast setting.
10.6.1 Susceptibility
Performance degradation due to external noise or RF will be considered as
specified in #062-0718 for Class B products.
10.6.2 Spectrum Spreading Compatibility (SSC)
10.6.2.1
Emissions
The final product must be compatible with spectrum spreading conditions
specified in 1.2.2 of this document. No failure or degradation in electronic
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functionality and optical performance is allowed with the spreading turned
ON compared to that when it is turned OFF.
10.6.2.2
Spreading %: 0% (min.), 0.75% (typical), and 1.5% (max.)
Spreading type: center or down
Modulation Rate: 40 to 80 kHz.
Conditions for Spectrum Spreading
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11 FACTORY/SERVICE REQUIREMENTS
11.1 SQBR
Factory requirements are outlined in Supplier Quality and Business Requirements,
specification 070-1191.
11.6 SERVICE REQUIREMENTS
Service Requirements are outlined in specification 070-0385.
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12 REFERENCE DOCUMENTS
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