2.0 General Description...............................................................................................................................................5
3.0 Absolute Maximum Ratings.................................................................................................................................7
5.0 Signal Interface......................................................................................................................................................9
5.2 Signal Pin.......................................................................................................................................................................... 9
5.3 Signal Description .......................................................................................................................................................... 10
5.4 Signal Electrical Characteristics..................................................................................................................................... 10
5.5 Signal for Lamp connector ............................................................................................................................................. 11
6.0 Pixel Format Image.............................................................................................................................................12
7.0 Parameter guide line for CCFL Inverter ..........................................................................................................12
9.0 Power Consumption............................................................................................................................................15
10. Power ON/OFF Sequence...................................................................................................................................16
(C) Copyright AU Optronics
Dec., 2003 All Rights Reserved. B121EW01 V.0 Ver.02
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II Record of Revision
Version and Date Page Old description New Description Remark
V1. 2003/07/29 All First Release NA
V2 2003/11/18 5,8,12
,14,15
Un-define Brightness, optical characteristics
Parameter guide line for CCFL
Timing Control ,
Power Consumption
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No Reproduction and Redistribution Allowed. 3/19
1.0 Handling Precautions
1) Do not press or scratch the surface harder than a HB pencil lead because the polarizers are very fragile
and could be easily damaged.
2) Be sure to turn off power supply when inserting or disconnecting from input connector.
3) Wipe off water droplets or oil immediately. Long contact with the droplets may cause discoloration or
spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface.
6) Protect the module from static electricity and insure proper grounding when handling. Static electricity
may cause damage to the CMOS Gate Array IC.
7) Do not disassemble the module.
8) Do not press the reflector sheet at the back of the module.
9) Avoid damaging the TFT module. Do not press the center of the CCFL Reflector when it was taken out
from the packing container. Instead, press at the edge of the CCFL Reflector softly.
10) Do not rotate or tilt the signal interface connector of the TFT module when you insert or remove other
connector into the signal interface connector.
11) Do not twist or bend the TFT module when installation of the TFT module into an enclosure (Notebook
PC Bezel, for example). It should be taken into consideration that no bending/twisting forces are applied
to the TFT module from outside when designing the enclosure. Otherwise the TFT module may be
damaged.
12) Cold cathode fluorescent lamp in LCD contains a small amount of mercury. Please follow local regulations for
disposal.
13) The LCD module contains a small amount of material that has no flammability grade, so it should be supplied
by power complied with requirements of limited power source (2.11, IEC60950 or UL1950).
14) The CCFL in the LCD module is supplied with Limited Current Circuit (2.4, IEC60950 or UL1950). Do not
connect the CCFL in Hazardous Voltage Circuit.
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(C) Copyright AU Optronics
Dec., 2003 All Rights Reserved. B121EW01 V.0 Ver.02
No Reproduction and Redistribution Allowed. 4/19
2.0 General Description
This specification applies to the 12.1 inch wide Color TFT/LCD Module B121EW01 V1
This module is designed for a display unit of notebook style personal computer.
The screen format is intended to support the SXGA (1280(H) x 800(V)) screen and 262k colors (RGB 6-bits
data driver).
All input signals are LVDS interface compatible.
This module does not contain an inverter card for backlight.
Note 1: 5 points position (Display area : 261.12mm x 163.2)
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W/4W/4W/4W/4
H/4
1
H/4
H
H/4
4
H/4
W
3
2
5
(C) Copyright AU Optronics
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No Reproduction and Redistribution Allowed. 8/19
Note 2: 13 points position
10
W/4
W/4
W
W/4
W/4
10
10
10
1
4
6
9
11
H/4
H/4
H
H/4
H/4
12
2
5
7
10
3
8
13
5.0 Signal Interface
55..11 CCoonnnneeccttoorrss
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following components.
Connector Name / Designation
Manufacturer
Type / Part Number
Mating Housing/Part Number
Mating Contact/Part Number
Connector Name / Designation
Manufacturer
Type / Part Number
Mating Type / Part Number
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For Signal Connector
Hirose
DF19K-20P-1H
DF19G-20S-1C
DF19-2830 SCFA
For Lamp Connector
JST
BHSR-02VS-1
SM02B-BHSS-1-TB
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Dec., 2003 All Rights Reserved. B121EW01 V.0 Ver.02
No Reproduction and Redistribution Allowed. 9/19
55..33 SSiiggnnaall DDeessccrriippttiioonn
The module uses a LVDS receiver embedded in AUO’s ASIC. LVDS is a differential signal technology for LCD
interface and high-speed data transfer device.
Signal NameDescription
RxIN0-, RxIN0+LVDS differential data input(Red0-Red5, Green0)
RxIN1-, RxIN1+LVDS differential data input(Green1-Green5, Blue0-Blue1)
RxIN2-, RxIN2+LVDS differential data input(Blue2-Blue5, Hsync, Vsync, DSPTMG)
RxCLKIN-, RxCLKIN0+LVDS differential clock input
VDD+3.3V Power Supply
GNDGround
Note: Input signals shall be in low status when VDD is off.
Internal circuit of LVDS inputs are as following.
Signal NameDescription
+RED5
+RED4
+RED3
+RED2
+RED1
+RED0
Note: Output signals from any system shall be low or Hi-Z state when VDD is off.
Red Data 5 (MSB)
Red Data 4
Red Data 3
Red Data 2
Red Data 1
Red Data 0 (LSB)
Red-pixel Data
Green Data 5 (MSB)
Green Data 4
Green Data 3
Green Data 2
Green Data 1
Green Data 0 (LSB)
Green-pixel Data
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Blue Data 5 (MSB)
Blue Data 4
Blue Data 3
Blue Data 2
Blue Data 1
Blue Data 0 (LSB)
Blue-pixel Data
Data Clock
Display Timing
Vertical Sync
Horizontal Sync
Red-pixel Data
Each red pixel's brightness data consists of these 6 bits
pixel data.
Green-pixel Data
Each green pixel's brightness data consists of these 6 bits
pixel data.
Blue-pixel Data
Each blue pixel's brightness data consists of these 6 bits
pixel data.
The typical frequency is 65.0 MHz. The signal is used to
strobe the pixel data and DSPTMG signals. All pixel data
shall be valid at the falling edge when the DSPTMG signal
is high.
This signal is strobed at the falling edge of
-DTCLK. When the signal is high, the pixel data shall be
valid to be displayed.
The signal is synchronized to -DTCLK .
The signal is synchronized to -DTCLK .
(C) Copyright AU Optronics
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Input signals shall be in low status when VDD is off.
It is recommended to refer the specifications of SN75LVDS86DGG (Texas Instruments) in detail.
Signal electrical characteristics are as follows;
Parameter Condition Min Max Unit
Vth
Vtl
LVDS Macro AC characteristics are as follows:
Clock Frequency (F) 20MHz 85MHz
Data Setup Time (Tsu) 600ps
Data Hold Time (Thd) 600ps
Differential Input High
Voltage(Vcm=+1.2V)
Differential Input Low
Voltage(Vcm=+1.2V)
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6.0 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format.
7.0 Parameter guide line for CCFL Inverter
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Parameter Min DP-1MaxUnits Condition
White Luminance
5 points average
CCFL current(ICFL) 6.0 7.0 [mA] rms
CCFL Frequency(FCFL) 50 60 80 [KHz]
CCFL Ignition Voltage(Vs) 1500
CCFL Voltage (Reference)
(VCFL)
CCFL Power consumption
(PCFL)
Note 1: DP-1 are AUO recommended Design Points.
*1 All of characteristics listed are measured under the condition using the AUO Test inverter.
*2 In case of using an inverter other than listed, it is recommended to check the inverter carefully. Sometimes,
interfering noise stripes appear on the screen, and substandard luminance or flicker at low power may happen.
*3 In designing an inverter, it is suggested to check safety circuit ver carefully. Impedance of CCFL, for instance,
becomes more than 1 [M ohm] when CCFL is damaged.
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*4 Generally, CCFL has some amount of delay time after applying start-up voltage. It is recommended to keep
on applying start-up voltage for 1 [Sec] until discharge.
*5 The CCFL inverter operating frequency must be carefully chosen so that no interfering noise stripes on the
screen were induced.
*6 Reducing CCFL current increases CCFL discharge voltage and generally increases CCFL discharge
frequency. So all the parameters of an inverter should be carefully designed so as not to produce too much
leakage current from high-voltage output of the inverter.
Note 2: It should be employed the inverter, which has “Duty Dimming”, if ICCFL is less than 4mA.
Note 3: The CCFL inverter operating frequency should be carefully determined to avoid interference between
inverter and TFT LCD.
Note 4: The inverter open voltage should be designed larger than the lamp starting voltage at T=0
backlight may be blinking for a moment after turning on or not be able to turn on. The open voltage should
be measured after ballast capacitor. If an inverter has shutdown function it should keep its open voltage. for
longer than 1 second even if lamp connector is open.
Note 5: Calculator value for reference (ICFL×VCFL=PCFL)
o
C, otherwise
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8 Timing Control
(C) Copyright AU Optronics
Dec., 2003 All Rights Reserved. B121EW01 V.0 Ver.02
This is the signal timing required at the input of the user connector . All of the interface signal timing should be satisfied with
the following specifications .
88..22 TTiimmiinngg DDeeffiinniittiioonn
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9.0 Power Consumption
Input power specifications are as follows;
Symbol Parameter Min Typ Max UnitsCondition
Module
VDD Logic/LCD Drive
PDD VDD Power 1.6 [Watt] All Black Pattern
PDD Max VDD Power max 1.7 [Watt]
IDD IDD Current 400 mA 64 Grayscale Pattern
IDD Max IDD Current max 420 mA Vertical stripe line Pattern
VDDrp Allowable
VDDns Allowable
Lamp
ICFL CCFL current 3.0 6.0 7.0 [mA]
VCFL CCFL Voltage
PCFL CCFL Power
Total Power
Consumption
3.0 3.3 3.6 [Volt] Load Capacitance 20uF
Voltage
Max Pattern Note
Note
500 [mV]
Logic/LCD Drive
Ripple Voltage
100 [mV]
Logic/LCD Drive
Ripple Noise
(Reference)
consumption
5.1 Watt (w/o Inverter, All black pattern)@LCM circuit 1.6 Watt(typ.),B/L input 3.5
Watt(typ.)
580
3.5
p-p
p-p
rms
[Volt]
rms
[Watt]
(Ta=25℃)
(Ta=25℃)
(Ta=25℃)
Note : VDD=3.3V
(C) Copyright AU Optronics
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10. Power ON/OFF Sequence
VDD power and lamp on/off sequence is as follows. Interface signals are also shown in the chart. Signals
from any system shall be Hi-Z state or low level when VDD is off.
Sequence of Power-on/off and signal-on/off
Power Supply VDD
LVDS Interface
Backlight On
Apply the lamp voltage within the LCD operating range. When the backlight turns on before the
LCD operation or the LCD turns off before the backlight turns off, the display may momentarily
become abnormal.
Items Required Condition
Temperature Humidity Bias
High Temperature Operation
Low Temperature Operation
Continuous Life
On/Off Test ON/30 sec. OFF/30sec., 30,000 cycles
Hot Storage
Cold Storage
Thermal Shock Test
Hot Start Test
Cold Start Test
Shock Test (Non-Operating)
Vibration Test (Non-Operating)
ESD
Altitude Test
Maximum Side Mount Torque 2.5kgf.cm .
CCFL Life : 10,000 hours minimum
MTBF(Excluding the CCFL) : 50,000 hours with a confidence level 90%
-20℃/30 min ,60℃/30 min 100cycles
50℃/1 Hr min. power on/off per 5 minutes, 5 times
0℃/1 Hr min. power on/off per 5 minutes, 5 times
200G, 3ms, Half-sine wave
Sinusoidal vibration, 1.5G zero-to-peak, 10 to 500 Hz,
0.5hr in each of three mutually perpendicular axes.
Contact : operation ±8KV / non-operation ±10KV
Air : operation ±15KV / non-operation ±20KV
10000 ft / operation / 8Hr
30000ft / non-operation / 24r
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1111..22 SSaaffeettyy
UL60950
(C) Copyright AU Optronics
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12 . Outline drawing
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(C) Copyright AU Optronics
Dec., 2003 All Rights Reserved. B121EW01 V.0 Ver.02
No Reproduction and Redistribution Allowed.
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