AU Optronics B101EW01-V1 Product Specification

Product Specification

) Preliminary Specifications

( ( V ) Final Specifications

Module 10.1” SD+ 16:9 Color TFT-LCD

AU OPTRONICS CORPORATION

Model Name

Note ( )

Customer Date

All 7/29/2009

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Checked &

Approved by

B101EW01 V1

LED Backlight with driving circuit design

Date

Approved by Date

Howard Lee

Prepared by

7/29/2009

Note: This Specification is subject to change without notice.

Carol Tang

NBBU Marketing Division /

AU Optronics corporation

7/29/2009

B101EW01 V1 document version : 2.1

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Product Specification

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Contents

1. Handling Precautions........................................................................................................ 4

2. General Description .......................................................................................................... 5

2.1 General Specification...................................................................................................................................... 5

2.2 Optical Characteristics ................................................................................................................................... 6

3. Functional Block Diagram ............................................................................................... 11

4. Absolute Maximum Ratings............................................................................................. 12

4.1 Absolute Ratings of TFT LCD Module......................................................................................................... 12

4.2 Absolute Ratings of Environment................................................................................................................ 12

5. Electrical characteristics................................................................................................. 13

5.1 TFT LCD Module............................................................................................................................................ 13

5.2 Backlight Unit ................................................................................................................................................ 15

6. Signal Characteristic....................................................................................................... 16

6.1 Pixel Format Image........................................................................................................................................ 16

6.2 The input data format.................................................................................................................................... 17

6.3 Integration Interface Requirement ............................................................................................................... 18

6.4 Interface Timing............................................................................................................................................. 20

6.5 Power Sequence............................................................................................................................................ 21

6.5.1 Panel Power Sequence .............................................................................................................................. 21

7. Panel Reliability Test ...................................................................................................... 22

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7.1 Vibration Test................................................................................................................................................. 22

7.2 Shock Test...................................................................................................................................................... 22

7.3 Reliability Test ............................................................................................................................................... 22

8. Mechanical Characteristics.............................................................................................. 23

8.1 LCM Outline Dimension ................................................................................................................................ 23

9. Shipping and Package..................................................................................................... 26

9.1 Shipping Label Format.................................................................................................................................. 26

9.2 Carton package.............................................................................................................................................. 27

9.3 Shipping package of palletizing sequence ................................................................................................. 27

10. Appendix: EDID description .......................................................................................... 28

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B101EW01 V1 document version : 2.1

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Product Specification

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Record of Revision

Version and Date Page

0.1 2008/12/29 All First Edition for Customer

1.0 2008/3/27 All Final Edition

2.0 2009/05/07 26 HW control table [Radium IC] HW control table [Novatek IC]

27 Carton Package (1 layer) Carton Package (2 layer)

2.1 2009/07/29 28~31

EDID checksum 9B

Old description New Description Remark

EDID checksum C3

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B101EW01 V1 document version : 2.1

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Product Specification

1. Handling Precautions

1) Since front polarizer is easily damaged, pay attention not to scratch it.

2) Be sure to turn off power supply when inserting or disconnecting from input connector.

3) Wipe off water drop immediately. Long contact with water may cause discoloration or spots.

4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.

5) Since the panel is made of glass, it may break or crack if dropped or bumped on hard surface.

6) Since CMOS LSI is used in this module, take care of static electricity and insure human earth when handling.

7) Do not open nor modify the Module Assembly.

8) Do not press the reflector sheet at the back of the module to any directions.

9) At the insertion or removal of the Signal Interface Connector, be sure not to rotate nor tilt the Interface Connector of the TFT Module.

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11) After installation of the TFT Module into an enclosure (Notebook PC Bezel, for example), do not twist nor bend the TFT Module even momentary. At designing the enclosure, it should be taken into consideration that no bending/twisting forces are applied to the TFT Module from outside. Otherwise the TFT Module may be damaged.

12) Small amount of materials having no flammability grade is used in the LCD module. The LCD module should be supplied by power complied with requirements of Limited Power Source (IEC60950 or UL1950), or be applied exemption.

13) Disconnecting power supply before handling LCD modules, it can prevent electric shock, DO NOT TOUCH the electrode parts, cables, connectors and LED circuit part of TFT module that a LED light bar build in as a light source of back light unit. It can prevent electrostatic breakdown.

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B101EW01 V1 document version : 2.1

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Product Specification

@ Black pattern

2. General Description

B101EW01 V1 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD panel, a driver circuit, and LED backlight system. The screen format is intended to support 1280(H) x 720(V) screen and 262k colors (RGB 6-bits data driver) with LED backlight driving circuit. All input signals are LVDS interface compatible.

B101EW01 V1 is designed for a display unit of notebook style personal computer and industrial machine.

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2.1 General Specification

The following items are characteristics summary on the table at 25 ℃ condition:

Items Unit Specifications

Screen Diagonal [mm] 255.54(10.1W”)

Active Area [mm] 222.72(H) X 125.28(V)

Pixels H x V 1280x3(RGB) x 720

Pixel Pitch [mm] 0.1740 (H) x 0.1740 (V)

Pixel Arrangement R.G.B. Vertical Stripe

Display Mode Normally White

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White Luminance Note: I

Luminance Uniformity (5P) 1.25 max

Contrast Ratio 500 typ Response Time [ms] 16 typ

LED

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is LED current

[cd/m2] 180 typ

(Note1)

Nominal Input Voltage VDD [Volt] +3.3 typ.

Power Consumption [Watt]

Weight [Grams] 175 max. Physical Size

(w/ bracket & PCBA)

Electrical Interface 1 channel LVDS

B101EW01 V1 document version : 2.1

[mm]

Typ Max Note

2.7W 2.9W

3.1W 3.3W

L W T

Max 243.5 147.0 3.6

Typical 243.0 146.5

Min 242.5 146.0 -

Type I , Vin =12V Type I , Vin =5V

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Product Specification

RoHS Compliance

Glass Thickness [mm] 0.5

Surface Treatment Anti-Glare

Support Color 262K colors ( RGB 6-bit )

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Temperature Range

Operating Storage (Non-Operating)

RoHS Compliance

[oC] [oC]

0 to +50

-20 to +60

2.2 Optical Characteristics

The optical characteristics are measured under stable conditions at 25℃ (Room Temperature) :

Item Symbol

White Luminance

ILED=20mA

Viewing Angle

Luminance

Uniformity

Luminance

Uniformity

Contrast Ratio CR

Cross talk %

Response Time

Color /

Chromaticity

Coodinates

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Red

Green

Blue

White

θθθθR θθθθL

ψψψψH ψψψψL

δδδδ5P

δδδδ

13P

Tr

Tf

TRT

Rx

Ry

Gx

Gy

Bx

By

Wx

Wy

Conditions Min. Typ. Max. Unit Note

5 points average

Horizontal (Right)

CR = 10 (Left)

Vertical (Upper)

CR = 10 (Lower)

5 Points

13 Points

400 500 -

4

Rising

Falling

Rising + Falling

CIE 1931

153 180 -

40

10

30

- - 1.25

- - 1.60

-

- 4 -

- 16 -

0.551 0.581 0.611

0.307 0.337 0.367

0.302 0.332 0.362

0.545 0.575 0.605

0.130 0.160 0.190

0.108 0.138 0.168

0.283 0.313 0.343

0.299 0.329 0.359

45

15

35

12

cd/m2

-

degree

-

msec

1, 4, 5

4, 9

1, 3, 4

2, 3, 4

4, 6

4, 7

4, 8

4

NTSC %

B101EW01 V1 document version : 2.1

- 45 -

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Product Specification

=

Maximum Brightness of thirteen points

Minimum Brightness of thirteen points

Maximum Brightness of five

points

=

Min

imum Brightness of five points

Note 1: 5 points position (Ref: Active area)

H /4

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W / 4 W / 4 W / 4 W / 4

W

1 2

H

H /4

Note 2: 13 points position (Ref: Active area)

W /4

1 0

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H

H /4

1 0

1

6

3

4

W

W /4

4 5

W /4

2

7

5

W /4

1 0

3

8

H /4

1 0

Note 3: The luminance uniformity of 5 or13 points is defined by dividing the maximum luminance values by the minimum test point luminance

δ

W5

δ

W13

B101EW01 V1 document version : 2.1

1 1

9

1 2

1 0

1 3

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Product Specification

Field=2

°

Contrast ratio (CR)=

Brightn

ess on the “White” state

Brightness on the “Black” state

Note 4: Measurement method

The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change

during measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight

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for 30 minutes in a stable, windless and dark room, and it should be measured in the center of screen.

Photo detector

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Note 5： Definition of Average Luminance of White (YL):

Measure the luminance of gray level 63 at 5 points，Y

L (x) is corresponding to the luminance of the point X at Figure in Note (1).

Note 6： Definition of contrast ratio:

Contrast ratio is calculated with the following formula.

B101EW01 V1 document version : 2.1

= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5

L

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Product Specification

Note 7： Definition of Cross Talk (CT)

CT = | YB – YA | / YA × 100 (%)

Where

YA = Luminance of measured location without gray level 0 pattern (cd/m2)

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YB = Luminance of measured location with gray level 0 pattern (cd/m2)

Note 8: Definition of response time:

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The output signals of BM-7 or equivalent are measured when the input signals are changed from “Black” to

“White” (falling time) and from “White” to “Black” (rising time), respectively. The response time interval between the

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10% and 90% of amplitudes. Refer to figure as below.

"Black"

100%

S i

90%

g n a l

(

R e

l

a t

i

v e

v a l

u

10%

e )

0%

B101EW01 V1 document version : 2.1

Tr

Tf

"White""White"

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Product Specification

Note 9. Definition of viewing angle

Viewing angle is the measurement of contrast ratio ≧10, at the screen center, over a 180° horizontal and

180° vertical range (off-normal viewing angles). The 180° viewing angle range is broken down as follows; 90° (θ)

horizontal left and right and 90° (Φ) vertical, high (up) and low (down). The measurement direction is typically

perpendicular to the display surface with the screen rotated about its center to develop the desired measurement

viewing angle.

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B101EW01 V1 document version : 2.1

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Product Specification

3. Functional Block Diagram

The following diagram shows the functional block of the 10.1 inches wide Color TFT/LCD 40 Pin (One ch/connector

Module).

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TFT LCD

1280x(3) x720

pixels

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B101EW01 V1 document version : 2.1

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Product Specification

Operating Temperature

TOP

0

+50 [oC] Note

4

4. Absolute Maximum Ratings

An absolute maximum rating of the module is as following:

4.1 Absolute Ratings of TFT LCD Module

Item Symbol Min Max Unit Conditions

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Logic/LCD Drive Voltage

Vin -0.3 +4.0 [Volt] Note 1,2

4.2 Absolute Ratings of Environment

Item Symbol Min Max Unit Conditions

Operation Humidity HOP 5 95 [%RH] Note 4

Storage Temperature

Storage Humidity HST

Note 1: At Ta (25℃ )

Note 2: Permanent damage to the device may occur if exceed maximum values

Note 3: LED specification refer to section 5.2

Note 4: For quality performance, please refer to AUO IIS (Incoming Inspection Standard).

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TST -20 +60 [oC] Note 4

5 95

Twb=39°C

[%RH]

Note 4

Operating Range

B101EW01 V1 document version : 2.1

Storage Range

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Product Specification

90%

10%

5. Electrical characteristics

5.1 TFT LCD Module

5.1.1 Power Specification

Input power specifications are as follows;

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Symble Parameter Min Typ Max Unit

VDD Logic/LCD Drive

Voltage

PDD VDD Power IDD IDD Current

IRush Inrush Current

VDDrp Allowable

Logic/LCD Drive Ripple Voltage

Note 1 : Maximum Measurement Condition：Black Pattern

Note 2：Typical Measurement Condition: Mosaic Pattern

Note 3：Measure Condition

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3.0 3.3 3.6 [Volt]

0.7 0.8 [Watt

- -

-

250

1500 [mA]

100 [mV]

[mA]

p-p

Note

Note 1/2

Note 3

3.3V

0V

0.5ms

B101EW01 V1 document version : 2.1

Vin rising time

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Product Specification

5.1.2 Signal Electrical Characteristics

Input signals shall be low or High-impedance state when VDD is off. It is recommended to refer the specifications of SN75LVDS82DGG (Texas Instruments) in detail.

Signal electrical characteristics are as follows;

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Parameter

Vth

Vtl

VID

Vcm

Note: LVDS Signal Waveform

Differential Input High Threshold (Vcm=+1.2V)

Differential Input Low Threshold (Vcm=+1.2V)

Differential Input Voltage

Differential Input Common Mode Voltage

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Condition Min Max Unit

-100

100

1.125

100

-

600

1.375

[mV]

[V]

B101EW01 V1 document version : 2.1

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<500 Hz

5.2 Backlight Unit

5.2.1 LED characteristics

Parameter

Backlight Power Consumption

Product Specification

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Symbol

PLED

Min Typ Max Units

- 2.0 2.1

- 2.4 2.5

[Watt]

Condition

(Ta=25℃), Note 1

Type I , Vin =12V

(Ta=25℃), Note 1

Type II , Vin=5V

LED Life-Time

Note 1: Calculator value for reference P

Note 2: The LED life-time define as the estimated time to 50% degradation of initial luminous

Note 3: This panel will support lower duty ratio at PWM conditional frequency. The PWM frequency constrain

between 100 Hz to 300 Hz and a same typical 200Hz. The duty ratio support from 5% to 100%.

5.2.2 Backlight input signal characteristics

Parameter

LED Power Supply

LED Enable Input High Level

LED Enable Input Low Level

PWM Logic Input High Level

PWM Logic Input Low Level

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N/A 12,000 - -

= VF (Normal Distribution) * IF (Normal Distribution) / Efficiency

LED

Symbol

VLED

VLED_EN

VPWM_EN

Min Typ Max

6.0 12.0 21.0 [Volt]

4.5 5 5.5 [Volt]

2.5 - 5.5 [Volt]

- - 0.8 [Volt]

2.5 - 5.5

- - 0.8

Hour

Units Remark

(Ta=25℃), Note 2

IF=20 mA

Type I, Note 1

Type II, Note 1

[Volt]

PWM Input Frequency

PWM Duty Ratio

Note 1: Type I and II is an independent of design parameter. It should be separated from system design.

B101EW01 V1 document version : 2.1

FPWM 100 - 1K

Duty 5 -- 100

Duty 15 -- 100

Hz

%

PWM Frequency

≧

500 Hz

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Product Specification

6. Signal Characteristic

6.1 Pixel Format Image

Following figure shows the relationship of the input signals and LCD pixel format.

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1st Line

720th Line

1

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1280

B101EW01 V1 document version : 2.1

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Product Specification

Data Clock

6.2 The input data format

Signal Name

R5 R4 R3 R2 R1 R0

Description

Red Data 5 (MSB) Red Data 4 Red Data 3 Red Data 2 Red Data 1 Red Data 0 (LSB)

Red-pixel Data

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Red-pixel Data Each red pixel's brightness data consists of these 6 bits pixel data.

G5 G4 G3 G2 G1 G0

B5 B4 B3 B2 B1 B0

RxCLKIN

DE Display Timing This signal is strobed at the falling edge of

VS Vertical Sync The signal is synchronized to RxCLKIN . HS Horizontal Sync The signal is synchronized to RxCLKIN .

Note: Output signals from any system shall be low or High-impedance state when VDD is off.

Green Data 5 (MSB) Green Data 4 Green Data 3

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Green Data 2

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Green Data 1 Green Data 0 (LSB)

Green-pixel Data Blue Data 5 (MSB) Blue Data 4 Blue Data 3 Blue Data 2 Blue Data 1 Blue Data 0 (LSB)

Blue-pixel Data

Green-pixel Data Each green pixel's brightness data consists of these 6 bits pixel data.

Blue-pixel Data Each blue pixel's brightness data consists of these 6 bits pixel data.

The typical frequency is 54.2MHZ.The signal is used to strobe the pixel data and DE signals. All pixel data shall be valid at the falling edge when the DE signal is high.

RxCLKIN. When the signal is high, the pixel data shall be valid to be displayed.

B101EW01 V1 document version : 2.1

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Product Specification

6.3 Integration Interface Requirement

6.3.1 Connector Description

Physical interface is described as for the connector on module.

These connectors are capable of accommodating the following signals and will be following components.

Connector Name / Designation For Signal Connector

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Manufacturer

IPEX

or compatible

Type / Part Number IPEX 20455-040E-12 or compatible

Mating Housing/Part Number

IPEX 20453-040T-11 or compatible

6.3.2 Pin Assignment

LVDS is a differential signal technology for LCD interface and high speed data transfer device.

1 GND Ground

2 AVDD Power Supply +3.3V 3 AVDD Power Supply +3.3V 4 VEDID EDID +3.3V Power 5 NC No Connection (Reserve)

6

7

8 Rin0- -LVDSdifferential data input(R0-R5,G0)

9 Rin0+ +LVDSdifferential data input(R0-R5,G0) 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29

B101EW01 V1 document version : 2.1

Signal Description

CLK_EDID EDID Clock Input

DAT_EDID EDID Data Input

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GND Ground

Rin1- -LVDSdifferential data input(G1-G5,B0-B1)

Rin1+ +LVDSdifferential data input(G1-G5,B0-B1)

GND Ground Rin2- -LVDSdifferential data input(B2-B5,HS,VS,DE) Rin2+ +LVDSdifferential data input(B2-B5,HS,VS,DE)

GND Ground

ClkIN- -LVDSdifferential clock input

ClkIN+ +LVDSdifferential clock input

GND Ground–Shield

NC No Connection (Reserve) NC No Connection (Reserve)

GND Ground–Shield

NC No Connection (Reserve) NC No Connection (Reserve)

GND Ground–Shield

NC No Connection (Reserve) NC No Connection (Reserve)

GND Ground–Shield

NC No Connection (Reserve)

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Product Specification

NC

VLED

30 31 VLED_GND LED Ground 32 VLED_GND LED Ground 33 VLED_GND LED Ground 34 35 VPWM_EN System PWM Logic Input Level 36 VLED_EN LED enable input level 37 38 39 40

LVDS is a differential signal technology for LCD interface and high speed data transfer device.

Note1: Start from right side

NC No Connection (Reserve)

NC No Connection (Reserve) VLED LED Power Supply VLED LED Power Supply VLED LED Power Supply

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Pin 40

Pin 1

Note1: Input signals shall be low or High-impedance state when VDD is off.

B101EW01 V1 document version : 2.1

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Product Specification

6.4 Interface Timing

6.4.1 Timing Characteristics

Basically, interface timings should match the 1280 x 720 /60Hz manufacturing guide line timing.

Parameter Symbol Min. Typ. Max. Unit

Frame Rate - 60 Hz

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Clock frequency 1/ T

Vertical

Section

Horizontal

Section

Note : DE mode only

6.4.2 Timing diagram

T

CLOCK

DOTCLK

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Input Data

DE

57.2 61.5 80 MHz

Clock

Period TV 728 736 1023

Active TVD 720 720 720

Blanking TVB 8 16 303

Period TH 1310 1408 2047

Active THD 1280 1280 1280

Blanking THB 30 128 767

Input Timing Definition ( DE Mode)

Invaild

Data

T

HB

Pixel

1

T

VB

Pixel

2

T

Pixel

3

T

HD

H

T

V

Pixel

N-1

T

VD

Pixel

N

T

Line

T

Clock

Invaild

Data

Pixel

1

B101EW01 V1 document version : 2.1

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Product Specification

6.5 Power Sequence

6.5.1 Panel Power Sequence

VDD power and LED on/off sequence is as follows. Interface signals are also shown in the chart. Signals from any system shall be Hi-Z state or low level when VDD is off.

.

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Power Sequence Timing

Parameter

T1 0.5 - 10

T2 0 - 50

T3 200 - -

T4 0.5 - 10

T5 10 - -

T6 10 - -

T7 0 - -

T8

T9 0 - 10

T10 200 - -

T11 0.5 - 50

Min.(ms) Typ.(ms) Max.(ms)

10 200

10 - -

Value

Condition

V

LED

=6~21V(Type I)

V

LED

=5V(type II)

T12 0 - 10

T13 400 - -

B101EW01 V1 document version : 2.1

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7. Panel Reliability Test

7.1 Vibration Test

Test Spec:

Test method: Non-Operation



Acceleration: 1.5 G



Frequency: 10 - 500Hz Random



Sweep: 30 Minutes each Axis (X, Y, Z)



7.2 Shock Test

Test Spec:

Test method: Non-Operation



Acceleration: 220 G , Half sine wave



Product Specification

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Active time: 2 ms



Pulse: X,Y,Z .one time for each side



7.3 Reliability Test

Items

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Temperature

Humidity Bias

High Temperature

Operation

Low Temperature

Operation

High Temperature

Storage

Low Temperature

Storage

Thermal Shock

Test

Required Condition Note

Ta= 40℃℃℃℃, 90%RH, 300h

Ta= 50℃℃℃℃, Dry, 300h

Ta= 0℃℃℃℃, 300h

Ta= 60℃℃℃℃, 35%RH, 300h

Ta= -20℃℃℃℃, 50%RH, 250h

Ta=-20℃℃℃℃to 60℃℃℃℃, Duration at 30 min, 100 cycles

ESD

Note1: According to EN 61000-4-2 , ESD class B: Some performance degradation allowed. No data lost

. Self-recoverable. No hardware failures.

Remark: MTBF (Excluding the LED): 30,000 hours with a confidence level 90%

B101EW01 V1 document version : 2.1

Contact : ±8 KV

Air : ±15 KV

Note 1

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Product Specification

8. Mechanical Characteristics

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8.1 LCM Outline Dimension

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B101EW01 V1 document version : 2.1

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Product Specification

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B101EW01 V1 document version : 2.1

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Product Specification

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B101EW01 V1 document version : 2.1

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Product Specification

9. Shipping and Package

9.1 Shipping Label Format

* H/W code control table :

IC Combination

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Control Code H/W

Source Novatek

OAXXG OA

Gate Novatek

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B101EW01 V1 document version : 2.1

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9.2 Carton package

Product Specification

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9.3 Shipping package of palletizing sequence

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B101EW01 V1 document version : 2.1

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Product Specification

10. Appendix: EDID description

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Address

HEX

00

01

02

03

04

05

06

07

08

09

0A

0B

0C

0D

0E

0F

10

11

12

13

14

15

16

17

18

19

1A

1B

1C

1D

1E

1F

20

21

22

23

24

B101EW01 V1 EDID Code

FUNCTION Value Value Value

HEX

Header 00 00000000 0

FF 11111111 255

00 00000000 0

EISA Manuf. Code LSB 06 00000110 6

Compressed ASCII AF 10101111 175

Product Code hex, LSB first

32-bit ser # 00 00000000 0

00 00000000 0

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Video input def.

Max H image size

Max V image size

Display Gamma

Feature support

Week of manufacture 01 00000001 1

Year of manufacture 13 00010011 19

EDID Structure Ver. 01 00000001 1

EDID revision # 03 00000011 3

(digital I/P, non-TMDS, CRGB)

(rounded to cm)

(=(gamma*100)-100)

(no DPMS, Active OFF, RGB, tmg Blk#1)

Red/green low bits (Lower 2:2:2:2 bits)

Blue/white low bits (Lower 2:2:2:2 bits)

Red x (Upper 8 bits)

Red y/ highER 8 bits 56 01010110 86

Green x 55 01010101 85

Green y 93 10010011 147

Blue x 29 00101001 41

Blue y 23 00100011 35

White x 50 01010000 80

White y 54 01010100 84

Established timing 1 00 00000000 0

Established timing 2 00 00000000 0

D5 11010101 213

11 00010001 17

80 10000000 128

16 00010110 22

0D 00001101 13

78 01111000 120

0A 00001010 10

D1 11010001 209

15 00010101 21

94 10010100 148

BIN DEC

B101EW01 V1 document version : 2.1

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Product Specification

25

26

27

28

29

2A

2B

2C

2D

2E

2F

30

31

32

33

34

35

36

Pixel Clock/10000 LSB

37

Pixel Clock/10000 USB

Horz active Lower 8bits

38

Horz blanking Lower 8bits

39

HorzAct:HorzBlnk Upper 4:4 bits

3A

3B

3C

3D

3E

3F

40

41

42

43

44

45

46

47

48

49

4A

4B

4C

4D

4E

4F

B101EW01 V1 document version : 2.1

www.jxlcd.com

Vertical Active Lower 8bits

Vertical Blanking Lower 8bits

Vert Act : Vertical Blanking (upper 4:4 bit)

HorzSync. Offset

HorzSync.Width

VertSync.Offset : VertSync.Width

Horz&Vert Sync Offset/Width Upper 2bits

Horizontal Image Size Lower 8bits

Vertical Image Size Lower 8bits

Horizontal & Vertical Image Size (upper 4:4 bits)

Horizontal Border

Vertical Border

Signal

(non-intr, norm, no stero, sep sync, neg pol)

Established timing 3 00 00000000 0

Standard timing #1 01 00000001 1

Standard timing #2 01 00000001 1

Standard timing #3 01 00000001 1

Standard timing #4 01 00000001 1

Standard timing #5 01 00000001 1

Standard timing #6 01 00000001 1

Standard timing #7 01 00000001 1

Standard timing #8 01 00000001 1

(zero for internal LCD)

Detailed timing/monitor 00 00000000 0

AU OPTRONICS CORPORATION

01 00000001 1

06 00000110 6

18 00011000 24

00 00000000 0

70 01110000 112

50 01010000 80

D0 11010000 208

10 00010000 16

20 00100000 32

30 00110000 48

20 00100000 32

36 00110110 54

00 00000000 0

DE 11011110 222

7D 01111101 125

00 00000000 0

descriptor #2 00 00000000 0

00 00000000 0

0F 00001111 15

00 00000000 0

18 00011000 24

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Product Specification

50

51

52

53

54

55

56

57

58

59

5A

5B

5C

5D

5E

5F

60

61

62

63

64

65

66

67

68

69

6A

6B

6C

6D

6E

6F

70

71

72

73

74

75

76

77

78

79

7A

B101EW01 V1 document version : 2.1

www.jxlcd.com

Detailed timing/monitor 00 00000000 0

Manufacture P/N 42 01000010 66

Manufacture P/N 31 00110001 49

Manufacture P/N 30 00110000 48

Manufacture P/N 31 00110001 49

Manufacture P/N 45 01000101 69

Manufacture P/N 57 01010111 87

Manufacture P/N 30 00110000 48

Manufacture P/N 31 00110001 49

Manufacture P/N 20 00100000 32

Manufacture P/N 56 01010110 86

AU OPTRONICS CORPORATION

00 00000000 0

20 00100000 32

descriptor #3 00 00000000 0

00 00000000 0

FE 11111110 254

00 00000000 0

Manufacture 41 01000001 65

Manufacture 55 01010101 85

Manufacture 4F 01001111 79

0A 00001010 10

20 00100000 32

descriptor #4 00 00000000 0

00 00000000 0

FE 11111110 254

00 00000000 0

30 of 31

Product Specification

7B

7C

7D

7E

7F

Manufacture P/N 31 00110001 49

Extension Flag 00 00000000 0

AU OPTRONICS CORPORATION

20 00100000 32

0A 00001010 10

Checksum C3 11000011 195

www.jxlcd.com

B101EW01 V1 document version : 2.1

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AU Optronics B101EW01-V1 Product Specification

Specifications and Main Features

Frequently Asked Questions

User Manual