0.2 2009/12/14 15 PWM Input Frequency
100(Min),200(Typ),20K(Max)
0.3 2009/12/23 18 Update Pin Assignment
0.4 2010/01/10 24 Update Module drawing
0.5 2010/02/22 14 Update 5.1.2, EDID
0.6 2010/03/10 25 Update Label
0.7 2010/03/29 15,20 Update PWM duty and Clock
www.jxlcd.com
www.jxlcd.com
Old description New Description Remark
Follow Customer Request
700(Min),1K(Typ),2K(Max)
Frequency typ.
B101AW06 V1 Document Version : 0.7
3 of 29
Product Specification
1. Handling Precautions
1) Since front polarizer is easily damaged, pay attention not to scratch it.
2) Be sure to turn off power supply when inserting or disconnecting from input
connector.
3) Wipe off water drop immediately. Long contact with water may cause discoloration
or spots.
4) When the panel surface is soiled, wipe it with absorbent cotton or other soft cloth.
5) Since the panel is made of glass, it may break or crack if dropped or bumped on
hard surface.
6) Since CMOS LSI is used in this module, take care of static electricity and insure
human earth when handling.
7) Do not open nor modify the Module Assembly.
8) Do not press the reflector sheet at the back of the module to any directions.
AU OPTRONICS CORPORATION
9) At the insertion or removal of the Signal Interface Connector, be sure not to rotate
nor tilt the Interface Connector of the TFT Module.
11)After installation of the TFT Module into an enclosure (Notebook PC Bezel, for
example), do not twist nor bend the TFT Module even momentary. At designing the
enclosure, it should be taken into consideration that no bending/twisting forces are
applied to the TFT Module from outside. Otherwise the TFT Module may be
www.jxlcd.com
damaged.
12) Small amount of materials having no flammability grade is used in the LCD module. The
LCD module should be supplied by power complied with requirements of Limited Power
Source (IEC60950 or UL1950), or be applied exemption.
13) Disconnecting power supply before handling LCD modules, it can prevent electric shock,
DO NOT TOUCH the electrode parts, cables, connectors and LED circuit part of TFT
module that a LED light bar build in as a light source of back light unit. It can prevent
electrostic breakdown.
www.jxlcd.com
B101AW06 V1 Document Version : 0.7
4 of 29
Product Specification
Length
244.5 245.0 245.5
Width
146.0
146
.5 147.0
Thickness
- -
3.6
2. General Description
B101AW06 V1 is a Color Active Matrix Liquid Crystal Display composed of a TFT LCD
panel, a driver circuit, and LED backlight system. The screen format is intended to support
the 16:9 SD, 1024(H) x600(V) screen and 262k colors (RGB 6-bits data driver) with LED
backlight driving circuit. All input signals are LVDS interface compatible.
B101AW06 V1 is designed for a display unit of notebook style personal computer and
industrial machine.
AU OPTRONICS CORPORATION
2.1 General Specification
The following items are characteristics summary on the table at 25 ℃ condition:
Items Unit Specifications
Screen Diagonal [mm] 255.537
Active Area [mm] 222.72 (H) X125.28 (V)
Pixels H x V 1024x 600x 3(RGB)
Pixel Pitch [mm] 0.2175 (H)X0.2088 (V)
Pixel Format R.G.B. Horizontal Stripe
Display Mode Normally White
www.jxlcd.com
White Luminance (I
(Note: ILED is LED current)
Luminance Uniformity 1.25 max. (5 points)
Contrast Ratio 400 typ
Response Time [ms] 16 typ / 25 Max
www.jxlcd.com
LED
=20mA)
[cd/m2] 200 typ. (5 points average)
170 min. (5 points average)
Nominal Input Voltage VDD [Volt] +3.3 typ.
Power Consumption [Watt] 2.6 max. (Include Logic and Blu power)
Weight [Grams] 170 max.
The optical characteristics are measured under stable conditions at 25℃ (Room Temperature) :
AU OPTRONICS CORPORATION
[oC]
0 to +50
Item Symbol
White Luminance
I
LED
=20mA
Viewing Angle
Luminance
Uniformity
Luminance
Uniformity
Contrast Ratio CR
Cross talk %
www.jxlcd.com
www.jxlcd.com
Response Time
Red
Conditions Min. Typ. Max. Unit Note
5 points average
Horizontal (Right)
CR = 10 (Left)
Vertical (Upper)
CR = 10 (Lower)
5 Points
13 Points
θθθθ
θθθθ
ψψψψ
ψψψψ
δδδδ
δδδδ
R
L
H
L
5P
13P
300 400 4
Tr Rising
Tf Falling
TRT Rising + Falling
Rx
Ry
170 200 -
40
40
10
30
45
45
15
35
-
-
-
-
- - 1.25
- - 1.60
-
9
-
- 7 -
- 16 25
0.562 0.592 0.622
0.316 0.346 0.376
cd/m
degree
msec
2
1, 4, 5.
4, 9
1, 3, 4
2, 3, 4
4, 6
4, 7
4, 8
Color /
Chromaticity
Coodinates
Green
Blue
Gx
Gy
Bx
By
Wx
CIE 1931
0.299 0.329 0.359
0.512 0.542 0.572
0.119 0.149 0.179
0.115 0.145 0.175
0.263 0.313 0.363
White
Wy
NTSC %
B101AW06 V1 Document Version : 0.7
0.279 0.329 0.379
- 45 -
6 of 29
4
Product Specification
=
Maximum Brightness of thirteen points
Minimum Brightness of thirteen points
Maximum Brightness of five
points
=
Minimum Brightness of five points
Note 1: 5 points position (Ref: Active area)
H /4
H /4
AU OPTRONICS CORPORATION
W /4W /4W /4W /4
W
12
H
H /4
H /4
Note 2: 13 points position (Ref: Active area)
W /4
10
10
H/4
www.jxlcd.com
www.jxlcd.com
H/4
H
H/4
1
6
3
45
W
W /4
4
W /4
2
7
W /4
10
3
5
8
9
H/4
10
11
Note 3: The luminance uniformity of 5 or13 points is defined by dividing the maximum luminance values by the
minimum test point luminance
δ
W5
10
1312
δ
Note 4: Measurement method
The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature
change during measuring. In order to stabilize the luminance, the measurement should be executed after
B101AW06 V1 Document Version : 0.7
W13
7 of 29
Product Specification
Field=2
°
Contrast ra
tio (CR)=
Brightness on the “White” state
Brightness on the “Black” state
lighting Backlight for 30 minutes in a stable, windless and dark room, and it should be measured in the center
of screen.
AU OPTRONICS CORPORATION
Note 5: Definition of Average Luminance of White (YL):
Photo detector
Measure the luminance of gray level 63 at 5 points,Y
L (x) is corresponding to the luminance of the point X at Figure in Note (1).
Note 6: Definition of contrast ratio:
Note 7: Definition of Cross Talk (CT)
CT = | YB – YA | / YA × 100 (%)
Where
YA = Luminance of measured location without gray level 0 pattern (cd/m2)
www.jxlcd.com
www.jxlcd.com
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
L
Contrast ratio is calculated with the following formula.
YB = Luminance of measured location with gray level 0 pattern (cd/m2)
B101AW06 V1 Document Version : 0.7
8 of 29
Product Specification
Note 8: Definition of response time:
The output signals of BM-7 or equivalent are measured when the input signals are changed from “Black” to
AU OPTRONICS CORPORATION
“White” (falling time) and from “White” to “Black” (rising time), respectively. The response time interval
between the 10% and 90% of amplitudes. Refer to figure as below.
"Black"
100%
S
i
90%
g
n
a
www.jxlcd.com
l
www.jxlcd.com
(
R
e
l
a
t
i
v
e
v
a
l
u
10%
e
)
0%
Tr
Tf
"White""White"
B101AW06 V1 Document Version : 0.7
9 of 29
Product Specification
Note 9. Definition of viewing angle
Viewing angle is the measurement of contrast ratio ≧10, at the screen center, over a 180° horizontal an d
180° vertical range (off-normal viewing angles). The 180° viewing angle range is broken down as follow s; 90°
(θ) horizontal left and right and 90° ( Φ) vertical, high (up) and low (down). The measurement direction is
AU OPTRONICS CORPORATION
typically perpendicular to the display surface with the screen rotated about its center to develop the desired
measurement viewing angle.
www.jxlcd.com
www.jxlcd.com
B101AW06 V1 Document Version : 0.7
10 of 29
Product Specification
3. Functional Block Diagram
The following diagram shows the functional block of the 10.1 inches wide Color TFT/LCD 40 Pin one
channel Module
AU OPTRONICS CORPORATION
www.jxlcd.com
www.jxlcd.com
B101AW06 V1 Document Version : 0.7
11 of 29
Product Specification
4. Absolute Maximum Ratings
An absolute maximum rating of the module is as following:
4.1 Absolute Ratings of TFT LCD Module
Item Symbol Min Max Unit Conditions
Logic/LCD Drive
4.2 Absolute Ratings of Environment
Item Symbol Min Max Unit Conditions
AU OPTRONICS CORPORATION
Vin -0.3 +4.0 [Volt] Note 1,2
Operating Temperature
Operation Humidity HOP 5 95 [%RH] Note 4
Storage Temperature
Storage Humidity HST
Note 1: At Ta (25℃ )
Note 2: Permanent damage to the device may occur if exceed maximum values
Note 3: LED specification refer to section 5.2
Note 4: For quality performance, please refer to AUO IIS (Incoming Inspection Standard).
www.jxlcd.com
www.jxlcd.com
TOP 0 +50 [oC] Note 4
TST -20 +60 [oC] Note 4
5 95
Twb=39°C
[%RH]
Note 4
Operating Range
B101AW06 V1 Document Version : 0.7
Storage Range
12 of 29
Product Specification
Voltage
90%
10%
5. Electrical Characteristics
5.1 TFT LCD Module
5.1.1 Power Specification
Input power specifications are as follows;
The power specification are measured under 25℃ and frame frenquency under 60Hz
AU OPTRONICS CORPORATION
Symble Parameter Min Typ
VDD Logic/LCD Drive
PDD VDD Power
IDD IDD Current
I
Rush
Inrush Current
VDDrp Allowable
Logic/LCD Drive
Ripple Voltage
Note 1 : Maximum Measurement Condition:Black Pattern at 3.3V driving voltage. (P
Note 2:Measure Condition
www.jxlcd.com
www.jxlcd.com
3.0 3.3 3.6 [Volt]
0.8 - [Watt] Note 1
- 240
- -
- -
Max Units Note
-
2000
100 [mV]
[mA] Note 1
[mA]
p-p
Note 2
max=V3.3
x I
black
)
0V
B101AW06 V1 Document Version : 0.7
3.3V
0.5ms
Vin rising time
13 of 29
Product Specification
5.1.2 Signal Electrical Characteristics
Input signals shall be low or High-impedance state when VDD is off.
Signal electrical characteristics are as follows;
AU OPTRONICS CORPORATION
Parameter
VTH
VTL
|VID|
VCM
Note: LVDS Signal Waveform
www.jxlcd.com
Differential Input High
Threshold (Vcm=+1.2V)
Differential Input Low
Threshold (Vcm=+1.2V)
Differential Input
Voltage
Differential Input
Common Mode Voltage
www.jxlcd.com
Condition Min Max Unit
lVIDl / 2
-100
100
100
-
600
2.4 - lVIDl / 2
[mV]
[mV]
[mV]
[V]
B101AW06 V1 Document Version : 0.7
14 of 29
5.2 Backlight Unit
5.2.1 LED characteristics
Parameter
Backlight Power
Consumption
Product Specification
AU OPTRONICS CORPORATION
Symbol
PLED - 1.506 1.647
Min Typ Max Units
[Watt]
Condition
(Ta=25℃), Note 1
Vin =12V
LED Life-Time
Note 1: Calculator value for reference P
Note 2: The LED life-time define as the estimated time to 50% degradation of initial luminous.
5.2.2 Backlight input signal characteristics
Parameter
LED Power Supply VLED 5.0 12.021.0[Volt]
www.jxlcd.com
LED Enable Input
High Level
LED Enable Input
Low Level
PWM Logic Input
High Level
PWM Logic Input
Low Level
www.jxlcd.com
N/A 10,000 - -
= VF (Normal Distribution) * IF (Normal Distribution) / Efficiency
LED
Symbol
VLED_EN
VPWM_EN
Min Typ Max Units Remark
2.5 - 5.5 [Volt]
- - 0.8 [Volt]
2.5 - 5.5
- - 0.8
Hour
[Volt]
[Volt]
(Ta=25℃), Note 2
IF=20 mA
Define as
Connector
Interface
(Ta=25℃)
PWM Input Frequency
PWM Duty Ratio
B101AW06 V0 Document Version : 0.7
FPWM 100 200 20K
Duty 5 -- 100
Hz
%
15 of 29
Product Specification
B
B
6. Signal Interface Characteristic
6.1 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format.
1
AU OPTRONICS CORPORATION
1024
1st Line
600th Line
R
G
B
R
G
www.jxlcd.com
www.jxlcd.com
R
G
B
R
G
B
R
G
B
R
G
R
G
B
R
G
B
B101AW06 V0 Document Version : 0.7
16 of 29
Product Specification
Data Clock
6.2 The Input Data Format
Signal Name
R5
R4
R3
R2
R1
R0
Description
Red Data 5 (MSB)
Red Data 4
Red Data 3
Red Data 2
Red Data 1
Red Data 0 (LSB)
Red-pixel Data
AU OPTRONICS CORPORATION
Red-pixel Data
Each red pixel's brightness data consists of
these 6 bits pixel data.
G5
G4
G3
G2
G1
G0
B5
B4
B3
B2
B1
B0
RxCLKIN
DE Display Timing This signal is strobed at the falling edge of
VS Vertical Sync The signal is synchronized to RxCLKIN .
HS Horizontal Sync The signal is synchronized to RxCLKIN .
Note: Output signals from any system shall be low or High-impedance state when VDD is off.
Green Data 5 (MSB)
Green Data 4
Green Data 3
Green Data 2
www.jxlcd.com
www.jxlcd.com
Green Data 1
Green Data 0 (LSB)
Green-pixel Data
Blue Data 5 (MSB)
Blue Data 4
Blue Data 3
Blue Data 2
Blue Data 1
Blue Data 0 (LSB)
Blue-pixel Data
Green-pixel Data
Each green pixel's brightness data consists of
these 6 bits pixel data.
Blue-pixel Data
Each blue pixel's brightness data consists of
these 6 bits pixel data.
The signal is used to strobe the pixel data and
DE signals. All pixel data shall be valid at the
falling edge when the DE signal is high.
RxCLKIN. When the signal is high, the pixel
data shall be valid to be displayed.
B101AW06 V0 Document Version : 0.7
17 of 29
Product Specification
6.3 Integration Interface Requirement
6.3.1 Connector Description
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following
components.
Connector Name / Designation For Signal Connector
Manufacturer IPEX or compatible
AU OPTRONICS CORPORATION
Type / Part Number
Mating Housing/Part Number
IPEX 20455-040E-12R
IPEX 20453-040T-11
or compatible
6.3.2 Pin Assignment
LVDS is a differential signal technology for LCD interface and high speed data transfer device.
PIN# Signal Name
1
2
3
4
5
6
7
8
9
NC
VDD
VDD
www.jxlcd.com
www.jxlcd.com
VEDID
NC
CLK_EDID
DATA_EDID
RxOIN0RxOIN0+
No connect
Power Supply +3.3V
Power Supply +3.3V
EDID +3.3V Power
No Connect
EDID Clock Input
EDID Data Input
-LVDS Differential Data (Odd R0-R5, G0)
+LVDS Differential Data (Odd R0-R5, G0)
Note1: Input signals shall be low or High-impedance state when VDD is off.
19 of 29
Product Specification
6.4 Interface Timing
6.4.1 Timing Characteristics
Basically, interface timings should match the 1024x600 /60Hz manufacturing guide line timing.
Parameter Symbol Min. Typ. Max. Unit
Frame Rate - - - - Hz
AU OPTRONICS CORPORATION
Clock frequency 1/ T
Vertical
Section
Horizontal
Section
Note : DE mode only
Note1 : H-Blanking support +/- 128 LVDS clock variation
6.4.2 Timing diagram
T
CLOCK
DOTCLK
www.jxlcd.com
www.jxlcd.com
Input
Data
DE
DE
20 49.8 75 MHz
Clock
Period TV 614 - 1024
Active TVD 600
Blanking TVB 14 - 424
Period TH 1064 - 2048
Active THD 1024
Blanking THB h-128 h (Note1) h+128
Input Timing Definition ( DE Mode)
Invaild
Data
T
HB
Pixel
1
T
VB
Pixel
2
T
Pixel
3
T
HD
H
T
V
Pixel
N-1
T
Pixel
N
VD
T
Line
T
Clock
Invaild
Data
Pixel
1
B101AW06 V0 Document Version : 0.7
20 of 29
Product Specification
6.5 Power ON/OFF Sequence
Power on/off sequence is as follows. Interface signals and LED on/off sequence are also shown in
the chart. Signals from any system shall be Hi-Z state or low level when VDD is off