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Product Description: T520HW01 TFT-LCD PANEL
AUO Model Name: T520HW01 V3
Customer Part No. / Project Name:
Customer Signature AU Optronics Corp.
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Approved By: PM Director / Frank Hsu
Note
--------------------------------------------
Reviewed By: RD Director / Eugene CC Chen
--------------------------------------------
Reviewed By: Project Leader / Bert Chen
--------------------------------------------
Prepared By: PM / Eric Chiang
---------------------------------------------
©Copyright AU Optronics Corp.
2009 All Rights Reserved. T520HW01 V3 1/33
No Reproduction and Redistribution Allowed
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Document Version: 0.0
Date: 2009/5/22
Product Functional Specification
52” Full HD Color TFT-LCD Module
Model Name: T520HW01 V3
(*) Preliminary Specification
() Final Specification
©Copyright AU Optronics Corp.
2009 All Rights Reserved. T520HW01 V3 2/33
No Reproduction and Redistribution Allowed
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No
CONTENTS
RECORD OF REVISIONS
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATION
3.1 ELECTRIACL CHARACTERISTICS
3.2 INTERFACE CONNECTOR
3.3 MEMC FUNCTION DESCRIPTION
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Contents
3.4 SIGNAL TIMING SPECIFICATION
3.5 SIGNAL TIMING WAVEFORM
3.6 COLOR INPUT DATA REFERENCE
3.7 POWER SEQUENCE
3.8 BACKLIGHT POWER SPECIFICATION
4 OPTICAL SPECIFICATION
5 MECHANICAL CHARACTERISTICS
6 RELIABILITY
7 INTERNATIONAL STANDARD
8 PACKING
9 PRECAUTIONS
©Copyright AU Optronics Corp.
2009 All Rights Reserved. T520HW01 V3 3/33
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Record of Revision
Version Data Page. Old Description New Description Remark
0.0 2009/5/22 First release N/A N/A
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©Copyright AU Optronics Corp.
2009 All Rights Reserved. T520HW01 V3 4/33
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1. General Description
This specification applies to the 52 inch Color TFT-LCD Module T520HW01 V3. This LCD module has a TFT
active matrix type liquid crystal panel 1920x1080 pixels, and diagonal size of 52 inch. This module supports Full
HD mode (Non-interlace) with MEMC.
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray
scale or the brightness of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
The T520HW01 V3 has been designed to apply the 8-bit 2 channel LVDS interface method. It is intended to
support displays where high brightness, EBU Gamut (72% NTSC), wide viewing angle, and high color depth are
very important.
The T520HW01 V3 backlight unit is using inverter-less solution (inductor type balance board), and need to be
powered by integrated power system by customers.
* General Information
Items Specification Unit Note
Active Screen Size 52 inches Diagonal
Display Area 1152(H) x 648(V) mm
Outline Dimension 1226(H) x 719.2(V) x 58(D) mm With Balance Board cover
Driver Element a-Si TFT active matrix
Display Colors 16.7M Colors
Color Gamut 72 % NTSC
Number of Pixels 1920 x 1080 Pixel
Pixel Arrangement RGB vertical stripe
Pixel Pitch 0.6 mm
Display Mode Normally Black
Surface Treatment Haze 11%, 3H
RoHS RoHS compliance
©Copyright AU Optronics Corp.
2009 All Rights Reserved. T520HW01 V3 5/33
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2. Absolute Maximum Ratings
The followings are maximum values which, if exceeded, may cause faulty operation or damage to the unit
Item Symbol Min. Max Unit Note
Logic/LCD Drive Voltage VDD -0.3 14.0 VDC 1
Input Voltage of Signal VIN -0.3 3.6 VDC 1
Operating Temperature TOP 0 +50 °C 2
Operating Humidity HOP 10 90 %RH 2
Storage Temperature TST -20 +60 °C 2
Storage Humidity HST 10 90 %RH 2
Panel Surface Temperature T
Shock (non-operation) ±x, ±y -- 40 G 3
Shock (non-operation) ±z -- 30 G 3
Vibration (non-operation) -- 1.5 G 4
Note 1: Duration = 50ms
Note 2: Maximum Wet-Bulb should be 39°C and no condensation. The relative humidity must not exceed
90% non-condensing at temperatures of 40 °C or less. At temperatures greater than 40°C, the wet
bulb temperature must not exceed 39°C.
Note 3: Sine wave, 11ms, direction: ±x, ±y, ±z (one time each direction)
Note 4: Wave form: random, vibration level: 1.5G RMS, Bandwidth: 10--300Hz
Duration: X, Y, Z 30min (one time each direction)
Note 5: Surface temperature is measured at 50 Dry condition
-- +65 °C 2
SUR
©Copyright AU Optronics Corp.
2009 All Rights Reserved. T520HW01 V3 6/33
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3. Electrical Specification
The T520HW01 V3 requires two power inputs. One is employed to power the LCD electronics and to drive the
TFT array and liquid crystal. The second input, which powers the CCFL, is typically generated by an integrate
power (I/P) system.
3.1 Electrical Characteristics
Parameter Symbol
Min. Typ. Max
Power Supply Input Voltage VDD 10.8 12.0 13.2 VDC
Power Supply Input Current IDD -- 1.3 2.2 A 1
Power Consumption PC -- 14.4 30 Watt 1
Value
Unit Note
Inrush Current I
-- -- 20 A 5
RUSH
Differential Input
High Threshold
-- -- +100 mVDC 4
V
TH
Voltage
LVDS
Interface
Differential Input
Low Threshold
V
-100 -- -- mVDC 4
TL
Voltage
Common Input
V
1.10 1.25 1.40 VDC
CIM
VIH
(High)
V
IL
(Low)
2.4 -- 3.3 V
0 -- 0.7 V
DC
DC
CMOS
Interface
Voltage
Input High
Threshold Voltage
Input Low
Threshold Voltage
Backlight Power Consumption (ref.) PBL -- 190 -- Watt 2
Life Time 50000 -- -- Hours 3
©Copyright AU Optronics Corp.
2009 All Rights Reserved. T520HW01 V3 7/33
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s
Note:
1. V
2. The backlight power consumption shown above is tested by lamp current I
3. V
=12.0V, fV=60Hz, fCLK=81.5Mhz, 25°C, VDD duration time=400µs, test pattern: white pattern
DD
=1.25V
CIM
VTH
VCIM
VTL
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=9.0mA.
L
0V
Figure: LVDS Differential Voltage
4. Measurement condition: rising time=400 µs
0.9 Vdd
GND
0.1 Vdd
400
µ
5. Specified values are for a single lamp only which is aligned horizontally. The lifetime is defined as the
time which luminance of the lamp is 50% compared to its original value.
[Operating condition: Continuous operating at Ta = 25 ±2]
6. The performance of the Lamp in LCD panel, for example life time or brightness, is extremely influenced
by the characteristics of balanced board and I/P board. All the parameters should be carefully designed
as not to produce too much leakage current from high-voltage output. While you design or order the
balance board, please make sure unwanted lighting caused by the mismatch of the lamp and the
Vdd
balanced board (no lighting, flicker, etc) never occurs. After confirmation, the LCD panel should be
operated in the same condition as installed in your instrument
7. Do not attach a conducting tape to lamp connecting wire. If the lamp wire attach to conducting tape,
TFT-LCD Module have a low luminance and the inverter has abnormal action because leakage current
occurs between lamp wire and conducting tape.
8. The relative humidity must not exceed 80% non-condensing at temperatures of 40 or less. At
temperatures greater than 40, the wet bulb temperature must not exceed 39. When operate at low
temperatures, the brightness of CCFL will drop and the life time of CCFL will be reduced.
©Copyright AU Optronics Corp.
2009 All Rights Reserved. T520HW01 V3 8/33
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3.2 Interface Connections
LCD connector: FI-RE51S-HF (Manufactured by JAE)
Mating connector: FI-RE51S-HL (Manufactured by JAE)
Pin No Symbol Description Note
1 VDD Operating Voltage Supply, +12V DC Regulated
2 VDD Operating Voltage Supply, +12V DC Regulated
3 VDD Operating Voltage Supply, +12V DC Regulated
4 VDD Operating Voltage Supply, +12V DC Regulated
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5 VDD Operating Voltage Supply, +12V DC Regulated
6 GND Ground
7 GND Ground
8 GND Ground
9 GND Ground
10 RO_0- LVDS Channel Odd, Signal 0- LVDS
11 RO_0+ LVDS Channel Odd, Signal 0+ Channel
12 RO_1- LVDS Channel Odd, Signal 1- Odd
13 RO_1+ LVDS Channel Odd, Signal 1+
14 RO_2- LVDS Channel Odd, Signal 2-
15 RO_2+ LVDS Channel Odd, Signal 2+
16 GND Ground
17 RO_CLK- LVDS Channel Odd, Clock -
18 RO_CLK+ LVDS Channel Odd, Clock +
19 GND Ground
20 RO_3- LVDS Channel Odd, Signal 3-
21 RO_3+ LVDS Channel Odd, Signal 3+
Power
22 NC NC
23 NC NC
24 GND Ground
25 RE_0- LVDS Channel Even, Signal 0- LVDS
26 RE_0+ LVDS Channel Even, Signal 0+ Channel
27 RE_1- LVDS Channel Even, Signal 1- Even
28 RE_1+ LVDS Channel Even, Signal 1+
29 RE_2- LVDS Channel Even, Signal 2-
30 RE_2+ LVDS Channel Even, Signal 2+
31 GND Ground
©Copyright AU Optronics Corp.
2009 All Rights Reserved. T520HW01 V3 9/33
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32 RE_CLK- LVDS Channel Even, Clock -
33 RE_CLK+ LVDS Channel Even, Clock +
34 GND Ground
35 RE_3- LVDS Channel Even, Signal 3-
36 RE_3+ LVDS Channel Even, Signal 3+
37 NC NC
38 NC NC
39 GND Ground
40 NC No Connect (AUO internal Only) Note 4
41 NC No Connect (AUO internal Only) Note 4
42 NC No Connect (AUO Internal Use Only)
43 NC No Connect (AUO Internal Use Only)
44 MEMC_ON MEMC ON
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45 LVDS_SEL Open/High(3.3V) for NS, Low(GND) for JEIDA Default: NS
46 SCL_FRC EEPROM Serial Clock for MEMC
47 NC No Connect (AUO internal Only)
48 SDA_FRC EEPROM Serial Data for FRC
49 NC No Connect (AUO internal Only)
50 NC No Connect (AUO internal Only)
51 NC No Connect (AUO internal Only)
Note 1: All GND (ground) pins should be connected together and should also be connected to the LCD ’s
metal frame.
Note 2: All V
Note 3: All NC (no connection) pins should be open without voltage input.
(power input) pins should be connected together.
DD
©Copyright AU Optronics Corp.
2009 All Rights Reserved. T520HW01 V3 10/33
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