AUO T520HW01 V1 Specification

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©Copyright AU Optronics Corp. 2009 All Rights Reserved. T520HW01 V1 1/31 No Reproduction and Redistribution Allowed
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Document Version: 1.0
Date: 2009/4/21
52Full HD Color TFT-LCD Module
Model Name: T520HW01 V0
() Preliminary Specification
(*) Final Specification
©Copyright AU Optronics Corp. 2009 All Rights Reserved. T520HW01 V1 2/31 No Reproduction and Redistribution Allowed
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No
CONTENTS
RECORD OF REVISIONS
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATION
3-1 ELECTRIACL CHARACTERISTICS
3-2 INTERFACE CONNECTOR
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Contents
3-3 SIGNAL TIMING SPECIFICATION
3-4 SIGNAL TIMING WAVEFORM
3-5 COLOR INPUT DATA REFERENCE
3-6 POWER SEQUENCE
3-7 BACK LIGHT POWER SPECIFICATION
4 OPTICAL SPECIFICATION
5 MECHANICAL CHARACTERISTICS
6 RELIABILITY
7 INTERNATIONAL STANDARD
8 PACKING
9 PRECAUTION
©Copyright AU Optronics Corp. 2009 All Rights Reserved. T520HW01 V1 3/31 No Reproduction and Redistribution Allowed
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Record of Revision
Version Data Page. Old Description New Description Remark
0.0 2008/12/11 First release N/A N/A
1.0 2009/4/21 Update drawing
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Add handling caution
©Copyright AU Optronics Corp. 2009 All Rights Reserved. T520HW01 V1 4/31 No Reproduction and Redistribution Allowed
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1. General Description
This specification applies to the 52 inch Color TFT-LCD Module T520HW01 V1. This LCD module has a TFT
active matrix type liquid crystal panel 1920x1080 pixels, and diagonal size of 52 inch. This module supports Full
HD mode (Non-interlace) with 120Hz frame rate.
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray
scale or the brightness of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
The T520HW01 V1 has been designed to apply the 8-bit 4 channel LVDS interface method. It is intended to
support displays where high brightness, EBU Gamut (72% NTSC), wide viewing angle, and high color depth are
very important.
The T520HW01 V1 backlight unit is using inverter-less solution (inductor type balance board), and need to be
powered by integrated power system by customers.
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* General Information
Items Specification Unit Note
Active Screen Size 52 inches Diagonal
Display Area 1152(H) x 648(V) mm
Outline Dimension 1226(H) x 719.2(V) x 58(D) mm With Balance Board
Driver Element a-Si TFT active matrix
Display Colors 16.7M Colors
Color Gamut 72 % NTSC
Number of Pixels 1920 x 1080 Pixel
Pixel Arrangement RGB vertical stripe
Pixel Pitch 0.6 mm
Display Mode Normally Black
Surface Treatment Haze 11%, 3H
RoHS RoHS compliance
©Copyright AU Optronics Corp. 2009 All Rights Reserved. T520HW01 V1 5/31 No Reproduction and Redistribution Allowed
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2. Absolute Maximum Ratings
The followings are maximum values which, if exceeded, may cause faulty operation or damage to the unit
Item Symbol Min. Max Unit Note
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Logic/LCD Drive Voltage V
Input Voltage of Signal V
Operating Temperature T
Operating Humidity H
Storage Temperature T
Storage Humidity H
Panel Surface Temperature T
DD
IN
OP
OP
ST
ST
SUR
-0.3 14.0 V
-0.3 3.6 V
DC
DC
1
1
0 +50 °C2
10 90 %RH 2
-20 +60 °C2
10 90 %RH 2
-- +65 °C2
Shock (non-operation) ±x, ±y-- 40 G 3
Shock (non-operation) ±z-- 30 G 3
Vibration (non-operation) -- 1.5 G 4
Note 1: Duration = 50ms
Note 2: Maximum Wet-Bulb should be 39°C and no condensation. The relative humidity must not exceed
90% non-condensing at temperatures of 40 °C or less. At temperatures greater than 40°C, the wet
bulb temperature must not exceed 39°C.
Note 3: Sine wave, 11ms, direction: ±x, ±y, ±z (one time each direction)
Note 4: Wave form: random, vibration level: 1.5G RMS, Bandwidth: 10--300Hz
Duration: X, Y, Z 30min (one time each direction)
Note 5: Surface temperature is measured at 50 Dry condition
©Copyright AU Optronics Corp. 2009 All Rights Reserved. T520HW01 V1 6/31 No Reproduction and Redistribution Allowed
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3. Electrical Specification
The T520HW01 V1 requires two power inputs. One is employed to power the LCD electronics and to drive the
TFT array and liquid crystal. The second input, which powers the CCFL, is typically generated by an integrate
power (I/P) system.
3.1 Electrical Characteristics
Parameter Symbol
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Value
Unit Note
Min. Typ. Max
Power Supply Input Voltage V
Power Supply Input Current I
Power Consumption P
Inrush Current I
Differential Input
High Threshold
VTH -- -- 100 mV
Voltage
LVDS
Interface
Differential Input
Low Threshold
VTL -100 -- -- mV
Voltage
Common Input
VCIM 1.25 1.40 1.40 V
Voltage
Input High
CMOS
Threshold
Volta ge
VIH
(High)
Interface
Input Low
Threshold Voltage
(Low)
DD
DD
C
RUSH
VIL
10.8 12.0 13.2 V
DC
-- 1.2 2.3 A 1
-- 14.4 27.6 Watt 1
-- -- 20 A 4
DC
DC
DC
2.4 -- 3.3 V
0 -- 0.7 V
DC
DC
3
3
Backlight Power Consumption (ref.) P
BL
-- 190 -- Watt 2
Life Time 50000 -- -- Hours 5
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s
μ
Note:
1. V
2. The backlight power consumption shown above is tested by lamp current I
3. V
=12.0V, fV=120Hz, fCLK =80.74Mhz, 25°C, VDD duration time=400µs, test pattern: white pattern
DD
=1.25V
CIM
VTH
VCIM
VTL
0V
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=9.0mA.
L
Figure: LVDS Differential Voltage
4. Measurement condition: rising time=400µs
Vdd
GND
0.9 Vdd
0.1 Vdd
400
5. Specified values are for a single lamp only which is aligned horizontally. The lifetime is defined as the
time which luminance of the lamp is 50% compared to its original value.
[Operating condition: Continuous operating at Ta = 25 ±2]
6. The performance of the Lamp in LCD panel, for example life time or brightness, is extremely influenced
by the characteristics of balanced board and I/P board. All the parameters should be carefully designed
as not to produce too much leakage current from high-voltage output. While you design or order the
balance board, please make sure unwanted lighting caused by the mismatch of the lamp and the
balanced board (no lighting, flicker, etc) never occurs. After confirmation, the LCD panel should be
operated in the same condition as install ed in your instrument
7. Do not attach a conducting tape to lamp connecting wire. If the lamp wire attach to conducting tape,
TFT-LCD Module have a low luminance and the inverter has abnormal action because leakage current
occurs between lamp wire and conducting tape.
8. The relative humidity must not exceed 80% non-condensing at temperatures of 40 or less. At
temperatures greater than 40, the wet bulb temperature must not exceed 39. When operate at low
temperatures, the brightness of CCFL will drop and the life time of CCFL will be reduced.
©Copyright AU Optronics Corp. 2009 All Rights Reserved. T520HW01 V1 8/31 No Reproduction and Redistribution Allowed
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3.2 Interface Connections
LCD connector: FI-RE51S-HF (Manufactured by JAE)
Mating connector: FI-RE51S-HL (Manufactured by JAE)
Pin No Symbol Description Note
1 VDD Operating Voltage Supply, +12V DC Regulated
2 VDD Operating Voltage Supply, +12V DC Regulated
3 VDD Operating Voltage Supply, +12V DC Regulated
4 VDD Operating Voltage Supply, +12V DC Regulated
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5 VDD Operating Voltage Supply, +12V DC Regulated
6 GND Ground
7 GND Ground
8 GND Ground
9 GND Ground
10 R2_0- LVDS Channel 2, Signal 0-
11 R2_0+ LVDS Channel 2, Signal 0+
12 R2_1- LVDS Channel 2, Signal 1-
13 R2_1+ LVDS Channel 2, Signal 1+
14 R2_2- LVDS Channel 2, Signal 2-
15 R2_2+ LVDS Channel 2, Signal 2+
16 GND Ground
17 R2_CLK- LVDS Channel 2, Clock -
18 R2_CLK+ LVDS Channel 2, Clock +
19 GND Ground
20 R2_3- LVDS Channel 2, Signal 3-
21 R2_3+ LVDS Channel 2, Signal 3+
Power
LVDS
Channel 2
22 R2_4- NC
23 R2_4+ NC
24 GND Ground
25 R4_0- LVDS Channel 4, Signal 0-
26 R4_0+ LVDS Channel 4, Signal 0+
27 R4_1- LVDS Channel 4, Signal 1-
28 R4_1+ LVDS Channel 4, Signal 1+
29 R4_2- LVDS Channel 4, Signal 2-
30 R4_2+ LVDS Channel 4, Signal 2+
31 GND Ground
©Copyright AU Optronics Corp. 2009 All Rights Reserved. T520HW01 V1 9/31 No Reproduction and Redistribution Allowed
LVDS
Channel 4
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32 R4_CLK- LVDS Channel 4, Clock -
33 R4_CLK+ LVDS Channel 4, Clock +
34 GND Ground
35 R4_3- LVDS Channel 4, Signal 3-
36 R4_3+ LVDS Channel 4, Signal 3+
37 R4_4- NC
38 R4_4+ NC
39 GND Ground
40 NC AUO internal use
41 NC AUO internal use
42 NC NC
43 NC NC
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44 NC NC
45
46 NC NC
47 NC
48 NC
49 NC
50 NC
51 NC AUO internal use
Note 1: All GND (ground) pins should be connected together and should also be connected to the LCD s
Note 2: All V
Note 3: All NC (no connection) pins should be open without voltage input.
LCD connector: FI-RE41S-HF (Manufactured by JAE)
Mating connector: FI-RE41S-HL (Manufactured by JAE)
LVDS
order
metal frame.
DD
LVDS_SEL (H/OPEN:NS ; L:JEIDA ) Default :NS
AUO internal use
(power input) pins should be connected together.
Pin No Symbol Description Note
1 VDD Operating Voltage Supply, +12V DC Regulated
2 VDD Operating Voltage Supply, +12V DC Regulated
3 VDD Operating Voltage Supply, +12V DC Regulated
4 VDD Operating Voltage Supply, +12V DC Regulated
5 VDD Operating Voltage Supply, +12V DC Regulated
6 GND Ground
7 GND Ground
8 GND Ground
©Copyright AU Optronics Corp. 2009 All Rights Reserved. T520HW01 V1 10/31 No Reproduction and Redistribution Allowed
Power
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