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©Copyright AU Optronics, Inc.
Feb, 2009 All Rights Reserved. T370HW03 V2 1/32
No Reproduction and Redistribution Allowed
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Update date: 2009/5/21
Product Specifications
37” HDTV Color TFT-LCD Module
Model Name: T370HW03. V2
() Preliminary Specifications
(*) Final Specifications
©Copyright AU Optronics, Inc.
June, 2008 All Rights Reserved. T370HW03 V2 2/31
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Contents
No
COVER
CONTENTS
RECORD OF REVISIONS
1 GENERAL DESCRIPTION
2 ABSOLUTE MAXIMUM RATINGS
3 ELECTRICAL SPECIFICATIONS
3-1 ELECTRICAL CHARACTREISTIC
3-2 INTERFACE CONNECTIONS
3-3 SIGNAL TIMING SPECIFICATIONS
3-4 SIGNAL TIMING WAVEFORMS
3-5 COLOR INPUT DATA REFERENCE
3-6 POWER SEQUENCE
4 OPTICAL CHARACTERISTICS
5 MECHANICAL CHARACTERISTICS
6 RELIABLITY
7 INTERNATIONAL STANDARDS
7-1 SAFETY
7-2 EMC
8 PACKING
9 PRECAUTIONS
©Copyright AU Optronics, Inc.
June, 2008 All Rights Reserved. T370HW03 V2 3/31
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Record of Revision
Version Date No Old Description New Description Remark
0 2009.3.24 First draft
1 2009,04,23 Update cycle to cycle jitter
2 2009,05,14
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Update 25
кʳ ˩
3 2009,05,21
Update packing information
©Copyright AU Optronics, Inc.
June, 2008 All Rights Reserved. T370HW03 V2 4/31
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1. General Description
This specification applies to the 37.0 inch Color TFT-LCD Module T370HW03 V2. This
LCD module has a TFT active matrix type liquid crystal panel 1920x1080 pixels, and
diagonal size of 37.0 inch. This module supports 1920x1080 HDTV mode (Non-interlace).
Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in
vertical stripes. Gray scale or the brightness of the sub-pixel color is determined with a 10-bit
gray scale signal for each dot.
This model use 2008 Front Mount Bezel structure with narrow bezel design.
The T370HW03 V2 has been designed to apply the 8-bit+FRC 4 channel LVDS interface
method. It is intended to support displays where high brightness, wide viewing angle, high
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color saturation, and high color depth are very important.
The T370HW03 V2 model is RoHS verified which can be distinguished on panel label.
*
General Information
Items Specification Unit Note
Active Screen Size 37.01 inch
Display Area 819.36 (H) x 460.89(V) mm
Outline Dimension 855.8(H)×497.4(V)×44.9(D) mm
Driver Element a-Si TFT active matrix
Display Colors 8 bit +FRC,1.074B Colors
Number of Pixels 1920 x 1080 Pixel
Pixel Pitch 0.42675(H) x 0.42675(W) mm
Pixel Arrangement RGB vertical stripe
Display Operation Mode Normally Black
Surface Treatment AG Haze= 11%, 3H
Weight 9,000(Max) g
Lamp quantity, type 16, Straight type Pcs
©Copyright AU Optronics, Inc.
June, 2008 All Rights Reserved. T370HW03 V2 5/31
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2. Absolute Maximum Ratings
The following are maximum values that, if exceeded, may cause permanent damage to the device.
Item Symbol Min Max Unit Note
Logic/LCD Drive Voltage Vcc -0.3 14 [Volt] [1]
Input Voltage of Signal Vin -0.3 4 [Volt] [1]
Operating Temperature TOP 0 50 [oC] [2]
Operating Humidity HOP 10 90 [%RH] [2]
Storage Temperature TST -20 60 [oC] [2]
Storage Humidity HST 10 90 [%RH] [2]
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Panel surface temperature PST 65 [oC]
Note 1: Duration = 50msec
Note 2 : Maximum Wet-Bulb should be 39 and No condensation.
The relative humidity must not exceed 90% non-condensing at temperatures of 40 or less. At temperatures
greater than 40 , the wet bulb temperature must not exceed 39 .
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©Copyright AU Optronics, Inc.
June, 2008 All Rights Reserved. T370HW03 V2 6/31
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D
3. Electrical Characteristics
The T370HW03 V2 requires two power inputs. One is employed to power the LCD electronics and to drive the
TFT array and liquid crystal. The second input power for the BLU, is to power lamps.
3-1 Electrical Characteristics (Ta=25±±±±2oC)
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Values Parameter Symbol
Unit Notes
Min Typ Max
Power Supply Input Voltage Vcc 10.8 12.0 13.2 Vdc
Power Supply Input Current Icc 1
1.2 A [1]
Power Consumption Pc - 12 14.4 Watt [1]
LV DS
Interface
Inrush Current I
ifferential Input High
Threshold Voltage
Differential Input Low
Threshold Voltage
Common Input Voltage
- 4 Apeak [2]
RUSH
VTH 100 mV [3]
V
-100 mV [3]
TL
V
1.0 1.2 1.4 V
ICM
LVDS Clock to Data
Skew Margin
t
-0.4 - +0.4 ns
RMG
LVDS Clock to Clock
Skew Margin(Cycle to
Cycle jitter)
t
-2% - +2% Tclk
RCL
[7]
66MHz Fclk
80MHz
[8]
66MHz Fclk
80MHz
Interface
Life Time
Differential input voltage
Input High Threshold Voltage
Input Low Threshold Voltage
|
V
ID
V
IH
(High)
VIL (Low) 0 0.9 Vdc
50000 Hours
100 400 600 mV
|
2.4 3.3 Vdc CMOS
Note :
1. The check pattern is base on white pattern. The ripple voltage should be controlled under 10% of V
=vf
Vcc=12.0V,
120Hz, fCLK=75Mhz for one channel, 25 , Test Pattern : White Patternк
©Copyright AU Optronics, Inc.
June, 2008 All Rights Reserved. T370HW03 V2 7/31
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2. Measurement condition :
10%
GND
Figure 1: Measurement of I
3. Measurement of LVDS differential voltage is shown in Figure 2.
VTH
VCIM
VTL
100%
90%
T
rush
= 470ȝs
rush
0V
Figure 2 : LVDS Differential Voltage
4. The performance of the Lamp in LCM, for example life time or brightness, is extremely influenced by
the characteristics of the DC-AC Inverter. So all the parameters of an inverter should be carefully
designed so as not to produce too much leakage current from high-voltage output of the inverter.
When you design or order the inverter, please make sure unwanted lighting caused by the mismatch
of the lamp and the inverter (no lighting, flicker, etc) never occurs. When you confirm it, the LCD
Assembly should be operated in the same condition as installed in your instrument.
5. Do not attach a conducting tape to lamp connecting wire. If the lamp wire attach to conducting tape,
TFT-LCD Module have a low luminance and the inverter has abnormal action because leakage current
occurs between lamp wire and conducting tape.
6. The relative humidity must not exceed 90% non-condensing at temperatures of 40 or less. At
temperatures greater than 40 , the wet bulb temperature must not exceed 39 . When operate at low
temperatures, the brightness of CCFL will drop and the life time of CCFL will be reduced.
7. Measurement of LVDS Clock to Data Skew Margin is shown in Figure 3.
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©Copyright AU Optronics, Inc.
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8. Measurement of LVDS Clock to Clock Skew Margin is shown in Figure 4.
Figure 3: LVDS Clock to Data Skew Margin
Figure 4: LVDS Clock to Clock Skew Margin
©Copyright AU Optronics, Inc.
June, 2008 All Rights Reserved. T370HW03 V2 9/31
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3-2 Interface Connections
LCD connector : JAE FI-RE51S-HF
Pin
No
Symbol Description Note
1 Reserve AUO internal use ʳ
2 Reserve AUO internal use ʳ
3 Reserve AUO internal use ʳ
4 Reserve AUO internal use ʳ
5 Reserve AUO internal use ʳ
6 Reserve AUO internal use ʳ
7 LVDS Option Low/Open for Normal (NS), High for JEIDA Default : NS mode
8 Reserve AUO internal use ʳ
9 Reserve AUO internal use ʳ
10 Reserve AUO internal use ʳ
11 GND Ground ʳ
12 R1_0- LVDS Channel 1, Signal 013 R1_0+ LVDS Channel 1, Signal 0+
14 R1_1- LVDS Channel 1, Signal 115 R1_1+ LVDS Channel 1, Signal 1+
16 R1_2- LVDS Channel 1, Signal 217 R1_2+ LVDS Channel 1, Signal 2+
18 GND Ground
19 R1_CLK- LVDS Channel 1, Clock 20 R1_CLK+ LVDS Channel 1, Clock +
21 GND Ground
22 R1_3- LVDS Channel 1, Signal 323 R1_3+ LVDS Channel 1, Signal 3+
24 R1_4- LVDS Channel 1, Signal 425 R1_4+ LVDS Channel 1, Signal 4+
26 GND Ground
27 GND Ground
28 R2_0- LVDS Channel 2, Signal 029 R2_0+ LVDS Channel 2, Signal 0+
30 R2_1- LVDS Channel 2, Signal 131 R2_1+ LVDS Channel 2, Signal 1+
32 R2_2- LVDS Channel 2, Signal 233 R2_2+ LVDS Channel 2, Signal 2+
34 GND Ground
35 R2_CLK- LVDS Channel 2, Clock 36 R2_CLK+ LVDS Channel 2, Clock +
37 GND Ground
38 R2_3- LVDS Channel 2, Signal 3-
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Channel 1
Channel 2
©Copyright AU Optronics, Inc.
April, 2008 All Rights Reserved. T370HW03 V2 10/30
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