AUO P550HVN02.0 Specification

P550HVN02.0 Product Specification

Rev.4.0

Model Name: P550HVN02.0

Issue Date : 2013/02/08

(…)Preliminary Specifications

(＊＊＊＊)Final Specifications

Customer Signature Date AUO Date

Approved By

_________________________________

Note

Approval By PM Director

Paley Fang

_____________________________

Reviewed By RD Director

Eugene CC Chen

____________________________________

Reviewed By Project Leader

Alex HM Chen

____________________________________

Prepared By PM

Yalan Chen

____________________________________

P550HVN02.0 Product Specification

Rev.4.0

Contents

No

CONTENTS

RECORD OF REVISIONS

1 GENERAL DESCRIPTION

2 ABSOLUTE MAXIMUM RATINGS

3 ELECTRICAL SPECIFICATION

3-1 ELECTRIACL CHARACTERISTICS

3-2 INTERFACE CONNECTIONS

3-3 SIGNAL TIMING SPECIFICATION

3-4 SIGNAL TIMING WAVEFORM

3-5 COLOR INPUT DATA REFERENCE

3-6 POWER SEQUENCE

3-7 BACKLIGHT SPECIFICATION

4 OPTICAL SPECIFICATION

5 MECHANICAL CHARACTERISTICS

5-1 PLACEMENT SUGGESTIONS

6 RELIABILITY TEST ITEMS

7 INTERNATIONAL STANDARD

7-1 SAFETY

7-2 EMC

8 PACKING

8-1 DEFINITION OF LABEL

8-2 PACKING METHODS

8-3 PALLET AND SHIPMENT INFORMATION

9 PRECAUTION

9-1 MOUNTING PRECAUTIONS

9-2 OPERATING PRECAUTIONS

9-3 ELECTROSTATIC DISCHARGE CONTROL

9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE

9-5 STORAGE

9-6 HANDLING PRECAUTIONS FOR PROTECT FILM

9-7 OPERATING CONDITION IN PID APPLICATION

Record of Revision

P550HVN02.0 Product Specification

Rev.4.0

Version

0.0 2011/12/30

0.1 2012/03/02

9

11

15 Modify 3.7.1 Electrical specification: all items

16

17

20 Modify 5. Mechanical Characteristics: weight Typ 20kg.

24 Cancel UL60065

0.2 2012/04/30

17

Date Page Description

First preliminary spec release

Modify 3.1.1 Electrical Characteristics

6

Backlight Power Consumption: Typ 96.5, Max 105.6.

Modify 3.2 Interface Connections :Pin 6

High/Open : Rotate Disable; GND : Rotate Enable

Modify 3.3 Signal Timing Specification

Vertical Section: Period min 1096.

Modify 3.7.2 Input Pin Assignment: Pin 13: N.C; and PWM dimming d

rawing.

Modify 4. Optical Specification Rx:0.645 Ry:0.330 Gx:0.290 Gy:0.615 Bx:0.145 By:0.055

9 Modify 3.2 Interface Connections :Pin 6 : N.C

Modify 4. Optical Specification

Rx:0.640 Gx:0.320 Gy:0.620 Bx:0.150 By:0.050

20 Modify 5.1 Placement suggestions description.

20 Modify module weight (typ=16kg)

27 Modify packing box weight = 4.11kg

1.0 2012/05/21 Final spec release

17 Add 3.7.3 Power Sequence for Backlight (LED)

21-22 Modify ME drawing

25 Modify 7.1 Safety version

2.0 2012/07/20

26 Modify 8.1 packing label: TUV label version update

3.0 2012/07/27

4.0 2013/02/07 19 Modify 4.0 Optical Gx:0.300, Gy:0.600

27 Modify UL mark

9 Modify 3.2 Interface Connections :Pin 5 : LVDS 8/10bit Input Selection

11 Add LVDS 8bit cycle diagram.

P550HVN02.0 Product Specification

Rev.4.0

1. General Description

This specification applies to the 54.6 inch Color TFT-LCD Module P550HVN02.0. This LCD module has a TFT

active matrix type liquid crystal panel 1,920x1,080 pixels, and diagonal size of 54.6 inch. This module supports

1,920x1080 mode. Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical

stripes. Gray scale or the brightness of the sub-pixel color is determined with a 10-bit gray scale signal for each

dot.

The P550HVN02.0 has been designed to apply the 10-bit 2 channel LVDS interface method. It is intended to

support displays where high brightness, wide viewing angle, high color saturation, and high color depth.

* General Information

Items Specification Unit Note

Active Screen Size 54.6 Inch

Display Area 1209.6(H) x 680.4(V) mm

Outline Dimension 1235.6(H) x 706.4(V) x 25.5(D) mm 1

Driver Element a-Si TFT active matrix

Display Colors 10 bit (8bit+FRC), 1073.7M Colors

Number of Pixels 1,920x1080 Pixel

Pixel Pitch 0.21 (H) x 0.63(W) mm

Pixel Arrangement RGB vertical stripe

Display Operation Mode Normally Black

Display Orientation Landscape/Portrait Enable

Surface Treatment AG Haze = 11%

Note:

(1)Dmax: 25.5mm (Front bezel to Driver cover); Dmin: 9.9mm (Front bezel to Bezel back)

P550HVN02.0 Product Specification

2. Absolute Maximum Ratings

The followings are maximum values which, if exceeded, may cause faulty operation or damage to the unit

Item Symbol Min Max Unit Conditions

Logic/LCD Drive Voltage Vcc -0.3 14 [Volt] Note 1

Input Voltage of Signal Vin -0.3 4 [Volt] Note 1

Operating Temperature TOP 0 +50 [oC] Note 2

Operating Humidity HOP 10 90 [%RH] Note 2

Storage Temperature TST -20 +60 [oC] Note 2

Storage Humidity HST 10 90 [%RH] Note 2

Panel Surface Temperature PST 65 [oC] Note 3

Note 1: Duration:50 msec.

Note 2 : Maximum Wet-Bulb should be 39 and No condensation.℃

Rev.4.0

The relative humidity must not exceed 90% non-condensing at temperatures of 40 or less. At temperatures

greater than 40 , the wet bulb temperature must not exceed 39 .

Note 3: Surface temperature is measured at 50℃ Dry condition

℃ ℃

℃

P550HVN02.0 Product Specification

Rev.4.0

3. Electrical Specification

The P550HVN02.0 requires two power inputs. One is employed to power the LCD electronics and to drive the

TFT array and liquid crystal. The second is employed for LED driver.

3.1.1 Electrical Characteristics

Parameter Symbol

LCD

Power Supply Input Voltage VDD 10.8 12 13.2 VDC

Power Supply Input Current IDD -- 0.9 1.08 A 1

Power Consumption PC -- 10.8 12.96 Watt 1

Inrush Current I

Permissible Ripple of Power Supply Input Voltage (for input power=12V)

Input Differential Voltage

Differential Input High Threshold

LVDS

Interface

Voltage

Differential Input Low Threshold

Voltage

Input Common Mode Voltage

RUSH

VRP -- -- VDD * 5%

∣

V

∣

ID

VTH +100 -- +300 mVDC 4

V

TL

V

ICM

Min. Typ. Max

- - 5.5 A 2

200 400 600 mVDC 4

-300 -- -100 mV

1.1

Value

1.25

Unit Note

mV

1.4

V

pk-pk

DC

3

4

CMOS

Input High Threshold Voltage

Interface

Input Low Threshold Voltage

Backlight Power Consumption PBL --

Life Time(MTTF) 50000

VIH

2.7 -- 3.3 VDC

(High)

VIL

0 -- 0.6 VDC

(Low)

3.1.2 AC Characteristics

LVDS

Interface

Parameter Symbol

Receiver Clock : Spread Spectrum Modulation range Receiver Clock : Spread Spectrum Modulation frequency Receiver Data Input Margin Fclk = 85 MHz Fclk = 65 MHz

Fclk_ss

Fss

tRMG

Min. Typ. Max

Fclk

-3%

30

-0.4

-0.5

96.5 105.6

60000 -- 8

Value

--

Fclk

+3%

200

0.4

0.5

W

Unit Note

MHz 9

KHz

ns

7

9

10

s

µ

Note :

1. Test Condition:

(1) V

= 12.0V

DD

(2) Fv = Type Timing, 60Hz, 120Hz or Other

(3) F

= Max freq.

CLK

(4) Temperature = 25 ℃

(5) Test Pattern : White Pattern

2. Measurement condition : Rising time = 400us

90%

P550HVN02.0 Product Specification

Rev.4.0

VVVV

DD

DDDD

GND

GNDGND

10%

400

400400

3. Test Condition:

(1) The measure point of V

is in LCM side after connecting the System Board and LCM.

RP

(2) Under Max. Input current spec. condition.

4. V

= 1.25V

ICM

L V D S -

V

IC M

L V D S +

G N D

|VID|

V

T H

|VID|

V

T L

0 V

|VID|

5. Do not attach a conducting tape to lamp connecting wire. If the lamp wire attach to conducting tape,

TFT-LCD Module have a low luminance and the inverter has abnormal action because leakage current

occurs between lamp wire and conducting tape.

6. The relative humidity must not exceed 80% non-condensing at temperatures of 40 or less. At

temperatures greater than 40 , the wet bulb temperature must not exceed 39 . When operate at low

℃ ℃

temperatures, the brightness of LED will drop and the life time of LED will be reduced.

7. The measure points of V

and V

IH

are in LCM side after connecting the System Board and LCM.

IL

℃

P550HVN02.0 Product Specification

8. The lifetime (MTTF) is defined as the time which luminance of the LED is 50% compared to its original

value. [Operating condition: Continuous operating at Ta = 25±2℃]

9. LVDS Receiver Clock SSCG (Spread spectrum clock generator) is defined as below figures

1111////FFFF

SS

SSSS

Fclk

Fclk____ss

FclkFclk

ss((((max

ssss

Fclk

FclkFclk

Fclk

Fclk____ss

FclkFclk

ss((((min

ssss

max))))

maxmax

min))))

minmin

10. Receiver Data Input Margin

Rev.4.0

Parameter Symbol

Min Type Max

Input Clock Frequency Fclk Fclk (min) -- Fclk (max) MHz

Input Data Position0 tRIP1 -|tRMG| 0 |tRMG| ns

Input Data Position1 tRIP0 T/7-|tRMG| T/7 T/7+|tRMG| ns

Input Data Position2 tRIP6 2T/7-|tRMG|

Input Data Position3 tRIP5 3T/7-|tRMG|

Input Data Position4 tRIP4 4T/7-|tRMG|

Input Data Position5 tRIP3 5T/7-|tRMG|

Input Data Position6 tRIP2 6T/7-|tRMG|

Rating

Unit

2T/7 2T/7+|tRMG| ns

3T/7 3T/7+|tRMG| ns

4T/7 4T/7+|tRMG| ns

5T/7 5T/7+|tRMG| ns

6T/7 6T/7+|tRMG| ns

tRIP2

tRIP3

tRIP4

tRIP5

Note

T=1/Fclk

tRIP6

tRIP0

tRIP1 LVDS-Rx Input Data

Rx1 Rx0 Rx6 Rx5 Rx4 Rx3 Rx2 Rx1 Rx0 Rx6Rx2Rx3

LVDS-Rx

VVVV

=

= 0000VVVV

= =

diff

Input Clock

diff diff

1/Fclk=T

3.2 Interface Connections



LCD connector : JAE FI-RE51S-HF (JAE)or Compatible

P550HVN02.0 Product Specification

Rev.4.0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19 CH1_CLK- LVDS Channel 1, Clock - 44

20 CH1_CLK+ LVDS Channel 1, Clock + 45

21

22

23

24

25

Symbol Description PIN

N.C. AUO Internal Use Only 26

N.C.

N.C. AUO Internal Use Only 28

N.C.

BITSEL

N.C. No connection 31

LVDS_SEL

N.C. No connection 33

N.C. No connection 34

N.C. No connection 35 CH2_CLK- LVDS Channel 2, Clock -

GND Ground 36 CH2_CLK+ LVDS Channel 2, Clock +

CH1_0- LVDS Channel 1, Signal 0- 37

CH1_0+ LVDS Channel 1, Signal 0+ 38

CH1_1- LVDS Channel 1, Signal 1- 39

CH1_1+ LVDS Channel 1, Signal 1+ 40

CH1_2- LVDS Channel 1, Signal 2- 41

CH1_2+ LVDS Channel 1, Signal 2+ 42

GND Ground 43

GND Ground 46

CH1_3- LVDS Channel 1, Signal 3- 47

CH1_3+ LVDS Channel 1, Signal 3+ 48

CH1_4- LVDS Channel 1, Signal 4- 49

CH1_4+ LVDS Channel 1, Signal 4+ 50

AUO Internal Use Only 27

AUO Internal Use Only 29

LVDS 8/10bit Input Selection

Low(GND) : 8bits

Open/High(3.3V) : 10bits

Open/High(3.3V) for NS,

Low(GND) for JEIDA

51

30

32

Symbol Description

N.C. AUO Internal Use Only

N.C.

CH2_0- LVDS Channel 2, Signal 0-

CH2_0+ LVDS Channel 2, Signal 0+

CH2_1- LVDS Channel 2, Signal 1-

CH2_1+ LVDS Channel 2, Signal 1+

CH2_2- LVDS Channel 2, Signal 2-

CH2_2+ LVDS Channel 2, Signal 2+

GND Ground

CH2_3- LVDS Channel 2, Signal 3-

CH2_3+ LVDS Channel 2, Signal 3+

CH2_4- LVDS Channel 2, Signal 4-

CH2_4+ LVDS Channel 2, Signal 4+

N.C. AUO Internal Use Only

N.C. No connection

GND Ground

N.C. No connection

V

DD

V

DD

V

DD

V

DD

AUO Internal Use Only

Power Supply, +12V DC Regulated

Note 1: All GND (ground) pins should be connected together and should also be connected to the LCD’s

metal frame.

Note 2: All VDD (power input) pins should be connected together.

Note 3: All NC (no connection) pins please leave this pin unoccupied. It can not be

connected by any signal (Low/GND/High).

LVDS Option for 10bit LVDS Option = High/OpenNS

P re vio u s C yc le C urr e nt C y c le N ex t C yc l e

P re vio u s C yc le C urr e nt C y c le N ex t C yc l e P re vio u s C yc le C urr e nt C y c le N ex t C yc l e

C lo c k

C lo c kC lo c k

C H x

C H x ____ 0000 ++++

C H xC H x C H x

C H x ____ 0000 ----

C H xC H x

C H x

C H x ____ 1111 ++++

C H xC H x C H x

C H x ____ 1111 ----

C H xC H x

C H x

C H x ____ 2222 ++++

C H xC H x C H x

C H x ____ 2222 ----

C H xC H x

C H x

C H x ____ 3333 ++++

C H xC H x C H x

C H x ____ 3333 ----

C H xC H x

D EBBBB 2222BBBB 3333 BBBB 4444BBBB 5555N A

D ED E

N ARRRR 6666RRRR 7777 GGGG 6666GGGG 7777BBBB 6666 RRRR 7777

N AN A

P550HVN02.0 Product Specification

RRRR 0000RRRR 5555 GGGG 0000GGGG 0000RRRR 0000RRRR 1111 RRRR 2222RRRR 3333RRRR 4444 RRRR 1111

GGGG 1111BBBB 0000 BBBB 1111BBBB 1111GGGG 1111GGGG 2222 GGGG 3333GGGG 4444GGGG 5555 GGGG 2222

N A D E

N AN A

N A BBBB 3333

N AN A

BBBB 2222N A

RRRR 6666BBBB 7777 N A

D ED E

N AN A

Rev.4.0

C H x

C H x ____ 4444 ++++

C H xC H x C H x

C H x ____ 4444 ----

C H xC H x

N ARRRR 8888RRRR 9999 GGGG 8888GGGG 9999BBBB 8888 RRRR 9999

N AN A

Note: x = 1, 2, 3, 4…

LVDS Option = LowJEIDA

P re v io u s C yc le C ur r e nt C yc l e N ex t C yc l e

P re v io u s C yc le C ur r e nt C yc l e N ex t C yc l e P re v io u s C yc le C ur r e nt C yc l e N ex t C yc l e

C lo c k

C lo c kC lo c k

C Hx

C Hx ____ 0000 ++++

C HxC Hx C Hx

C Hx ____ 0000 ----

C HxC Hx

C Hx

C Hx ____ 1111 ++++

C HxC Hx C Hx

C Hx ____ 1111 ----

C HxC Hx

C Hx

C Hx ____ 2222 ++++

C HxC Hx C Hx

C Hx ____ 2222 ----

C HxC Hx

D EBBBB 6666BBBB 7777 BBBB 8888BBBB 9999N A

D ED E

RRRR 8888BBBB 9999 N A

N AN A

RRRR 4444RRRR 9999 GGGG 4444GGGG 4444RRRR 4444RRRR 5555 RRRR 6666RRRR 7777RRRR 8888 RRRR 5555

GGGG 5555BBBB 4444 BBBB 5555BBBB 5555GGGG 5555GGGG 6666 GGGG 7777GGGG 8888GGGG 9999 GGGG 6666

N A D E

N AN A

N A BBBB 7777

N AN A

BBBB 6666N A

D ED E

C Hx

C Hx ____ 3333 ++++

C HxC Hx C Hx

C Hx ____ 3333 ----

C HxC Hx

C Hx

C Hx ____ 4444 ++++

C HxC Hx C Hx

C Hx ____ 4444 ----

C HxC Hx

N ARRRR 2222RRRR 3333 GGGG 2222GGGG 3333BBBB 2222 RRRR 3333

N AN A

N ARRRR 0000RRRR 1111 GGGG 0000GGGG 1111BBBB 0000 RRRR 1111

N AN A

RRRR 2222BBBB 3333 N A

RRRR 0000BBBB 1111 N A

N AN A

Note: x = 1, 2, 3, 4…

LVDS Option for 8bit

LVDS Option = High/OpenNS

P re v io u s C ycle C urren t C yc le N e xt C yc le

P re v io u s C ycle C urren t C yc le N e xt C yc le P re v io u s C ycle C urren t C yc le N e xt C yc le

C lo c k

C lo c kClo ck

C H x

C H x____ 0000 ++++

C H xC H x

C H x

C H x____ 0000 ----

C H xC H x

C H x

C H x____ 1111 ++++

C H xC H x

C H x

C H x____ 1111 ----

C H xC H x

C H x

C H x____ 2222 ++++

C H xC H x

C H x

C H x____ 2222 ----

C H xC H x

C H x

C H x____ 3333 ++++

C H xC H x

C H x

C H x____ 3333 ----

C H xC H x

D EBBBB 2222BBBB 3333 BBBB 4444BBBB 5555N A

D ED E

N ARRRR 6666RRRR 7777 GGGG 6666GGGG 7777BBBB 6666 RRRR 7777

N AN A

Note: x = 1, 2, 3, 4…

P550HVN02.0 Product Specification

RRRR 0000RRRR 5555 GGGG 0000GGGG 0000RRRR 0000RRRR 1111 RRRR 2222RRRR 3333RRRR 4444 RRRR 1111

GGGG 1111BBBB 0000 BBBB 1111BBBB 1111GGGG 1111GGGG 2222 GGGG 3333GGGG 4444GGGG 5555 GGGG 2222

N A D E

N AN A

N A BBBB 3333

N AN A

BBBB 2222N A

RRRR 6666BBBB 7777 N A

D ED E

N AN A

Rev.4.0

LVDS Option = LowJEIDA

P re v io u s C ycle C urren t C ycle N e xt C yc le

P re v io u s C ycle C urren t C ycle N e xt C yc le P re v iou s C ycle C urren t C ycle N e xt C yc le

C lo c k

C lo c kC lock

C H x

C H x ____ 0000 ++++

C H xCH x

C H x

C H x ____ 0000 ----

C H xCH x

C H x

C H x ____ 1111 ++++

C H xCH x

C H x

C H x ____ 1111 ----

C H xCH x

C H x

C H x ____ 2222 ++++

C H xCH x

C H x

C H x ____ 2222 ----

C H xCH x

C H x

C H x ____ 3333 ++++

C H xCH x

C H x

C H x ____ 3333 ----

C H xCH x

Note: x = 1, 2, 3, 4…

D EBBBB 4444BBBB 5555 BBBB 6666BBBB 7777N A

D ED E

N ARRRR 0000RRRR 1111 GGGG 0000GGGG 1111BBBB 0000 RRRR 1111

N AN A

N A D E

N AN A

N A BBBB 5555

N AN A

RRRR 2222RRRR 7777 GGGG 2222GGGG 2222RRRR 2222RRRR 3333 RRRR 4444RRRR 5555RRRR 6666 RRRR 3333

GGGG 3333BBBB 2222 BBBB 3333BBBB 3333GGGG 3333GGGG 4444 GGGG 5555GGGG 6666GGGG 7777 GGGG 4444

BBBB 4444N A

RRRR 0000BBBB 1111 N A

D ED E

N AN A

P550HVN02.0 Product Specification

Rev.4.0

3.3 Signal Timing Specification

This is the signal timing required at the input of the user connector. All of the interface signal timing should be

satisfied with the following specifications for its proper operation.

Timing Table (DE only Mode)

Vertical Frequency Range (60Hz)

Signal Item Symbol Min. Typ. Max Unit

Period Tv 1096 1125 1480

Vertical Section

Horizontal Section

Clock Frequency Fclk=1/Tclk 50 74.25 82 MHz

Vertical Frequency Frequency Fv 47 60 63 Hz

Horizontal Frequency

Notes:

(1) Display position is specific by the rise of DE signal only.

Horizontal display position is specified by the rising edge of 1st DCLK after the rise of 1st DE, is displayed on the

left edge of the screen.

(2)Vertical display position is specified by the rise of DE after a “Low” level period equivalent to eight times of

Active Tdisp (v) 1080 Th

Blanking Tblk (v) 16 45 400

Period Th 1040 1100 1328 Tclk

Active Tdisp (h) 960 Tclk

Blanking Tblk (h) 80 140 368 Tclk

Frequency Fh 60 67.5 73 KHz

Th

horizontal period. The 1st data corresponding to one horizontal line after the rise of 1st DE is displayed at the top

line of screen.

(3)If a period of DE “High” is less than 1920 DCLK or less than 1080 lines, the rest of the screen displays black.

(4)The display position does not fit to the screen if a period of DE “High” and the effective data period do not

synchronize with each other.

3.4 Signal Timing Waveforms

P550HVN02.0 Product Specification

Rev.4.0

CH2

Pixel

M-6

Pixel

M-4

Pixel

M-2

Pixel

M

Invalid Data

Pixel

2

Pixel

4

Pixel

6

Pixel

8

Pixel

10

Pixel

12

CH1

Pixel

M-7

Pixel

M-5

Pixel

M-3

Pixel

M-1

Invalid Data

Pixel

1

Pixel

3

Pixel

5

Pixel

7

Pixel

9

Pixel

11

DE

Tdisp(h) Tblk(h)

CLK

RGB

Data

Line

N

Tclk

Invalid Data Invalid Data

Line

1

Line

2

Th

Line

3

Line

4

DE

Th

Tv

Tdisp(v)Tblk(v)

Pixel

M-4

Pixel

M-2

Pixel

M

Invalid Data

Pixel

2

Pixel

4

Pixel

M-5

Pixel

M-3

Pixel

M-1

Invalid Data

Pixel

1

Pixel

3

Line

N

N L in e

N L in eN L in e

M

M p

p

p i

i

x

x e

e

e l

l

Basic

P550HVN02.0 Product Specification

Rev.4.0

3.5 Color Input Data Reference

The brightness of each primary color (red, green and blue) is based on the 10 bit gray scale data input for the

color; the higher the binary input, the brighter the color. The table below provides a reference for color versus data

input.

COLOR DATA REFERENCE

Input Color Data

Color

Black 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Red(1023) 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Green(1023) 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0

Blue(1023) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1

Color

Cyan 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

Magenta 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1

Yellow 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0

White 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

RED(000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

RED(001) 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

R

----

RED(1022) 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

RED(1023) 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

MSB LSB

R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 G9 G8 G7 G6 G5 G4 G3 G2 G1 G0 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0

RED

MSB LSB

GREEN

BLUE

MSB LSB

GREEN(000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

GREEN(001) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0

G

----

GREEN(1022) 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0

GREEN(1023) 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0

BLUE(000) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

BLUE(001) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1

B

----

BLUE(1022) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0

BLUE(1023) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1

3.6 Power Sequence

 Power Sequence of LCD

P550HVN02.0 Product Specification

Rev.4.0

Pow er Sup p ly For LCD

Pow er Sup p ly For LCD Pow er Sup p ly For LCD VD D

VD D (+

(+ 12

VD D VD D

In ter fa c e Sig n a l

In ter fa c e Sig n a lIn ter fa c e Sig n a l ((((LV DS D a ta

12 VVVV ))))

(+(+

121 2

LV DS D a ta &

LV DS D a ta LV DS D a ta

& C LK

CLK ))))

& &

CLKCLK

G ND

Back lig h t o n

Back lig h t o n ////o ff

Back lig h t o nBackl ig h t o n co n tro l sig n a l

co n tro l sig n a l

co n tro l sig n a lco n tro l sig n a l ((((VBLO N

VBLO N ))))

VBLO NVBLO N

off

offoff

GN D

CM O S In terface S ig n a l

CM O S In terface S ig n a lCM O S In terface S ig n a l

G ND

Parameter

t1 0.4 --- 30 ms

t2 0.1 --- 50 ms

10 %

90 %

t1

t2

Valid D ata

Valid D ataV a lid D ata

t3 t4

t8 t9

Values

Min. Type. Max.

90 %

10 %

t6

t5

10 %

t7

Unit

t3 450 --- --- ms

t4 0*1 --- --- ms

t5 0 --- --- ms

t6 --- --- ---*2 ms

t7 500 --- --- ms t8 10 --- 50 ms

t9 0 --- --- ms

Note: (1) t4=0 : concern for residual pattern before BLU turn off. (2) t6 : voltage of VDD must decay smoothly after power-off. (customer system decide this value)

3.7 Backlight Specification

The backlight unit contains 144pcs LED.

3.7.1 Electrical specification

Item Symbol Condition

P550HVN02.0 Product Specification

Rev.4.0

Spec

Unit Note

Min Typ Max

1

2

3

4

5 Control signal voltage

6 Control signal current

7

8

9

10

Note 1: Dimming ratio= 100%,（Ta=25±5℃, Turn on for 45minutes）

Input Voltage VDDB - 22.8

Input Current I

Input Power P

Inrush Current I

V

Signal

External PWM Duty ratio

(input duty ratio)

External PWM

Frequency

DET status signal DET

Input Impedance Rin VDDB=24V 300 Kohm -

D_EPWM VDDB=24V

VDDB=24V

DDB

VDDB=24V

DDB

VDDB=24V

RUSH

Hi 2 - 5.5 -

Low

I

VDDB=24V

Signal

F_EPWM VDDB=24V 90 180 240 Hz 4

HI Open Collector VDC 5

Lo

VDDB=24V

24 25.2

4.02 4.40

96.5 105.6

10 Apeak 2

0 - 0.8

- - 1.5 mA -

0 - 100 % 4

0 - 0.8 VDC 5

VDC -

ADC 1

W 1

VDC

3

Note 2: MAX input current at all operating mode, measurement condition Rising time = 20ms (VDDB: 10%~90%)

Note 3: When BLU off ( VDDB = 24V , VBLON = 0V) , IDDB (max) = 0.1A

Note 4: Less than 5% dimming control is functional well and no backlight shutdown happened

Note 5: Normal: 0~0.8V ; Abnormal : Open collector

3.7.2 Input Pin Assignment

LED driver board connector:

P550HVN02.0 Product Specification

Rev.4.0

CI0114M1HRL-NH (Cvilux)

Pin Symbol Description

1 VDDB Operating Voltage Supply, +24V DC regulated

2 VDDB Operating Voltage Supply, +24V DC regulated

3 VDDB Operating Voltage Supply, +24V DC regulated

4 VDDB Operating Voltage Supply, +24V DC regulated

5 VDDB Operating Voltage Supply, +24V DC regulated

6 BLGND Ground and Current Return

7 BLGND Ground and Current Return

8 BLGND Ground and Current Return

9 BLGND Ground and Current Return

10 BLGND Ground and Current Return

11 DET

12 VBLON

13 NC NC

14 PDIM

BLU status detection:

Normal : 0~0.8V ; Abnormal : Open collector

BLU On-Off control:

BL On : High/Open (2V~3.3V);

BL off : Low (0~0.8V/GND)

External PWM (10%~100% Duty, open for 100%)

< NC ; at Internal PWM mode>

IF External PWM function less than 5% dimming ratio, Judge condition as below: (1)Backlight module must be lighted ON normally. (2)All protection function must work normally. (3)Uniformity and flicker could not be guaranteed

3.7.3 Power Sequence for Backlight (LED)

24V(typ.)

T3

Power Input for BLU

(VDDB)

Valid Dimming

Control Signal

(V_IPWM,V_EPWM)

BLU On/Off Enable

(VBLON)

90% 90%

10%

T1 T2

Dip condition

P550HVN02.0 Product Specification

10%

T7

T5

T4

T6

T7

Rev.4.0

Power Input for BLU

(VDDB)

VDDB(typ.)*0.8

T8

Parameter

Min Typ Max

T1 20 - - ms *1

T2 (Normal) 500 - -

T3 (Normal) 250 - -

T4 0 - -

T5 1 - -

T6 - -

T8 - - 10

Value

Units

ms

Ms

P550HVN02.0 Product Specification

Rev.4.0

4. Optical Specification

Optical characteristics are determined after the unit has been ‘ON’ and stable for approximately 45 minutes in a

dark environment at 25°C while panel is placed in the default position. The default position is T-con side as the up

side of panel. The value specified is at an approximate distance 50cm from the LCD surface at a viewing angle of φ

and θ equal to 0°.

Fig.1 presents additional information concerning the measurement equipment and method.

SR3 or equivalent

Parameter Symbol

Min. Typ. Max

Contrast Ratio CR 3200 4000 -- 1

Surface Luminance (White) LWH 360 450 -- cd/m2 2

Luminance Variation δ

Response Time (G to G) Tγ -- 6.5 10 Ms 4

Color Gamut NTSC 72 %

Color Coordinates

Red RX 0.640

RY 0.330

Green GX 0.300

GY 0.600

Blue BX 0.150

BY 0.050

White WX 0.280

WY

WHITE(9P)

-- -- 1.33 3

Typ.-0.03

Values

0.290

Unit Notes

Typ.+0.03

Viewing Angle 5

x axis, right(φ=0°) θr -- 89 -- degree

x axis, left(φ=180°) θl -- 89 -- degree

y axis, up(φ=90°) θu -- 89 -- degree

y axis, down (φ=270°) θ

-- 89 -- degree

d

2 3

7

P550HVN02.0 Product Specification

Rev.4.0

Note:

1. Contrast Ratio (CR) is defined mathematically as:

Surface Luminance of

Contrast Ratio=

Surface Luminance of

2. Surface luminance is luminance value at point 5 across the LCD surface 50cm from the surface with all pixels

displaying white. From more information see FIG 2. LWH=Lon5 where Lon5 is the luminance with all pixels

displaying white at center 5 location.

3. The variation in surface luminance, δWHITE is defined (center of Screen) as:

L

on5

off5

δ

WHITE(9P)

= Maximum(L

on1

, L

on2

,…,L

)/ Minimum(L

on9

on1

, L

on2

,…L

on9

)

4. Response time Tγ is the average time required for display transition by switching the input signal for five

luminance ratio (0%,25%,50%,75%,100% brightness matrix) and is based on Fv=60Hz to optimize.

Target Measured

Response Time

0%

25%

Start

50%

75%

100%

4. Viewing angle is the angle at which the contrast ratio is greater than 10. The angles are determined for the

horizontal or x axis and the vertical or y axis with respect to the z axis which is normal to the LCD surface. For

more information see FIG4.

FIG. 2 Luminance

0% 25% 50% 75% 100%

0% to 25% 0% to 50% 0% to 75% 0% to 100%

25% to 0% 25% to 50% 25% to 75% 25% to 100%

50% to 0% 50% to 25%

75% to 0% 75% to 25% 75% to 50%

100% to 0% 100% to 25% 100% to 50% 100% to 75%

50% to 75% 50% to 100%

75% to 100%

V

H/2

H/6

1

H

V/2 V/6

P550HVN02.0 Product Specification

Rev.4.0

FIG.3 Response Time

The response time is defined as the following figure and shall be measured by switching the input signal for “any level of gray(bright) “ and “any level of gray(dark)”.

Any level of gray (Bright) Any level of gray (Dark) Any level of gray (Bright)

FIG.4 Viewing Angle

P550HVN02.0 Product Specification

Rev.4.0

5. Mechanical Characteristics

The contents provide general mechanical characteristics for the model P550HVN02.0. In addition the figures in

the next page are detailed mechanical drawing of the LCD.

Horizontal (typ.) 1235.6 mm

Outline Dimension

Bezel Opening Area

Active Display Area

Weight Typ 16kg

5.1 Placement suggestions:

The Suggestion placement is as following:

1. Landscape Mode: The default placement is T-Con Side on the bottom side and the image is shown

upright via viewing from the front.

2. Portrait Mode: The default placement is that T-Con side has to be placed on the left side via viewing from

the front.

Vertical (typ.) 706.4 mm

Depth (typ.) 25.5 mm

Horizontal (typ.) 1216 mm

Vertical (typ.) 686.8 mm

Horizontal 1209.6 mm

Vertical 680.4 mm

Landscape mode(Front view) Portrait mode(Front view)

A

T-Con

P550HVN02.0 Product Specification

Rev.4.0

Front View

-

Back View

P550HVN02.0 Product Specification

Rev.4.0

6. Reliability Test Items

P550HVN02.0 Product Specification

Rev.4.0

1 High temperature storage test 3 60 , ℃500hrs

2 Low temperature storage test 3 -20 , ℃500hrs

3 High temperature operation test 3 50 , ℃500hrs

4 Low temperature operation test 3 -5 , ℃500hrs

5 Vibration test (non-operation) 3

6 Shock test (non-operation) 3

7 Vibration test (With carton) 1 (PKG)

Test Item Q’ty Condition

Wave form: random

Vibration level: 1.0G RMS

Bandwidth: 10-300Hz,

Duration: X, Y, Z 10min per axes

X,Y,Z : Horizontal, face up

Shock level: 30G

Waveform: half since wave, 11ms

Direction: ±X, ±Y, ±Z, One time each direction

Random wave (1.05G RMS, 10-200Hz)

10mins per each X,Y,Z axes

8 Drop test (With carton) 1 (PKG)

Surround four flats drop height:15 cm

Bottom flat drop height:25.4 cm twice

(ASTMD4169)

P550HVN02.0 Product Specification

7.

International Standard

7.1 Safety

(1) UL 60950-1, 2007, Standard for Safety of Information Technology Equipment Including electrical

Business Equipment.

(2) IEC 60950-1 : 2005, Standard for Safety of International Electrotechnical Commission

(3) EN 60950 : 2006+A11, European Committee for Electrotechnical Standardization (CENELEC),

EUROPEAN STANDARD for Safety of Information Technology Equipment Including Electrical Business

Equipment.

7.2 EMC

(1) ANSI C63.4 “Methods of Measurement of Radio-Noise Emissions from Low-Voltage Electrical and

Rev.4.0

Electrical Equipment in the Range of 9kHz to 40GHz. “American National standards Institute(ANSI), 1992

(2) C.I.S.P.R “Limits and Methods of Measurement of Radio Interface Characteristics of Information

Technology Equipment.” International Special committee on Radio Interference.

(3) EN 55022 “Limits and Methods of Measurement of Radio Interface Characteristics of Information

Technology Equipment.” European Committee for Electrotechnical Standardization. (CENELEC), 1998

Manufactured

XX/XX

MADE IN

XXXXX

QTY :

7

8. Packing

8-1 DEFINITION OF LABEL:

A. Panel Label:

*xxxxxxxxxxxx-xxxx*

P550HVN02.0 Product Specification

Rev.4.0

Panel Unique ID

XXXXX Model NO: P550HVN02.0 XXXXXXX

Week

Year

AUO Internal Use

Green mark description

(1) For Pb Free Product, AUO will add for identification.

AU Optronics

Factory Location AUO Internal Use

(2) For RoHs compatible products, AUO will add RoHS for identification.

Note: The green Mark will be present only when the green documents have been ready by AUO internal green

team. (definition of green design follows the AUO green design checklist.)

B. Carton Label:

P550HVN02.0

97.55P02.000

8-2 PACKING METHODS:

Protect Film

P550HVN02.0 Product Specification

Creped Paper Tape

Rev.4.0

Anti-Static Bag (Blue)

( 7 ) Pcs Modules

"H" Tape

( 7 ) Pcs / 1 Carton

8-3 Pallet and Shipment Information

Pallet after packing

P550HVN02.0 Product Specification

Rev.4.0

Item

Qty. Dimension Total Weight (kg)

Packing BOX 7pcs/box 1305(L)*383(W)*800(H) 134.5kg

Pallet 1 1315(L)*1150(W)*138(H)

Boxes per Pallet 3 boxes/pallet

Panels per Pallet 21pcs/pallet

36 1315(L)*1150(W)*938(H)

(40’ container)

Specification

20kg

423.5kg

Corner angle

Moisture-proof film

Packing Remark

Box = 4.11kg

Cushion = 2.05kg

(Includes bottom

cardboard)

Stretch film

Label

PET band

Corner angle

Pallet

9. PRECAUTIONS

Please pay attention to the followings when you use this TFT LCD module.

9-1 MOUNTING PRECAUTIONS

(1) You must mount a module using holes arranged in four corners or four sides.

(2) You should consider the mounting structure so that uneven force (ex. twisted stress) is not applied

to module. And the case on which a module is mounted should have sufficient strength so that

external force is not transmitted directly to the module.

(3) Please attach the surface transparent protective plate to the surface in order to protect the polarizer.

Transparent protective plate should have sufficient strength in order to the resist external force.

(4) You should adopt radiation structure to satisfy the temperature specification.

(5) Acetic acid type and chlorine type materials for the cover case are not desirable because the former

P550HVN02.0 Product Specification

Rev.4.0

generates corrosive gas of attacking the polarizer at high temperature and the latter cause circuit

broken by electro-chemical reaction.

(6) Do not touch, push or rub the exposed polarizer with glass, tweezers or anything harder than HB

pencil lead. And please do not rub with dust clothes with chemical treatment. Do not touch the

surface of polarizer for bare hand or greasy cloth. (Some cosmetics are detrimental to the polarizer.)

(7) When the surface becomes dusty, please wipe gently with absorbent cotton or other soft materials

like chamois soaks with petroleum benzene. Normal-hexane is recommended for cleaning the

adhesives used to attach front/ rear polarizer. Do not use acetone, toluene and alcohol because

they cause chemical damage to the polarizer.

(8) Wipe off saliva or water drops as soon as possible. Their long time contact with polarizer causes

deformations and color fading.

(9) Do not open the case because inside circuits do not have sufficient strength.

9-2 OPERATING PRECAUTIONS

(1) The spike noise causes the mis-operation of circuits. It should be lower than following voltage:

V=±200mV(Over and under shoot voltage)

(2) Response time depends on the temperature. (In lower temperature, it becomes longer..)

(3) Brightness of LED depends on the temperature. (In lower temperature, it becomes lower.) And in

lower temperature, response time (required time that brightness is stable after turned on) becomes

longer.

(4) Be careful for condensation at sudden temperature change. Condensation makes damage to

polarizer or electrical contacted parts. And after fading condensation, smear or spot will occur.

(5) When fixed patterns are displayed for a long time, remnant image is likely to occur.

(6) Module has high frequency circuits. Sufficient suppression to the electromagnetic interference shall

be done by system manufacturers. Grounding and shielding methods may be important to minimize

the interface.

9-3 ELECTROSTATIC DISCHARGE CONTROL

Since a module is composed of electronic circuits, it is not strong to electrostatic discharge. Make certain

that treatment persons are connected to ground through wristband etc. And don’t touch interface pin

directly.

9-4 PRECAUTIONS FOR STRONG LIGHT EXPOSURE

Strong light exposure causes degradation of polarizer and color filter.

9-5 STORAGE

When storing modules as spares for a long time, the following precautions are necessary.

(1) Store them in a dark place. Do not expose the module to sunlight or fluorescent light. Keep the

P550HVN02.0 Product Specification

Rev.4.0

temperature between 5 and 35 at normal humidity.

(2) The polarizer surface should not come in contact with any other object. It is recommended that they

be stored in the container in which they were shipped.

℃ ℃

9-6 HANDLING PRECAUTIONS FOR PROTECTION FILM

(1) The protection film is attached to the bezel with a small masking tape. When the protection film is

peeled off, static electricity is generated between the film and polarizer. This should be peeled off

slowly and carefully by people who are electrically grounded and with well ion-blown equipment or

in such a condition, etc.

(2) When the module with protection film attached is stored for a long time, sometimes there remains a

very small amount of glue still on the bezel after the protection film is peeled off.

(3) You can remove the glue easily. When the glue remains on the bezel or its vestige is recognized,

please wipe them off with absorbent cotton waste or other soft material like chamois soaked with

normal-hexane.

9-7 Operating Condition in PID Application

(1) If the continuous static display is required, periodically inserting a motion picture is strongly

recommended.

(2) Recommend to periodically change the background color and background image.

(3) Recommend not to continuously operate over 20 hours a day.

(4) Recommend to adopt one of the following actions after long time display.

I. Running the screen saver (motion picture or black pattern)

II. Power off the system for a while

(5) Try not to run the LCD in a closed environment. Suitable venting on the system cover would be

helpful for cooling.

(6) It is better to adapt active cooling with fans for long time displaying, especially for high luminance

LCD model.