Display ModeNormally White
White Luminance (ICCFL=6.0mA)
Note: ICCFL is lamp current
[cd/m2]220 typ. (5 points average)
190 min. (5 points average)
1
Luminance Uniformity1.2 max. (5 points)
Contrast Ratio350 typ
Optical Rise Time/Fall Time[msec]15/10 typ.
Nominal Input Voltage VDD[Volt]+3.3 typ.
Power Consumption[Watt]5.5 typ.(without inverter)
Weight[Grams]390 typ.
Physical Size[mm]
320.5(W) x 206 (H) x 5.5(D) Max.
Electrical Interface2 channel LVDS
Surface TreatmentHaze 25, hard coating 3H,AG
Support Color262K colors ( RGB 6-bit )
Temperature Range
Operating
Stora
Non-Operatin
[oC]
o
C
0 to +50
-20 to +60
RoHS ComplianceRoHS Compliance
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B141PW01 V1
2.2 Optical Characteristics
The optical characteristics are measured under stable conditions at 25 (Room Temperature):
ItemUnitConditionsMin.Typ.Max.Note
White Luminance
I
CCFL=6.0mA
Viewing Angle
[degree]
[degree]
[degree]
[degree]
Luminance Uniformity5 Points
Luminance Uniformity13 Points
CR: Contrast Ratio
Cross talk%
Response Time
Color / Chromaticity
Coordinates
(CIE 1931)
2
[cd/m
]5 points average190220-1, 4, 5.
Horizontal(Right)
CR = 10(Left)
Vertical(Upper)
CR = 10(Lower)
[msec]Rising
[msec]Falling
[msec]Rising + Falling
Red x
Red y
Green x
Green y
Blue x
Blue y
White x
White y
-
-
-
-
45
45
20
35
350400-6
-
15
-1015
2535
0.550 0.5800.610
0.310 0.3400.370
0.280 0.3100.340
0.520 0.5500.580
0.125 0.1550.185
0.115 0.1450.175
0.283 0.3130.343
0.299 0.3290.359
-
-
-
-
1.21
1.82
1.47
20
2,8
8
8
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B141PW01 V1
Note 1: 5 points position (Display area : 303.48mm x 189.675mm)
W/4W/4W/4W/4
H/4
12
H/4
W
H
Note 2: 13 points position
H
H/4
H/4
H/4
H/4
H/4
10
10
W/4
1
6
3
45
W
W/4
W/4
2
4
7
W/4
10
3
5
8
10
1312
H/4
10
9
11
Note 3: The luminance uniformity of5 and 13 points is defined by dividing the maximum luminance values by the
minimum test point luminance
Maximum Brightness of fivepoints
=
W5
Minimum Brightness of fivepoints
Maximum Brightness of thirteen points
W13
=
Minimum Brightness of thirteen points
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Note 4: Measurement method
The LCD module should be stabilized at given temperature for 30 minutes to avoid abrupt temperature change
during measuring. In order to stabilize the luminance, the measurement should be executed after lighting Backlight
for 30 minutes in a stable, windless and dark room.
Photo detector
Field=2
Note 5 Definition of Average Luminance of White (Y
Measure the luminance of gray level 63 at 5 pointsY
L (x) is corresponding to the luminance of the point X at Figure in Note (1).
Note 6 Definition of contrast ratio:
Contrast ratio is calculated with the following formula.
htness on the “White” state
Bri
):
L
= [L (1)+ L (2)+ L (3)+ L (4)+ L (5)] / 5
L
Contrast ratio (CR)=
Bri
htness on the “Black” state
-
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Note 7 Definition of Cross Talk (CT)
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AU OPTRONICS CORPORATION
B141PW01 V1
CT = | Y
Where
Y
A = Luminance of measured location without gray level 0 pattern (cd/m2)
Y
B = Luminance of measured location with gray level 0 pattern (cd/m2)
Note 8: Definition of response time:
The output signals of BM-7 or equivalent are measured when the input signals are changed from “Black” to
B – YA | / YA 100 (%)
“White” (falling time) and from “White” to “Black” (rising time), respectively. The response time interval between the
10% and 90% of amplitudes. Refer to figure as below.
ptical
Response
100%
90%
10%
0%
Tr
"Black"
T
"White""White"
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Note 8. Definition of viewing angle
Viewing angle is the measurement of contrast ratio 10, at the screen center, over a 180° horizontal and 180°
vertical range (off-normal viewing angles). The 180° viewing angle range is broken down as follows; 90° ()
horizontal left and right and 90° () vertical, high (up) and low (down). The measurement direction is typically
perpendicular to the display surface with the screen rotated about its center to develop the desired measurement
viewing angle.
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)
)
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B141PW01 V1
3. Functional Block Diagram
The following diagram shows the functional block of the 14.1 inches wide Color TFT/LCD Module:
X-Driver
(4 pairs LVDS)
RxIN0
RxIN1
RxIN2
RxCLKIN
VDD
GND
LCD DRIVE
BOARD
LCD
Controller
LCD Connector(30pin
JAE FI-XB30SL-HF10
Mating Housing JAE FI-X30SL
Mating ContactFI-XC3-1-15000
DC-DC
Converter
Ref c ircuit
Y-Driver
TFT ARRAY/CELL
1440(R/G/B) x 3 x 900
Backlight Unit
Connector(2pin
Lam
JST BHSR-02VS-1
Mating Type SM02B-BHSS-1-TB
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4. Absolute Maximum Ratings
Absolute maximum ratings of the module is as following:
4.1 Absolute Ratings of TFT LCD Module
ItemSymbolMinMaxUnitConditions
Logic/LCD Drive
4.2 Absolute Ratings of Backlight Unit
ItemSymbolMinMaxUnitConditions
CCFL CurrentICCFL2.57[mA] rmsNote 1,2
4.3 Absolute Ratings of Environment
ItemSymbolMinMaxUnitConditions
Operating TemperatureTOP0+50 [oC]Note 3
Vin-0.3+4.0[Volt]Note 1,2
Operation HumidityHOP595[%RH]Note 3
Storage TemperatureTST-20+60 [oC]Note 3
Storage HumidityHST
Note 1: At Ta (25 )
Note 2: Permanent damage to the device may occur if exceed maximum values
Note 3: For quality performance, please refer to AUO IIS(Incoming Inspection Standard).
595
Twb=39° C
[%RH]
Note 3
Operating RangeStorage Range
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5. Electrical characteristics
5.1 TFT LCD Module
5.1.1 Power Specification
Input power specifications are as follows;
SymbleParameterMinTypMaxUnitsNote
VDDLogic/LCD Drive
PDDVDD Power1.6[Watt]Note 1
IDDIDD Current
IRushInrush Current TBD[mA]
VDDrpAllowable
Logic/LCD Drive
Ripple Voltage
3.03.33.6[Volt]
TBD
TBD
[mA]
100[mV]
p-p
Note 1
Note 2
Note 1 : Maximum Measurement ConditionBlack Patterm
Note 2Measure Condition
Q3
AO6402
D6F1
D5
D2S
D1
G
D2SD1D5
D6
Q3
G
C3
0.01uF/25V
AO6402
SW1
SW MAG-SPST
12
(High to Low)
Control
Signal
+12.0V
C2
1uF/25V
+3.3V
R1
47K
R2
1K
R2
1K
VR1
47K
90%
(LCD Module Input)
C1
1uF/16V
3.3V
VCC
10%
0V
0.5ms
Vin rising time
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5.1.2 Signal Electrical Characteristics
Input signals shall be low or High-impedance state when VDD is off.
It is recommended to refer the specifications of SN75LVDS86DGG (Texas Instruments)in
detail.
Signal electrical characteristics are as follows;
ParameterConditionMinMaxUnit
Differential Input High
Vth
Threshold (Vcm=+1.2V)100[mV]
Differential Input Low
Vtl
Vcm
Note: LVDS Differential Voltage
Threshold (Vcm=+1.2V)-100[mV]
Differential Input
Common Mode Voltage
1.125
1.375
[V]
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5.2 Backlight Unit
Parameter guideline for CCFL Inverter
ParameterMin TypMax UnitsCondition
White Luminance
5 points average 190220-[cd/m2]
CCFL current(ICCFL)2.5 6.07[mA] rms
CCFL Frequency(FCCFL)506065[KHz]
=
(Ta=25)
Note 2
(Ta=25)
Note 3,4
CCFL Ignition Voltage(Vs)
CCFL Voltage (Reference)
-10001200
-650-
(VCCFL)
CCFL Power consumption
-4.2-
(PCCFL)
Note 1: Typ are AUO recommended Design Points.
*1 All of characteristics listed are measured under the condition using the AUO Test inverter.
*2 In case of using an inverter other than listed, it is recommended to check the inverter carefully.
Sometimes, interfering noise stripes appear on the screen, and substandard luminance or flicker at low power
may happen.
*3 In designing an inverter, it is suggested to check safety circuit very carefully. Impedance of CCFL, for
instance, becomes more than 1 [M ohm] when CFL is damaged.
*4 Generally, CCFL has some amount of delay time after applying kick-off voltage. It is recommended to keep
on applying kick-off voltage for 1 [Sec] until discharge.
*5 CCFL discharge frequency must be carefully chosen so as not to produce interfering noise stripes on the
screen.
[Volt] rms
[Volt] rms
[Watt]
(Ta= 0)
Note 5
(Ta=25)
Note 6
(Ta=25)
Note 6
*6 Reducing CCFL current increases CCFL discharge voltage and generally increases CCFL discharge
frequency. So all the parameters of an inverter should be carefully designed so as not to produce too much
leakage current from high-voltage output of the inverter.
Note 2: It should be employed the inverter which has “Duty Dimming”, if ICCFL is less than 4mA.
Note 3: CCFL discharge frequency should be carefully determined to avoid interference between inverter and TFT
LCD.
Note 4: The frequency range will not affect to lamp life and reliability characteristics.
Note 5: CCFL inverter should be able to give out a power that has a generating capacity of over 1,430 voltage.
Lamp units need 1,400 voltage minimum for ignition.
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Note 6: Calculator value for reference (ICCFL×VCCFL=PCCFL)
Note 7: Requirements for a system inverter design, which is intended to have a better display performance, a
better power efficiency and a more reliable lamp, are following.
It shall help increase the lamp lifetime and reduce leakage current.
a. The asymmetry rate of the inverter waveform should be less than 10%.
b. The distortion rate of the waveform should bewithin 2 10%.
* Inverter output waveform had better be more similar to ideal sine wave.
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6. Signal Characteristic
6.1 Pixel Format Image
Following figure shows the relationship of the input signals and LCD pixel format.
0114381439
1st Line
900th Line
R G B R G B
R G B R G B
R G B R G B
R G B R G B
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6.2 The input data format
Signal NameDescription
R5
R4
R3
R2
R1
R0
Red Data 5 (MSB)
Red Data 4
Red Data 3
Red Data 2
Red Data 1
Red Data 0 (LSB)
Red-pixel Data
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B141PW01 V1
Red-pixel Data
Each red pixel's brightness data consists of
these 6 bits pixel data.
G5
G4
G3
G2
G1
G0
Green Data 5 (MSB)
Green Data 4
Green Data 3
Green Data 2
Green Data 1
Green Data 0 (LSB)
Green-pixel Data
Each green pixel's brightness data consists
of these 6 bits pixel data.
Green-pixel Data
B5
B4
B3
B2
B1
B0
Blue Data 5 (MSB)
Blue Data 4
Blue Data 3
Blue Data 2
Blue Data 1
Blue Data 0 (LSB)
Blue-pixel Data
Each blue pixel's brightness data consists of
these 6 bits pixel data.
Blue-pixel Data
RxCLKINData ClockThe typical frequency is68.9 MHZ.. The
signal is used to strobe the pixel data and
DE signals. All pixel data shall be valid at
the falling edge when the DE signal is high.
DEDisplay TimingThis signal is strobed at the falling edge of
RxCLKIN. When the signal is high, the pixel
data shall be valid to be displayed.
VSVertical SyncThe signal is synchronized to RxCLKIN .
HSHorizontal SyncThe signal is synchronized to RxCLKIN .
Note: Output signals from any system shall be low or High-impedance state when VDD is off.
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6.3 Signal Description/Pin Assignment
LVDS is a differential signal technology for LCD interface and high speed data transfer device.
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Note1: Start from right side
Connector
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B141PW01 V1
30
NC
1
GND
Note2: Input signals shall be low or High-impedance state when VDD is off.
internal circuit of LVDS inputs are as following.
The module uses a 100ohm resistor between positive and negative data lines of each receiver input
Signal Input
Pin No.
8
9
11
12
RxIN0-
R
RxIN0+
RxIN1-
R
RxIN1+
LVDS Receiver
14
RxIN2-
R
15
RxIN2+
17
RxCLKIN-
R
18
RxCLKIN+
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6.4 Interface Timing
6.4.1 Timing Characteristics
Basically, interface timings should match the 1440x900 /60Hzmanufacturing guide line timing.
ParameterSymbolMin.Typ.Max.Unit
Frame Rate-5060-Hz
Clock frequency1/ T
Vertical
Section
Horizontal
Section
Note : DE mode only
6.4.2 Timing diagram
T
CLOCK
DOTCLK
Input
Data
Pixel
M-1
Invaild
Period T
Active T
Blanking T
Period T
Active T
Blanking T
Input Timing Definition
Data
Clock
V
VD
VB
H
HD
HB
Pixel1Pixel3Pixel
-48.2-MHz
9049122048
900900900
412-
7608801024
720-720720
40160-
5
T
Line
T
Clock
?
Pixel
M-1
Invaild
Data
Input
DE
DE
Input
Data
document version 0.321/34
Data
Pixel
M
Line
N
Invaild
Data
T
HB
T
Invaild
Data
VB
Pixel2Pixel4Pixel
T
H
T
V
Line
Line2Line
1
6
T
HD
T
VD
?
?
3
Pixel
M
Line
N
Invai ld
Data
Invaild
Data
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6.5 Power ON/OFF Sequence
VDD power and lamp on/off sequence is as follows. Interface signals are also shown in the chart.
Signals from any system shall be Hi-Z state or low level when VDD is off.
T1
90%
90%
Power Supply VDD
Backlight On
Power Sequence Timing
10%
Parameter
T2
VALID
T5
Min.Typ.Max.
DATA
Value
T6
T3
Units
T7
10%
T4
T10.5-10(ms)
T20-50(ms)
T30-50(ms)
T4200--(ms)
T5200--(ms)
T60--(ms)
T70-10(ms)
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7. Connector Description
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following
components.
7.1 TFT LCD Module
Connector Name / DesignationFor Signal Connector
ManufacturerJAE or compatible
Type / Part NumberFI-XB30SL-HF10 or compatible
Mating Housing/Part NumberFI-X30H or compatible
7.2 Backlight Unit
Physical interface is described as for the connector on module.
These connectors are capable of accommodating the following signals and will be following
components.
Connector Name / DesignationFor Lamp Connector
ManufacturerJST
Type / Part NumberBHSR-02VS-1
Mating Type / Part NumberSM02B-BHSS-1-TB
7.3 Signal for Lamp connector
Pin #Cable colorSignal Name
1RedLamp High Voltage
2
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8. Vibration and Shock Test
8.1 Vibration Test
Test Spec:
Test method:Non-Operation
Acceleration:2.16G
Frequency:10 - 500Hz Random
Sweep:30 Minutes each Axis (X, Y, Z)
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8.2 Shock Test Spec:
Test Spec:
Test method:Non-Operation
Acceleration:240 G , Half sine wave
Active time:2 ms
Pulse:X,Y,Z .one time for each side
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9. Reliability
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B141PW01 V1
Items
Temperature
Humidity Bias
High Temperature
Operation
Low Temperature
Operation
On/Off Test
Hot Storage
Cold Storage
Thermal Shock Test
Hot Start Test
Cold Start Test
Shock Test
(Non-Operating)
Vibration Test
(Non-Operating)
Required ConditionNote
40/90%,300Hr
60/Dry,300Hr
0,300Hr
25, ON/30 sec. OFF/30sec., 10,000 cycles)
60/35% RH ,250 hours
-20/50% RH ,250 hours
-20/30 min ,60/30 min 100cycles
50/1 Hr min.power on/off per 5 minutes, 5 times
0/1 Hr min.power on/off per 5 minutes, 5 times
240G, 2ms, Half-sine wave
Random vibration, 2.16 G zero-to-peak, 10 to 500 Hz, 30
mins in each of three mutually perpendicular axes.
ESD
Contact :8KV/ operation
Note 1
Air :15KV / operation
Room temperature
Test
Note1: According to EN61000-4-2 , ESD class B: Some performance degradation allowed. No data lost
. Self-recoverable. No hardware failures.
Note2: CCFL Life time: 10,000 hours minimum under normal module usage.
Note3: MTBF (Excluding the CCFL): 30,000 hours with a confidence level 90%
25, 2000hours, Operating with loop pattern
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10. Mechanical Characteristics
10.1 LCM Outline Dimension
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10.2 Screw Hole Depth and Center Position
Screw hole minimum depth, from side surface =2.5 mm (See drawing)
Screw hole center location, from front surface = 3.1 ± 0.2mm (See drawing)
Screw Torque: Maximum 2.5 kgf-cm
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11. Shipping and Package
11.1 Shipping Label Format
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Product Specification
AU OPTRONICS CORPORATION
B141PW01 V1
Note 1:
IC CombinationControl CodeH/W
First Source
Second Source
OAXXXOA
1AXXX1A
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11.2. Carton package
The outside dimension of carton is 455 (L)mm x 388 (W)mm x 355 (H)mm
11.3 Shipping package of palletizing sequence
Top cardboard
Bottom cardboard
12.Appendix: EDID description
Wooden pallet
Note : Limit of box palletizing = Max 3 layers(ship and stock conditions)
Corner angle
PE band
Stretch film
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