ATMEL AVR1509 User Manual
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AVR1509: Xplain training - Low Power
Prerequisites
• Required knowledge
Atmel® XMEGA™ Basics training
Atmel XMEGA Clock System
Atmel XMEGA DMAC (Optional, may be needed for understanding task 4)
Atmel XMEGA ADC (Optional, may be needed for understanding task 4)
• Software prerequisites
Atmel AVR
WinAVR/GCC 20100110 or later
• Hardware prerequisites
XPLAIN evaluation board
JTAGICE mkII
• Estimated completion time
2 hours
1 Introduction
Atmel XMEGA provides various sleep modes and software controlled clock gating
in order to tailor power consumption to the application's requirement. Sleep modes
enables the microcontroller to shut down unused modules to save power. When
the device enters sleep mode, program execution is stopped and interrupts or reset
is used to wake the device again. The individual clock to unused peripherals can
be stopped during normal operation or in sleep, enabling a much more fine tuned
power management than sleep modes alone.
®
Studio® 4.18 or later
8-bit
Microcontrollers
Application Note
Refer to application note AVR1010 and XMEGA Datasheet for more in-depth
information.
Rev. 8318A-AVR-06/10
2 Introduction to the XMEGA power reduction and sleep system
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To reach the lowest possible power figures there are a couple of points to pay
attention to. It is not only the sleep mode that defines the power consumption, but
also the state of the IO pins, number of enabled peripheral modules and so on.
In the following chapters we will look in more detail into the different methods to
reduce power, and try out a few trivial examples.
2.1 General considerations
Regardless of operating mode, two factors especially influence power consumption,
namely CPU and Peripheral clock frequencies and operating voltage.
The power consumption is proportional to operating voltage, and to conserve power
one should consider using as low system voltage as all possible.
Additionally, consumption is also directly proportional to clock frequency, and if sleep
modes are not utilized, the device should be running as low frequency as possible.
2.2 Sleep modes
Sleep modes are used to shut down modules and clock domains in the microcontroller in order to tailor power consumption to the applications requirements.
During sleep, various modules are shut down according to which sleep modes are
entered.
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Active clock domain Oscillators Wake-up sources
Sleep modes
Idle x x x x x x x x
Power-down x x
Power-save x x x x x
Standby x x x
Extended standby x x x x x x
AVR1509
Cpu clock
Peripheral clock
RTC clock
System clock source
RTC clock source
Asynchronous Port Interrupt
TWI Address match interrupts
Real time clock interrupts
All interrupts
Idle Mode
In Idle mode the CPU and Non-Volatile Memory are stopped, (note that any active
programming will be completed) but all peripherals including the Interrupt Controller,
Event System and DMA Controller are kept running. Any interrupt request will wake
the device.
8318A-AVR-06/10
Power-down Mode
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In Power-down mode all system clock sources, including the Real Time Counter
(RTC) clock source, are stopped. This allows operation of asynchronous modules
only. The only interrupts that can wake up the MCU are the Two Wire Interface
address match interrupts, and asynchronous port interrupts.
Power-save Mode
Power-save mode is identical to Power-down, with one exception: If the RTC is
enabled, it will keep running during sleep and the device can also wake up from either
RTC Overflow or Compare Match interrupt.
Standby Mode
Standby mode is identical to Power-down with the exception that the enabled system
clock sources are kept running, while the CPU, Peripheral and RTC clocks are
stopped. This reduces the wake-up time.
Extended Standby Mode
Extended Standby mode is identical to Power-save mode with the exception that the
enabled system clock sources are kept running while the CPU and Peripheral clocks
are stopped. This reduces the wake-up time.
2.3 Power reduction registers
AVR1509
The Power Reduction (PR) registers provides a method to stop the clock to individual
peripherals. When this is done, the current state of the peripheral is frozen and the
associated I/O registers cannot be read or written. Resources used by the peripheral
will remain occupied; hence the peripheral should in most cases be disabled before
stopping the clock. Enabling the clock to a peripheral again puts the peripheral in the
same state as before it was stopped.
This can be used in Idle mode and Active mode to reduce the overall power
consumption significantly.
In all other sleep modes, the peripheral clock is already stoppe d.
Overview of power reduction registers.
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Page
+0x00 PRGEN - - - AES EBI RTC EVSYS DMA 98
+0x01 PRPA - - - - - DAC ADC AC 99
+0x02 PRPB - - - - - DAC ADC AC 99
+0x03 PRPC - TWI USART1 USART0 SPI HIRES TC1 TC0 99
+0x04 PRPD - TWI USART1 USART0 SPI HIRES TC1 TC0 99
+0x05 PRPE - TWI USART1 USART0 SPI HIRES TC1 TC0 99
+0x06 PRPF - TWI USART1 USART0 SPI HIRES TC1 TC0 99
+0x07 Reserved - - - - - - - -
8318A-AVR-06/10
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2.4 Other power-saving tips
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2.4.1 Digital I/O pin
All digital I/O pins are by default floating not to cause any hardware conflicts.
However, because the pins have digital buffers it is important to ensure that the
voltage level on the I/O pins are digitally well defined, as not to cause sporadic
internal switching and leakage. Hence, pull-up should be enabled on all unused pins.
This is mainly observable in sleep modes.
2.4.2 Watchdog Timer
Because the Wat
enabled, contribute to the power consumption in sleep modes.
2.4.3 Brown-Out Detection
c
hdog is basically a timer with a separate clock source it will, if
2.4.4 JTAG interface
2.5 Relevant applications
The purpo
operating at too low voltage.
However, during sleep, the device is “not operating”, or rather, it is not executing
code. For this reason the Atmel XMEGA BOD can be disabled, though enabled
during active mode. The BODACT can also be programmed so the BOD is enabled
automatically in active mode.
The BOD should still be enabled during automatic memory transfers with the DMA
Controller in Idle mode, to avoid data corruption.
The
during operation of the end-product. The JTAG interface is clocked and active during
sleep if enabled.
Note that the JTAG interface can be disabled from software, and still easily be
reprogrammed since the JTAG interface is re-enabled during RESET.
With Atmel XMEGA it is possible to do many common tasks even with the main clock
turned off, in IDLE mode, thanks to the new Event system and DMA controller. By
using the Event system or DMA transfers the firmware will need to wake up the CPU
less frequently.
se of the Brown-Out Detector (BOD) is to ensure that the device is not
JTAG in
terface is used for programming and debugging, but has no function
Power-Save mode is also interesting, as the RTC clock is still powered and can wake
up the CPU on overflow or compare match.
2.6 Measuring current consumption of only XMEGA chip on Xplain
There is a shunt resistor (no. R105), depending on board revision, separating the
XMEGA power-domain from the regulated 3.3 voltage from the USB. To this resistor
there are two test pads connected; IXM+ and IXM-. In this training we will do the
following:
• Solder off the resistor, and solder on a wire to each of the pads.
• Connect the wires through an ampere meter, black lead to wire on IXM-.
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AVR1509
8318A-AVR-06/10
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