Atmel AVR1010 User guide

AVR1010: Minimizing the power consumption of

Atmel AVR XMEGA devices

Features

• Sleep modes

• Clock prescaling and source switching

• Power Reduction Registers

• RTC clock source

• State of digital I/O

• Watchdog

• Brown Out Detector

• JTAG interface

1 Introduction

The Atmel® AVR® XMEGA® devices are capable of achieving extremely low power
consumption, which is required by both portable electronics and other battery­powered applications.

8-bit
Microcontrollers

Application Note
Preliminary

To reach the lowest possible power figures there are a few points to pay attention
to – it is not only the sleep mode that defines the power consumption, but also the
state of the I/O pins, the number of enabled peripheral modules and so on.

This application note describes what must be done to achieve the lowest possible
power consumption for XMEGA devices. Example code is also supplied, which
compiles with both GCC and IAR Embedded Workbench

Figure 1-1. The XMEGA devices can achieve powers that are barely measurable.

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2 Reducing the power consumption to a minimum

Though many factors affect the power consumption, some will naturally affect more
than others. Listed below are the most important factors, with recommendations and
considerations.

2.1 Operating voltage

The power consumption is proportional to the square of the device’s supply voltage,
which should therefore be kept as low as possible.

A reduction in supply voltage can lower the limit for the maximum system clock
frequency, thus increasing the time required in ACTIVE mode to execute a given
amount of code.

Minimize power consumption by using as low supply voltage as possible.

2.2 Active mode operation

In ACTIVE mode, i.e. when sleep modes are not used, the power consumption is
proportional to the system clock frequency. This means that if sleep modes are not
used, the device should be run at the lowest possible system clock frequency to
minimize the power consumption.

2.3 Sleep modes

Minimize power consumption by keeping the clock frequency as low as possible if
sleep modes are not used.

In most applications it is desirable to minimize the power consumption, but not to
reduce the system clock frequency – mainly to ensure fast processing and quick
response of the system/product. In such applications one can use the “sleep modes”
of the Atmel
nothing to process. The main principle is then to run as fast as possible, and sleep as
much as possible. Running as fast as possible reduces the effect of static power
consumption (i.e. independent of clock frequency), e.g. due to non-volatile memory
being enabled in ACTIVE mode.

The power consumption and operation of peripherals in sleep depends on which
sleep mode is used. Table 2-1 shows the characteristics of the different sleep modes
available for XMEGA devices. An application may switch between sleep modes
during operation, depending on which mode is the most suitable at the time.

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AVR® XMEGA® to put the device in a low power state when there is

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Table 2-1: Available sleep modes for XMEGA.

The three most commonly used modes are IDLE, POWER-SAVE and
POWER-DOWN:

• In IDLE, most peripherals are still operating – only the Atmel
non-volatile memories (Flash and EEPROM) are stopped. The DMA controller and
Event system are still active in this mode, allowing for e.g. AD conversions and
transfers via the USART to continue, even though the CPU is not operating. The
device can be woken up by all interrupts.

• In POWER-SAVE, the low frequency Real Time Clock (RTC) timer is still running
while the CPU and most other peripherals are stopped. The RTC is commonly
used to wake the device up at timed intervals. Because the system clock source is
stopped in this sleep mode, wake-up takes a bit longer than for IDLE since the
system clock must stabilize before operation.

• POWER-DOWN is the deepest sleep mode. In this mode most of the device
peripherals are stopped. The device is unable to wake itself up from this mode
since both the peripheral clock and RTC are disabled. This mode therefore relies
on external input, e.g. asynchronous pin interrupts or TWI, to wake the device up.
There are exceptions to this rule: XMEGAs with the battery backup module and
32-bit RTC. The RTC in these devices will run regardless of the sleep-mode.

The XMEGA family also supports two additional sleep-modes which are useful when
a short wake-up time is needed:

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• STANDBY, which is POWER-DOWN with system clock source still running.

• EXTENDED STANDBY, which is POWER-SAVE with system clock source still

running.

These two sleep-modes do not give as low power consumption as POWER-DOWN
and POWER-SAVE respectively, but are useful if fast response is vital to the
application.

Note that asynchronous port interrupts and TWI address matches can wake the
device up from all sleep modes. Refer to the device manual for further information
about these sleep modes and operation of them.

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2.4 Clock Prescaling

Minimize power consumption by using the deepest allowable sleep modes at any
time, and running as fast as possible to minimize time spent in ACTIVE mode.

Although it is recommended to run the CPU as fast as possible to minimize the time
spent in ACTIVE mode, there are situations where it is better to reduce the clock rate.
These situations commonly involve waiting in ACTIVE or IDLE mode for something
that takes a fixed amount of time, e.g. serial communication. In these cases, one
should avoid generating higher CPU and peripheral clock frequencies than are
needed for the active peripherals. This may be achieved by using clock prescaling,
which can be changed without causing glitches in the clock signal.

If prescaling is done internally in several peripherals, power can be conserved by
prescaling with the largest common factor as early as possible in the clock distribution
chain. This principle is illustrated in Figure 2-1.

Figure 2-1: Peripherals without and with common prescaling by largest factor.

Note that since the prescaling also affects the CPU clock, it might not always be
desirable to perform this common prescaling in ACTIVE mode because computations
will take longer.

Minimize power consumption by actively using prescaling, especially when waiting in
ACTIVE or IDLE mode.

2.5 Clock Source Switching

One should avoid generating higher system clock rates than are actually needed. In
the ideal case, prescaling is unnecessary. This can be achieved by switching
between clock sources.

System

clock

No

prescaling

Peripheral

clock

Peripheral w/
prescaling by

8

Peripheral w/
prescaling by

64

Peripheral w/
prescaling by

256

System

clock

Prescaling by

8

Peripheral

clock

Peripheral w/
no prescaling

Peripheral w/
prescaling by

8

Peripheral w/
prescaling by

32

4

As an example, it is preferable to generate a 16MHz system clock by use of the PLL
with the 2MHz RC oscillator as reference, rather than the 32MHz RC oscillator with
prescaling to 16MHz. External clock sources may also be a good choice, especially if
they are already available in the system and therefore come with no extra “cost”.

The wake-up delay for the device depends on which clock source is used for the
system clock. One way to reduce this delay is to switch between clock sources so
that the device goes to sleep and wakes up with a fast-responding clock source.

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