ATMEL ATV750, ATV750B User Manual

Using the ATV750 and ATV750B

Introduction

BDTIC www.bdtic.com/Semiconductor

This application note des cribes ho w to
use the features of the ATV750 and
ATV750B in the ABEL (and Atmel­ABEL) and CUPL (and Atmel-CUPL)
high level de scription lang uages. The
ATV750 and ATV750B are easy
upgrades from a 22V10. They offer twice
the logic densi ty and more fle xibility in
the same footprint. Both devices have 20
registers and individual clock and AR
product terms for each register. Each I/O
pin has a programmable polarity control
and an individual output enable product
term. Independent feedback paths fr om
each register allow all of the registers to

Table 1. Device Names

Device Type ABEL Device Name CUPL Device Name

ATV750 DIP P750 V750
ATV750 PLCC P750C V750LCC
ATV750B DIP P750B V750B
ATV750B PLCC P750BC V750BLCC

be buried without wasting the I/O pins.
For the ATV750B the registers can also
be configured as D- or T-type and the
clock can be selected as either a syn­chronous clock pin or a clock product
term. The ATV750 and ATV750B macro­cell is shown in Figure 1.

Device Names and Pin and
Node Assignments

The device names for the ATV750 an d
ATV750B for each langu age are shown
in Table 1.

Erasable
Programmable
Logic Device

Application
Note

Table 2. Node Numbers

ABEL CUPL

Pin #

14(17) 26 (30) 25 (29) 35 (39)
15(18) 27 (31) 26 (30) 36 (40)
16(19) 28 (32) 27 (31) 37 (41)
17(20) 29 (33) 28 (32) 38 (42)
18(21) 30 (34) 29 (33) 39 (43)
19(23) 31 (35) 30 (34) 40 (44)
20(24) 32 (36) 31 (35) 41 (45)
21(25) 33 (37) 32 (36) 42 (46)
22(26) 34 (38) 33 (37) 43 (47)
23(27) 35 (39) 34 (38) 44 (48)

Note: Pin/node numbers: DIP (PLCC)

Q1 Q1 Q0

Rev. 0459C–09/99

1

Figure 1. The ATV750 and ATV750B Macroce l l

Buried registers (Q1 in each mac rocell) are identified by
node numbers. Table 2 shows the node numbers for the
Q1 registers in the ATV750 and ATV750B. Registers which
are associated with the I/O pin (Q0 in each macrocell) are
identified by the pin numbers. The use of the Q0 node num­bers in CUPL is described in the Macrocell Configurations
section.

The following ex amples s how the de vice type specif icatio n
and the pin and node assignments:

ABEL and Atmel-ABEL

device_id device ’P750B’; “device_id will be used

”for JEDEC filename

I1,I2,I3,I4,I5 pin 1,2,3,4,5;
O23,O22 pin 23,22 istype 'reg_d,buffer';
O21,O20 pin 21,20 istype 'com';
O23Q1,O20Q1 node 35,32 istype 'reg_d';

CUPL and Atmel-CUPL

device V750B;
pin [1,2,3,4,5] = [I1,I2,I3,I4,I5];
pin [20,21,22,23] = [O20,O21,O22,O23];
pinnode [34,44,31] = [O23Q1,O23Q0,O20Q1];

Pin and Node Feedbacks

Each macrocell has three feedback paths into the array,
one from each of the registers and one from the pin. For a
buried register, th e node name is u sed to refer to th e

feedback path. For a combinatoria l output, the feedb ack
comes from the pin, so th e pin name is used to refer to th e
feedback. For a registered output, the feedback can come
either from the register or from the pin. The feedback paths
are labeled (1), (2), and (3) on Figure 1. The following
examples show how the different feedback paths are
identified:

ABEL and Atmel-ABEL

O23.d = I1 # I2;
O23Q1.d = I1 & !I2;
O21 = O23 “(1)feedback from pin

# O23.fb “(2)feedback from Q0 register
# O23Q1; “(3)feedback from buried register

Note: 1. For ABEL, either “.q” or “.fb” can be used to indicate

the buried register feedback path. When “.q” exten­sion is used, the software will select the Q outp ut of
the register, regardless of the output buffer polarity.
When the “.fb” extension is used, the software will
match the polarity of the register feedback with the
output polarity by selecting either the Q or !Q output
of the register.

(1)

CUPL and Atmel-CUPL

O23.d = I1 # I2;
O23Q1.d = I1 & !I2;
O21 = O23.io /*(1)feedback from pin */

# O23 /*(2)feedback from Q0 register */
# O23Q1; /*(3)feedback from buried register */

2

CMOS PLD

Macrocell Configurations

CMOS PLD

The basic m acroc ell co nfig ura tions are sh own i n Fi gur es 2
through 7. Each macrocell can be configured as either a
registered or combinatorial output. In addition, each macro­cell has a buried register. The multiple feedback paths also
allow both registers to be bur ied, with th e I/O pin used as
an input pin.

The macrocells h ave a t otal of b etween 8 a nd 16 pr oduct
terms. If the buried register is used, the product terms are
automatically divided into two sum terms, each with half of
the product ter ms. If the bu ried register is not used, all o f
the product terms are available for the I/O function.

For ABEL, the Q1 register is identified by a node number.
The Q0 register is identif ied by the pin numb er. The OE
should be set to 0 to disable the outputs. The “pinname”
(with no extensions) refers to the input path. The “pin-
name.fb” refers to the register feedback path. Another

Figure 2. Combinatorial Output

name for either th e inpu t o r the register may be substi tute d
in the Declarations section of the file, to make it clearer that
they have separate functions . The pi n and no de nam es wil l
be substituted back into the equations when the file is
compiled.

For CUPL, there are node numbers for both the Q1 and Q0
registers. The Q0 node numbers sho uld onl y b e us ed if th e
Q0 register is buried and the pin is used as an inp ut. The
Q0 node name refers to the register and the pin name
refers to the pin.

For this configuration, the output should be defined as com­binatorial, and the equation written as combi natorial. A
clock equation should also be written for the output. The
registered signal which is fed back into the array is identi­fied with “.fb” or “.q” for ABEL or “.dfb” for CUPL.

ABEL and Atmel-ABEL

O21 = I1 # !I2 # I3 # !I4 # I5;

CUPL and Atmel-CUPL

O21 = I1 # !I2 # I3 # !I4 # I5;

Figure 3. Combinatorial Output plus Buried Register

ABEL and Atmel-ABEL

O20 = I3 & !I4;
O20Q1.d = I2 # I3 # I4;

CUPL and Atmel-CUPL

O20 = I3 & !I4;
O20Q1.d = I2 # I3 # I4;

3

Figure 4. Registered Output

Figure 5. Registered Output plus Buried Register

ABEL and Atmel-ABEL

O23.d = I1 # I2 # I3 # I4 # I5;

CUPL and Atmel-CUPL

O23.d = I1 # I2 # I3 # I4 # I5;

ABEL and Atmel-ABEL

O23.d = I1 & I2;
O23Q1.d = I3 & I4;

CUPL and Atmel-CUPL

O23.d = I1 & I2;
O23Q1.d = I3 & I4;

4

CMOS PLD