ATMEL AT93C66W-10SI-2.7, AT93C66W-10SC-1.8, AT93C66-10TI-2.7, AT93C66-10TC-2.7, AT93C66-10TC-2.5 Datasheet
...
Features
• Low-voltage and Standard-voltage Operation
– 5.0 (V
– 2.7 (V
– 2.5 (V
– 1.8 (V
• User-selectable Internal Organization
– 1K: 128 x 8 or 64 x 16
– 2K: 256 x 8 or 128 x 16
– 4K: 512 x 8 or 256 x 16
• 3-wire Serial Interface
• 2 MHz Clock Rate (5V)
• Self-timed Write Cycle (10 ms max)
• High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
• Automotive Grade and Extended Temperature Devices Available
• 8-lead PDIP, 8-lead JEDEC and EIAJ SOIC, and 8-lead TSSOP Packages
= 4.5V to 5.5V)
CC
= 2.7V to 5.5V)
CC
= 2.5V to 5.5V)
CC
= 1.8V to 5.5V)
CC
3-wire Serial
EEPROMs
1K (128 x 8 or 64 x 16)
2K (256 x 8 or 128 x 16)
Description
The AT93C46/56/66 provides 1024/2048/4096 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 64/128/256 words of 16 bits
each, when the ORG pin is connected to VCC and 128/256/512 words of 8 bits each
when it is tied to ground. The device is optimized for use in many industrial and commercial applications where low power and low voltage operations are essential. The
AT93C46/56/66 is available in space-saving 8-lead PDIP and 8-lead JEDEC and EIAJ
SOIC packages.
(continued)
Pin Configurations
CS
SK
DI
DO
1
2
3
4
8-lead TSSOP
1
2
3
4
8-lead PDIP
1
2
3
4
8-lead SOIC
VCC
8
DC
7
ORG
6
GND
5
VCC
8
DC
7
ORG
6
GND
5
8
VCC
7
DC
6
ORG
5
GND
Pin Name Function
CS Chip Select
SK Serial Data Clock
DI Serial Data Input
DO Serial Data Output
GND Ground
VCC Power Supply
ORG Internal Organization
DC Don’t Connect
8-lead SOIC
Rotated (R)
(1K JEDEC Only)
DC
VCC
CS
SK
1
2
3
4
ORG
8
GND
7
DO
6
DI
5
CS
SK
DI
DO
CS
SK
DI
DO
4K (512 x 8 or 256 x 16)
AT93C46
AT93C56
AT93C66
Rev. 0172O–08/01
1
The AT93C46/56/66 is enabled through the Chip Select pin (CS), and accessed via a
3-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift Clock
(SK). Upon receiving a READ instruction at DI, the address is decoded and the data is
clocked out serially on the data output pin DO. The WRITE cycle is completely selftimed and no separate ERASE cycle is required before WRITE. The WRITE cycle is
only enabled when the part is in the ERASE/WRITE ENABLE state. When CS is brought
“high” following the initiation of a WRITE cycle, the DO pin outputs the READY/BUSY
status of the part.
The AT93C46 is available in 4.5V to 5.5V, 2.7V to 5.5V, 2.5V to 5.5V, and 1.8V to 5.5V
versions. The AT93C56/66 is available in 4.5V to 5.5V, 2.7V to 5.5V, and 2.5V to 5.5V
versions.
Absolute Maximum Ratings*
Operating Temperature.................................. -55°C to +125°C
Storage Temperature..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground.....................................-1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
Block Diagram
Notes: 1. When the ORG pin is connected to VCC, the x 16 organization is selected. When it is connected to ground, the x 8 orga-
nization is selected. If the ORG pin is left unconnected and the application does not load the input beyond the capability of
the internal 1 Meg ohm pullup, then the x 16 organization is selected. The feature is not available on the 1.8V devices.
2. For the AT93C46, if x 16 organization is the mode of choice and Pin 6 (ORG) is left unconnected, Atmel recommends
using the AT93C46A device. For more details, see the AT93C46A datasheet.
2
AT93C46/56/66
0172O–08/01
AT93C46/56/66
Pin Capacitance
(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted).
Symbol Test Conditions Max Units Conditions
C
OUT
C
IN
Output Capacitance (DO) 5 pF V
OUT
= 0V
Input Capacitance (CS, SK, DI) 5 pF VIN = 0V
Note: 1. This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V,
= 0°C to +70°C, VCC = +1.8V to +5.5V (unless otherwise noted).
T
AC
Symbol Parameter Test Condition Min Typ Max Unit
V
CC1
V
CC2
V
CC3
V
CC4
I
CC
I
SB1
I
SB2
I
SB3
I
SB4
I
IL
I
OL
(1)
V
IL1
(1)
V
IH1
(1)
V
IL2
(1)
V
IH2
V
OL1
V
OH1
V
OL2
V
OH2
Note: 1. V
Supply Voltage 1.8 5.5 V
Supply Voltage 2.5 5.5 V
Supply Voltage 2.7 5.5 V
Supply Voltage 4.5 5.5 V
READ at 1.0 MHz 0.5 2.0 mA
Supply Current VCC = 5.0V
WRITE at 1.0 MHz 0.5 2.0 mA
Standby Current VCC = 1.8V CS = 0V 0 0.1 µA
Standby Current VCC = 2.5V CS = 0V 6.0 10.0 µA
Standby Current VCC = 2.7V CS = 0V 6.0 10.0 µA
Standby Current VCC = 5.0V CS = 0V 17 30 µA
Input Leakage VIN = 0V to VCC 0.1 1.0 µA
Output Leakage VIN = 0V to VCC 0.1 1.0 µA
Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
min and VIH max are reference only and are not tested.
IL
4.5V ≤ VCC ≤ 5.5V
1.8V ≤ V
4.5V ≤ V
≤ 2.7V
CC
≤ 5.5V
CC
1.8V ≤ VCC ≤ 2.7V
I
= 2.1 mA 0.4 V
OL
I
= -0.4 mA 2.4 V
OH
= 0.15 mA 0.2 V
I
OL
IOH = -100 µA VCC - 0.2 V
-0.6
2.0
-0.6
x 0.7
V
CC
0.8
V
+ 1
CC
V
x 0.3
CC
+ 1
V
CC
V
V
0172O–08/01
3
AC Characteristics
Applicable over recommended operating range from TA = -40°C to + 85°C, VCC = As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol Parameter Test Condition Min Typ Max Units
≤ V
f
t
t
t
t
t
t
t
t
t
t
SK
SKH
SKL
CS
CSS
DIS
CSH
DIH
PD1
PD0
SV
4.5V
SK Clock
Frequency
2.7V
2.5V
1.8V
4.5V
SK High Time
2.7V
2.5V
1.8V
4.5V
SK Low Time
2.7V
2.5V
1.8V
4.5V
Minimum CS
Low Time
2.7V
2.5V
1.8V
CS Setup Time Relative to SK
DI Setup Time Relative to SK
CS Hold Time Relative to SK 0 ns
DI Hold Time Relative to SK
Output Delay to ‘1’ AC Test
Output Delay to ‘0’ AC Test
CS to Status Valid AC Test
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
4.5V
2.7V
2.5V
1.8V
4.5V
2.7V
2.5V
1.8V
4.5V
2.7V
2.5V
1.8V
4.5V
2.7V
2.5V
1.8V
4.5V
2.7V
2.5V
1.8V
4.5V
2.7V
2.5V
1.8V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
≤ V
4.5V ≤ VCC ≤ 5.5V
t
DF
t
WP
Endurance
CS to DO in High
Impedance
Write Cycle Time
(1)
5.0V, 25°C, Page Mode 1M Write Cycles
AC Test
CS = V
≤ V
2.7V
2.5V
IL
1.8V
4.5V
≤ V
≤ V
≤ V
Note: 1. This parameter is characterized and is not 100% tested.
0
0
0
0
250
250
500
1000
250
250
500
1000
250
250
500
1000
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V
CC
≤ 5.5V 3 ms
CC
50
50
100
200
100
100
200
400
100
100
200
400
2
1
0.5
0.25
250
250
500
1000
250
250
500
1000
250
250
500
1000
100
100
200
400
10 ms
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4
AT93C46/56/66
0172O–08/01
Instruction Set for the AT93C46
AT93C46/56/66
Op
Instruction SB
Code
READ 1 10 A6 - A
Address Data
0
A5 - A
0
Commentsx 8 x 16 x 8 x 16
Reads data stored in memory, at
specified address.
EWEN 1 00 11XXXXX 11XXXX Write enable must precede all
programming modes.
ERASE 1 11 A
WRITE 1 01 A
- A
6
0
- A
6
0
A5 - A
A5 - A
0
0
D7 - D
0
D
- D
15
Erase memory location An - A0.
Writes memory location An - A0.
0
ERAL 1 00 10XXXXX 10XXXX Erases all memory locations. Valid
= 4.5V to 5.5V.
CC
= 4.5V to 5.5V.
CC
WRAL 1 00 01XXXXX 01XXXX D
only at V
- D
7
0
D
15
- D
Writes all memory locations. Valid
0
only at V
EWDS 1 00 00XXXXX 00XXXX Disables all programming
instructions.
0172O–08/01
5
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