ATMEL AT76C002 Datasheet
Programmable
FIR Filter
AT76C002
Features
16 Multiplier-Accumulators
•
16 Bit Data and 12 Bit Coefficients, 32 Bit Internal Accuracy
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16 Banks of 12 Bit Coefficients
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16 Taps at 33 MHz
•
Up to 32 Taps for Symmetrical or Inte rleaved Zeroed Coeffi cient Filters at 33 MHz
•
Up to 63 Taps for Symmetrical Halfb an d Fi lters at 33 MHz
•
Programmable Dec im ation by 2, 4, 8 or 16
•
Cascadable Kee pi ng Symmetry Advantage s
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Output Gain Multiplier
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Programmable Micropro ce ss or In terfa ce
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208-pin QFP Package
•
Description
The AT76C002 FIR filter contains 16 multiplier-accumulators which enable it to implement a 16th order non-symmetrical FIR filter or a 32nd order symmetrical FIR filter,
operating at 33 MHz. Furthermore, it can be configured to implement a 64th order
filter where the even order coefficients are zero, also running at 33 MHz. The incoming samples are 16 bit coded, the coefficients are 12 bit coded and the internal accuracy is 32 bits.
The AT76C002 contains 16 banks of 2 bit coefficients that can be selected in one
clock cycle. These banks can also be used to perform decimation by 2, 4, 8 or 16
using FIR filters from 32 taps up to 256 taps. In decimation mode, the symmetry
capabilities cannot be used.
In order to implement long FIR filters at the highest frequency (i.e. 33 MHz) the circuit
can be cascaded, with no limits except the internal accuracy. Symmetry properties
can be used in cascade mode. This halves the number of cascaded circuits to implement symmetrical filters.
In order to increase the accuracy of the intermediate results, the AT76C002 includes
an output gain multiplier which enables the whole 12 bit dy namic of the coefficients to
be used. Cascadability cannot be used in decimation mode.
The AT76C002 includes a 16 bit microprocessor interface that can be configured to
be Intel or Motorola compatible.
Applications
High sample rate digital filtering
•
Image process ing
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Video processing
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Matrix multiplication
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Block Diagram
BXP
FXP
CLOCK
RESET
ADR
RD
DATA
WR/DS
CS
Coeffic-
ient
Bank
Control Unit
Configuration
Register
Output Gain
Register
Interface
Decimation
Micro
Control
Timing and
Control
ALU
Register
Register
PRA
Coeffic-
ient
Bank
Backward Delay Line
Forward Delay Line
ALU
Register
Register
Adder Array
Register
Mux
Decimat-
ion
Dual-Port
RAM
Mux
Register
Coeffic-
ient
Bank
Register
0 to
8-bit
Down
Shifter
Mux
ALU
Register
Register
8-bit
Down
Shifter
Register
GAIN
Coeffic-
ient
Bank
Mux
ALU
Register
Register
Register
DOUT
Mux
BXN
FXN
Internal Structur e
FIR Structure
The AT76C002 is built around an array of 16 17x12 multiplier-accumulators, a forward and a backward delay line
which enable FIR filters of up to 32 taps to be implemented
with odd and even symmetry. FIR filters with interleaved
zeroed coefficients (such as half-band filters) are handled
in an efficient way since a 64 tap half-band symmetrical
FIR can be implemented in only one device.
Coefficient Banks
The AT76C002 contains 16 banks of 12 bit coefficients
that can be selected by writing to an internal register. The
12 bit coefficients are loaded using the 16 bit microprocessor data bus where the least significant 12 bits are for the
coefficient and the most significant 4 bits are for the address within the bank. The bank number is selected by
writing to a configuration register.
2 AT76C002
Decimation
Using these coefficient banks, the AT76C002 can implement decimation filters by 2, 4, 8 or 16, the output rate
being 2, 4, 8 or 16 times lower than the input rate. The
value of the decimation is programmed in an internal configuration register using the microprocessor interface. Using the SEN Sample Enable input signal, the circuit can
handle a variable incoming data rate.
Cascadability
The ATC76C002 can be cascaded in order to implement
long high-rate FIR filters. Even in a cascaded structure,
the AT76C002 can efficiently handle symmetrical and interleaved zeroed coefficient FIR filters, by cascading both
forward and backward delay lines. In that way, a 128 tap
symmetrical FIR filter or a 256 tap symmetrical half-band
FIR filter would only require two cascaded AT76C002 devices.
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