ATMEL AT5FC008-20 Datasheet

8-Megabyte
Flash Memory
PCMCIA Card

AT5FC008
Preliminary

Features

Single Power Supply

•

Read and Write Volta ge, 5 V ± 5%

High Performance

•

200 ns Maximum Access Time
6 ms Typical Sector Write

CMOS Low Power Consumption

•

25 mA Typical Active Current (Byte Mode)
400 µA Typic al Standby Current

Fully MS-DOS Compatible Flash Driver and Formatter

•

Virtual-Disk Flash Driver with 512 By tes/Sector
Random Read/Write to any Sector
No Erase Operation Required Prior to any Write

Zero Data Retention Power

•

Batteries not Required for Data Storage

PCMCIA/JEIDA 68-Pin Standard

•

Selectable Byte- or Word-Wide Configuration

High Re-programmable Endurance

•

Built-in Redundancy for Sector Replacement
Minimum 100,000 Write Cycles

Five Levels of Write Protection

•

Prevent Accidental Data Loss

Block Diagram

ADDRESS

23

BUFFERS

A1-A19

19

PCMCIA

JEIDA

68 PINS

Pin Configuration

Pin Name Function
A0-A22 Addresses
D0-D15 Data

CE1, CE2,
WE, OE, REG
CD, WP
BVD1, BVD2

Control Signals

Card Status

16

DATA

TRANSCEIVERS

16

8-MBYTE FLASH

MEMORY ARRAY

A0,
A

20

,

A21,

BUS

5

CONTROL

A22
,WE,OE,REG

CE

X

1

GND

2

D3

3

D4

4

D5

5

D6

6

D7

7

CE1

8

A10

9

OE

10

A11

11

A9

12

A8

13

A13

14

A14

15

WE

16

NC

17

VCC

18

NC

19

A16

20

A15

21

A12

22

A7

23

A6

24

A5

25

A4

26

A3

27

A2

28

A1

29

A0

30

D0

31

D1

32

D2

33

WP

34

GND

35

GND

36

CD1

37

D11

38

D12

39

D13

40

D14

41

D15

42

CE2

43

NC
RFU

44

45

RFU
A17

46

A18

47

A19

48

A20

49

A21

50

VCC

51

NC

52

A22

53

NC

54

NC

55
56

NC

57

NC

58

NC

59

NC

60

NC

61

REG

62

BVD2

63

BVD1

64

D8

65

D9

66

D10

67

CD2

68

GND

Description

Atmel’s Flash Memory Card provides the highest system level
performance for data and file storage solutions to the portable
PC market segment. Data files and a pplications programs ca n be
stored on the AT5FC008. This allows OEM manufacturers of
portable system to eliminate the weight, power consumption and
reliability issues associated with electro-mechanical disk-based
systems. The AT5FC008 r equires a single voltage powe r supply
for total system operation. No batteries are needed for data re­tention due to its Flash-based technology. S ince no high volta ge
(12 V) is required to perform any write operation, the
AT5FC008 is suitable for the emerging "mobile" personal sys­tems.

The AT5FC008 is com pa tible with the 6 8-pin P CMC IA/ JE IDA
international standard. Atmel’s Flash Memory Cards can be
read in either a byte-wide or word-wide mode which allows for
flexible integration into various system platform s. It c an be rea d
like any typical PCMCIA SRAM or ROM card.

V

Block Diagram

CC

RRR

D0-D15 D8-D15

WE

OE WE

WP

I/O

TRANSCEIVERS

AND BUFFERS

WP

The Card Information Structure (CIS) can be written by the
OEM or by Atmel at the attribute memory address space using a
format utility. The CIS appears at the beginning of the card’s
attribute memory space and defines the low-level organization
of data on the PC card. The AT5FC008 contains a separate 2K
byte EEPROM memory for the card’s attribute memory space.

The third party software solutions such as AWARD Software’s
CardWare system and the SCM’s Flash File System (FFS),

enables Atmel’s Flash Memory Card to emulate the function of
essentially all the major brand personal computers that are
DOS/Windows compatible.

For some unique portable computers, such as the
HP200/100/95LX series, the software Driver and Formatter are
also available. The Atmel Driver and Formatter utilizes a self­contained spare sector replacement algorithm, enabled by At­mel’s small 512-byte sectors, to achieve long term card
reliability and endurance.

D0-D7

OE

V

CC

WRITE
PROTECT
SWITCH

SYSTEM

A1-A22

CE

CE

REG

A0

2

1

ADDRESS
BUFFERS

AND

DECODERS

DEVICE
A0-A18

CEH

0

CEH

7

CEL0­CEL

7

-

AT29C040 AT29C040

A0-A18

OE

ATTRIBUTE

MEMORY

A0-A10

WE

CE

R

R

V

CC

CD
CD

BVD
BVD

D0-D7

1

2

CARD DETECT

1

2

CE

S0

WE
OE

A0-A18
CE

WE
OE

V

V

CC

SS

S2 S3

V

V

CC

SS

A0-A18
CE

WE
OE

A0-A18
CE

WE
OE

D8-D15D0-D7

S1

V

V

CC

SS

D8-D15D0-D7

V

V

CC

SS

BATT ERY VOLTAGE

DETECT

GND

V

CC

2 AT5FC008

A0-A18

V

CC

CE
WE
OE

S14

D0-D7

VCCV

SS

A0-A18
CE

WE
OE

S15

V

SS

D8-D15

V

CC

Absolute Maximum Ratings*

Storage Temperature........................-30°C to +70°C

Ambient Temperature with

Power Applied................................... -10°C to +70°C

Voltage with
Respect to Ground, All pins

(1)

V

............................................... -2.0 V to +7.0 V

CC

Output Short Cir c uit Current

(1)

.......... -2.0 V to +7.0 V

(2)

....................-200 mA

AT5FC008

*NOTICE: Stresses beyond those listed under "Absolute Maximum

Ratings" may cause perm an en t dam ag e to the card . T his is a stress
rating only and functional operation of the card at these or any
other conditions beyond those indicated in the
operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended pe­riods may affect device reliability.

Notes:

1. Minimum DC voltage on input or I/O pins is -0.5 V. During volt­age transients, inputs may overshoot V
up to 20 ns. Maximum DC voltage on output and I/O pins is
V

+0.5 V. During voltage transitions, outputs may overshoot to

CC

V

+2.0 V for periods up to 20 ns.

CC

2. No more than one output shorted at a time. Durati on of the short cir­cuit should not be greater than one second. Conditions equal
V

= 0.5 V or 5.0 V, VCC = Max.

OUT

to -2.0 V for periods of

SS

D.C. and A.C. Operating Range

AT5FC008-20

o

Operating Temperature (Case) Com. 0

Power Supply 5 V ± 5%

V

CC

Pin Capacitance

(f = 1 MHz, T = 25°C)

(1)

Symbol Parameter Conditions Typ Max Units

C

IN1

C

OUT

C

IN2

C

I/O

Note: 1. This parameter is characterized and is not 100% tested.

Address Capacitance VIN = 0 V 20 pF
Output Capacitance V

= 0 V 20 pF

OUT

Control Capacitance VIN = 0 (CE) 45 pF
I/O Capacitance V

= 0 V 20 pF

I/O

C - 70oC

3

PC Card Pin Assignments

I = Input, O = Output, I/O = Bi-directional, NC = No Connect

Pin Signal I/O Function

1 GND Ground
2 D3 I/O Data Bit 3
3 D4 I/O Data Bit 4
4 D5 I/O Data Bit 5
5 D6 I/O Data Bit 6
6 D7 I/O Data Bit 7
7

CE

1

I Card Enable 1

(1)

8 A10 I Address Bit 10
9

OE I Output Enable
10 A11 I Address Bit 11
11 A9 I Address Bi t 9
12 A8 I Address Bi t 8
13 A13 I Address Bit 13
14 A14 I Address Bit 14
15

WE I Write Enable
16 NC No Connect
17 V

CC

Power Supply
18 NC No Connect
19 A16 I Address Bit 16
20 A15 I Address Bit 15
21 A12 I Address Bit 12
22 A7 I Address Bi t 7
23 A6 I Address Bi t 6
24 A5 I Address Bi t 5
25 A4 I Address Bi t 4
26 A3 I Address Bi t 3
27 A2 I Address Bi t 2
28 A1 I Address Bi t 1
29 A0 I Address Bi t 0
30 D0 I/O Data Bit 0
31 D1 I/O Data Bit 1
32 D2 I/O Data Bit 2
33 WP O Write Protect

(1)

34 GND Ground

Notes: 1. Signal must not be connected between cards.

BVD = Internally pulled up.

2.

Pin Signal I/O Function

35 GND Groun d
36

CD

1

O Card Detect 1
37 D11 I/O Data Bit 11
38 D12 I/O Data Bit 12
39 D13 I/O Data Bit 13
40 D14 I/O Data Bit 14
41 D15 I/O Data Bit 15
42

CE

2

I Card Enable 2
43 NC No Connect
44 RFU Reserved
45 RFU Reserved
46 A17 I Address Bit 17
47 A18 I Address Bit 18
48 A19 I Address Bit 19
49 A20 I Address Bit 20
50 A21 I Address Bit 21
51 V

CC

Power Supply
52 NC No Connect
53 A22 I Address Bit 22
54 NC No Connect
55 NC No Connect
56 NC No Connect
57 NC No Connect
58 NC No Connect
59 NC No Connect
60 NC No Connect
61
62
63 BVD

REG I Register Select
BVD

O Ba ttery Voltage Detect 2

2

O Ba ttery Voltage Detect 1

1

64 D8 I/O Data Bit 8
65 D9 I/O Data Bit 9
66 D10 I/O Data Bit 10
67

CD

2

O Card Detect 2

68 GND Groun d

(1)

(1)

(2)
(2)

(1)

4 AT5FC008

Pin Description

Symbol Name Type Function

AT5FC008

A0-A22 Address Inputs Input

D0-D15 Data Input/Output

CE1, CE

OE Output Enable Input

WE Write Enable Input

V

GND Ground

CD1, CD

2

CC

2

Card Enable Input

PC Card Power
Supply

Card Detect Output

Input/Output

Address Inputs are internally latched during write cycles.
Data Input/Outputs are internally latched on write cycles.

Data outputs are latched during read cycles. Data pins
are active high. Whe n the memory card is de-selected or
the outputs are dis ab led the outputs float to tri-state.

Card Enable is active low. The memory card is
de-selected and power consumption is reduced to
standby levels whe n
memory card circuitry that controls the high and low byte
control logic o f the card, input buffers, segment decoders,
and associated memory devices.

Output Enable is active low and enables the data buffers
through the card outputs during read cycles.

Write Enable is active low and controls th e write function
to the memory arra y. The target address is latched on the
falling edge of the
latched on the rising edge of the pulse.

PC Card Power Supply for device operation
(5.0 V ± 5%)

Ground
When Card Detect 1 and 2 = Ground the system detects

the card.

CE is high. CE activates the internal

WE pulse and the appropriate data is

WP Write Protect Output

NC No Conne ct
BVD1, BVD2Battery Voltage Detect Output

REG Register Select Input

Write Protect is active high and indicate s that all card
write operations are disabled by the write protect switch.

Corresponding pin is not connected internally.
Internally pulled up. (There is no battery in the card.)
Provide access to Card Information Structure in the

Attribute Memory Device

5