ATMEL AT49BV640ST User Manual
BDTIC www.BDTIC.com/ATMEL
Features
•
Single Voltage Operation Read/Write: 2.65V - 3.6V
•
Access Time – 70 ns
•
Sector Erase Architecture
– One Hundred Twenty-seven 32K Word (64K Bytes) Main Sectors with
Individual Write Lockout
– Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout
•
Fast Word Program Time – 10 µs
•
Typical Sector Erase Time: 32K Word Sectors – 700 ms; 4K Word Sectors – 100 ms
•
Suspend/Resume Feature for Erase and Program
– Supports Reading and Programming Data from Any Sector by Suspending
Erase of a Different Sector
– Supports Reading Any Word by Suspending Programming of Any Other Word
•
Low-power Operation
– 10 mA Active
– 15 µA Standby
•
VPP Pin for Write Protection and Accelerated Program Operation
•
RESET Input for Device Initialization
•
Softlock Sector Protection
•
Secure Lock and Freeze Feature
•
Top or Bottom Boot Block Configuration Available
•
128-bit Protection Register
•
Minimum 100,000 Erase Cycles
•
Common Flash Interface (CFI)
•
CBGA Green (Pb/Halide-free/RoHS Compliant) Packaging
64-megabit
(4M x 16)
Secure
3-volt Only
Memory
AT49BV640S
AT49BV640ST
Summary
1. Description
The AT49BV640S(T) is a 2.7-volt 32-megabit Flash memory organized as 4,194,304
words of 16 bits each. The memory is divided into 135 sectors for erase operations.
The device is offered in a 64-ball CBGA package. The device has CE
signals to avoid any bus contention. This device can be read or reprogrammed using
a single power supply, making it ideally suited for in-system programming.
In some applications, in addition to the standard softlock sector protection mechanism, a requirement exists to allow for the permanent and irreversible locking of
selected regions in the memory. The AT49BV640S(T) allows the user to permanently
lock thirty-eight regions, and once activated these secure regions cannot be altered or
erased through Software or Hardware at any time. Once activated, no facility exists to
over-ride the secure lock mechanism. The size and the location of the secure regions
is determined by the Top or Bottom Boot Block designation. The location of the secure
regions is shown on pages 3 - 6.
The secure regions can be locked in any sequence and at any time during normal
device operation. Read operations can still be performed on any region that has the
secure lock feature enabled. Full read/write operations and standard sector operations including standard Sector locking can be performed on all regions that are not
secure locked.
and OE control
(Complete
Datasheet
under NDA)
NOTE: This is a summary document.
The complete document is available
under NDA. For more information,
please contact your local Atmel sales
office.
3583AS–FLASH–9/06
The AT49BV640S(T) device also contains a freeze feature that will freeze the lock status of the
secure regions. The freeze feature prevents any further locking of the secure regions. If the user
requires certain regions to be locked, then these regions must be programmed and locked prior
to activation of the freeze command. It is important to note that enabling the freeze feature is
irreversible.
2. Pin Configurations
Pin Name Pin Function
A0 - A21 Addresses
CE Chip Enable
OE
Output Enable
WE
RESET
VPP Write Protection and Power Supply for Accelerated Program Operations
I/O0 - I/O15 Data Inputs/Outputs
NC No Connect
VCCQ Output Power Supply
2.1 64-ball CBGA Top View
Write Enable
Reset
A
B
C
D
E
F
G
H
2345678
1
A0
A1
A2
A3
I/O8
NC
NC
NC
A5
VSS
A6
A4
I/O1
I/O0
NC
NC
A7
A8
A9
A10
I/O9
I/010
I/O2
VCC
VPP
CE
A11
RESET
I/O3
I/O11
VCCQ
VSS
A12
A13
A14
NC
I/O4
I/O12
I/O5
I/O13
VCC
NC
NC
NC
NC
NC
I/O6
VSS
A17
A18
A19
A15
I/O15
NC
I/O14
I/O7
A21
NC
A20
A16
NC
OE
WE
NC
2
AT49BV640S(T) Summary
3583AS–FLASH–9/06
AT49BV640S(T) Summary
3. Memory Organization –
AT49BV640S
Secure
Region
(SCR) Sector
SA0 4K 00000 - 00FFF
SA1 4K 01000 - 01FFF
SA2 4K 02000 - 02FFF
0
1 SA8 32K 08000 - 0FFFF
2 SA9 32K 10000 - 17FFF
3 SA10 32K 18000 - 1FFFF
4 SA11 32K 20000 - 27FFF
5 SA12 32K 28000 - 2FFFF
6 SA13 32K 30000 - 37FFF
7 SA14 32K 38000 - 3FFFF
8
9
10
11
12
SA3 4K 03000 - 03FFF
SA4 4K 04000 - 04FFF
SA5 4K 05000 - 05FFF
SA6 4K 06000 - 06FFF
SA7 4K 07000 - 07FFF
SA15 32K 40000 - 47FFF
SA16 32K 48000 - 4FFFF
SA17 32K 50000 - 57FFF
SA18 32K 58000 - 5FFFF
SA19 32K 60000 - 67FFF
SA20 32K 68000 - 6FFFF
SA21 32K 70000 - 77FFF
SA22 32K 78000 - 7FFFF
SA23 32K 80000 - 87FFF
SA24 32K 88000 - 8FFFF
SA25 32K 90000 - 97FFF
SA26 32K 98000 - 9FFFF
SA27 32K A0000 - A7FFF
SA28 32K A8000 - AFFFF
SA29 32K B0000 - B7FFF
SA30 32K B8000 - BFFFF
SA31 32K C0000 - C7FFF
SA32 32K C8000 - CFFFF
SA33 32K D0000 - D7FFF
SA34 32K D8000 - DFFFF
Size
(Words)
Address Range
x16
(A21 - A0)
3. Memory Organization –
AT49BV640S (Continued)
Secure
Region
(SCR) Sector
SA35 32K E0000 - E7FFF
13
14
15
16
17
18
19
20
21
SA36 32K E8000 - EFFFF
SA37 32K F0000 - F7FFF
SA38 32K F8000 - FFFFF
SA39 32K 100000 - 107FFF
SA40 32K 108000 - 10FFFF
SA41 32K 110000 - 117FFF
SA42 32K 118000 - 11FFFF
SA43 32K 120000 - 127FFF
SA44 32K 128000 - 12FFFF
SA45 32K 130000 - 137FFF
SA46 32K 138000 - 13FFFF
SA47 32K 140000 - 147FFF
SA48 32K 148000 - 14FFFF
SA49 32K 150000 - 157FFF
SA50 32K 158000 - 15FFFF
SA51 32K 160000 - 167FFF
SA52 32K 168000 - 16FFFF
SA53 32K 170000 - 177FFF
SA54 32K 178000 - 17FFFF
SA55 32K 180000 - 187FFF
SA56 32K 188000 - 18FFFF
SA57 32K 190000 - 197FFF
SA58 32K 198000 - 19FFFF
SA59 32K 1A0000 - 1A7FFF
SA60 32K 1A8000 - 1AFFFF
SA61 32K 1B0000 - 1B7FFF
SA62 32K 1B8000 - 1BFFFF
SA63 32K 1C0000 - 1C7FFF
SA64 32K 1C8000 - 1CFFFF
SA65 32K 1D0000 - 1D7FFF
SA66 32K 1D8000 - 1DFFFF
SA67 32K 1E0000 - 1E7FFF
SA68 32K 1E8000 - 1EFFFF
SA69 32K 1F0000 - 1F7FFF
SA70 32K 1F8000 - 1FFFFF
Size
(Words)
x16
Address Range
(A21 - A0)
3583AS–FLASH–9/06
3
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