ATMEL AT49BV160ST User Manual
BDTIC www.BDTIC.com/ATMEL
Features
•
Single Voltage Read/Write Operation: 2.65V to 3.6V
•
Access Time – 70 ns
•
Sector Erase Architecture
– Thirty-one 32K Word (64K Bytes) Sectors with Individual Write Lockout
– Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout
•
Fast Word Program Time – 10 µs
•
Typical Sector Erase Time: 32K Word Sectors – 700 ms; 4K Word Sectors – 100 ms
•
Suspend/Resume Feature for Erase and Program
– Supports Reading and Programming from Any Sector by Suspending Erase
of a Different Sector
– Supports Reading Any Word by Suspending Programming of Any Other Word
•
Low-power Operation
– 10 mA Active
– 15 µA Standby
•
VPP Pin for Write Protection and Accelerated Program Operations
•
RESET Input for Device Initialization
•
Softlock Sector Protection
•
Secure Lock and Freeze Feature
•
Top or Bottom Boot Block Configuration Available
•
128-bit Protection Register
•
Minimum 100,000 Erase Cycles
•
Common Flash Interface (CFI)
•
CBGA Green (Pb/Halide-free/RoHS Compliant) Packaging
16-megabit
(1M x 16)
Secure
3-volt Only
Memory
AT49BV160S
AT49BV160ST
1. Description
The AT49BV160S(T) is a 2.7-volt 16-megabit Flash memory organized as 1,048,576
words of 16 bits each. The memory is divided into 39 sectors for erase operations.
The device is offered in a 64-ball CBGA package. The device has CE
signals to avoid any bus contention. This device can be read or reprogrammed using
a single power supply, making it ideally suited for in-system programming.
In some applications, in addition to the standard softlock sector protection mechanism, a requirement exists to allow for the permanent and irreversible locking of
selected regions in the memory. The AT49BV160S(T) allows the user to permanently
lock thirty-nine regions, and once activated these secure regions cannot be altered or
erased through Software or Hardware at any time. Once activated, no facility exists to
over-ride the secure lock mechanism. The size of each secure region is the same as
the sector size, and the location of these regions is determined by the Top or Bottom
Boot Block designation. The location of the secure regions is shown on page 3.
The secure regions can be locked in any sequence and at any time during normal
device operation. Read operations can still be performed on any region that has the
secure lock feature enabled. Full read and write operations, standard sector operations including standard Sector locking operations can be performed on all regions
that are not secure locked.
and OE control
Summary
(Complete
Datasheet
under NDA)
NOTE: This is a summary document.
The complete document is available
under NDA. For more information,
please contact your local Atmel sales
office.
3560AS–FLASH–9/06
The AT49BV160S(T) device also contains a freeze feature that will freeze the lock status of the
secure regions. The freeze feature prevents any further locking of the secure regions. If the user
requires certain regions to be locked, then these regions must be programmed and locked prior
to activation of the freeze command. It is important to note that enabling the freeze feature is
irreversible.
2. Pin Configurations
Pin Name Function
A0 - A19 Addresses
CE Chip Enable
OE
Output Enable
WE
RESET
VPP Write Protection and Power Supply for Accelerated Program Operations
I/O0 - I/O15 Data Inputs/Outputs
NC No Connect
VCCQ Output Power Supply
2.1 64-lead CBGA Top View
A
B
C
D
E
F
G
H
Write Enable
Reset
1
A0
A1
A2
A3
I/O8
NC
NC
NC
2345678
A5
A7
VPP
A12
VCC
A17
NC
VSS
A8
CE
A13
NC
A18
NC
A6
A9
A11
A14
NC
A19
NC
A4
A10
RESET
NC
NC
A15
A16
I/O1
I/O9
I/O3
I/O4
NC
I/O15
NC
I/O0
I/010
I/O11
I/O12
NC
NC
OE
NC
I/O2
VCCQ
I/O5
I/O6
I/O14
WE
NC
VCC
VSS
I/O13
VSS
I/O7
NC
2
AT49BV160S(T) Summary
3560AS–FLASH–9/06
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