ATMEL AT43312 Datasheet
Features
•
Full compliance with USB spec Rev 1.0
•
Four downstream ports
•
Full speed and low speed data transfers
•
Self-Powered or Bus-Powered modes of operation
•
Per port overcurrent monitoring
•
Individual port power switch control
•
USB connection status indicators
Description
The AT43312 is a 5 port USB hub chip supporting one upstream and four downstream
ports. The AT43312 connects to an upstream hub or Host/Root Hub via Port0 and the
other ports connect to external downstream USB devices. The hub re-transmits the
USB differential signal between Port0 and Ports[1:4] in both directions. A USB hub
with the AT43312 can operate as a bus-powered or self-powered through chip’s
power mode configuration pin. The AT43312 is pin- and function-compatible with the
AT43311 and can be used as a replacement for the AT43310 with one pin modification.
The AT43312 supports the 12 Mb/s full-speed as well as 1.5 Mb/s sl ow-speed USB
transactions. To reduce EMI, the AT43312’s oscillator frequency is 6 MHz even
though some internal circuitry operates at 48 MHz.
Pin Configurations
SOIC/DIP
PWR2
PWR3
PWR4
VCC5
GND
OSC1
OSC2
LFT
VCCA
OVL4
OVL3
OVL2
OVL1
VREF
BUS/SELF
STAT4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
PWR1
DP4
DM4
DP3
DM3
GND
DP2
DM2
VCC3
DP1
DM1
DP0
DM0
STAT1
STAT2
STAT3
Self- and BusPowered USB
Hub Controller
AT43312
Rev. 1002A-A–01/98
1
Block Diagram
Upstream port
Port0
HUB
CONTROLLER
ENDPOINT 0
ENDPOINT 1
SERIAL INTERFACE
ENGINE
PORT1 PORT2 PORT3 PORT4
To downstream
devices
HUB
REPEATER
Note: This document assumes that the reader is familiar with the Universal Serial Bus and therefore only describes the unique fea-
tures of the AT43312 chip. For detailed information about the USB and its operation, the reader should refer to the Universal
Serial Bus Specification Version 1.0, January 19, 1996.
Figure 1.
Device Pins
LFT
OSC1
PSC2
DP0
DM0
BUS/SELF
VREF
VCC3
VCC5
VCCA
GND
OSC
&
PLL
SERIAL
INTERFACE
ENGINE
HUB
REPEATER
HUB
CONTROLLER
PORT4
PORT3
PORT2
PORT4
DP4
DM4
OVL4
PWR4
STAT4
DP3
DM3
OVL3
PWR3
STAT3
DP2
DM2
OVL2
PWR2
STAT2
DP1
DM1
OVL1
PWR1
STAT1
2
AT43312
AT43312
Pin Description
Pin Description Pin Type Description
OSC1 I Oscillator Input. Input to the inverting 6 MHz oscillator amplifier.
OSC2 O Oscillator Output. Output of the inverting oscillator amplifier.
LFT I PLL Filter. For proper operation of the PLL, this pin should be connected through a 2.2 nF capacitor in
parallel with a 100 Ω resistor in series with a 10 nF capacitor to ground (GND)
BUS/SELF
I Hub Power Mode. Input signal that sets the bus or self-powered mode operation. A high on this pin
enables the bus-powered mode, a low the self-powered mode.
VREF I Reference Voltage. This is an input pin that should be connected to an external voltage source. V
is used internally as the reference v olt age by the ov erload p rote ction circui t to dec ide whe ther the re is
a problem with a port’s power.
DP0 B Upstream Plus USB I/O. This pin should be connected to V
through an external 1.5 KΩ pullup
CC
resistor. DP0 and DM0 form the differential signal pin pairs connected to the Host Controller or an
upstream Hub.
DM0 B Upstre am Minus USB I/O
DP[1:4] B Port Plus USB I/O. This pin should be connected to V
through an external 15 KΩ resistor. DP[1:4]
SS
and DM[1:4] are the differential signal pin pairs to connect downstream USB devices.
DM[1:4] B Port Minus USB I/O. This pin should be connected to V
OVC[1:4]
I Overcurrent. Thi s is the inp ut signal used to indi cate t o the AT43312 that an overcurrent is dete cted a t
the port. If OVC
is asserted, AT43312 will assert the PWRx pin and rep ort the status to t he USB Host.
through an external 15 KΩ resistor.
SS
PWR[1:4] OD Power Switch. This is an output signal used to enable or disable the external voltage regulator
is de-asserted when a power supply problem is detected at OVCx.
STAT[1:4]
supplying power to a port. PWRx
O Connect Status. This is an output pin indicating that a port is properly connected. STATx is asserted
when the port is enabled.
V
CC3
V
CC5
V
CCA
V 3.3V Power Supply
V 5V Power Supply
V 5V Analog Power Supply
GND V Ground
Note: Signals with a # are active low.
REF
3
Functional Description
The Atmel AT43312 is a USB hub control ler for use in a
standalone hub, as well as an add-on hub for an existing
non-USB peripheral such as a PC dis play monitor or keyboard. In additio n to supporting th e standard USB hub
functionality, the AT43312 has additional features to
enhance the user friendliness of the hub.
USB Ports
The AT43312’s downstr eam po rt s are s tan dar d US B p ort s.
That is, their functionality complies to the USB specification
and any USB compliant device can be attached to these
ports without any other circuitry or modification. Each port
has a port connectivity status pin.
Dp And Dm Configuration
To match the full-spe ed cable impedance , 27 Ω series
resistors must be connected between each port’s DM and
DP pins to their c orresp ondin g US B co nnect or. In addit ion,
15 KΩ pull-down resistors are required at each downstream port’s DM and DP pins. Port0 is a full-speed port
and requires a 1.5 KΩ pull-up resistor to the 3.3V power
supply. This power supply must be derived from the bus
supplied power.
Port Status Pin
The STATx
USB specification. Their function is to al low the h ub to provide feedback to the user whenever a device is properly
connected to the port. A LED and series resistor connected
to STAx
The default state of STATx
enabled, AT43312 will assert the port’s STATx
tion that causes the port to be disabled inactivates STATx
Hub Repeater
The Hub Repeater is responsible for port connectivity setup
and tear-down. It also supports exception handling such as
bus fault detection and rec overy, and co nnect/disco nnect
detection. Port0 is the root port and is connected to the root
hub or an upstream hub. When a packet is rec eived at
Port0, the AT43312 propagates it to all of the enabled
downstream ports. Conversely, a packet from a downstream port is transmitted from Port0.
The AT43312 supports downstream port data signaling at
both 1.5 Mb/s and 12 Mb/s. Devic es at tached to the do wnstream ports are determ ined to b e either fu ll-spe ed or lo wspeed depending on wh ich data l ine (DP or DM) is pulled
high. If a port is enumerated as low speed, its output buffers operate at a slew rate of 75-300 ns, and the AT43312
will not propagate any traffic to that port unless it is prefaced with a preamble PID. Low-speed data following the
preamble PID is propagated to both low a nd full-speed
devices. The AT433 12 wil l en able lo w-sp eed dr iver s wit hin
four full-speed bit times of the last bit of a preamble PID,
pins are signals that are not required by the
can be used to provide a visual feedback.
is inactive. After a port is
. Any condi-
.
and will disable t hem at the en d of an EOP. Pack ets o ut of
Port0 are always transmitted using the full-speed drivers.
All the AT43312 ports i ndependently drive and monitor
their DP and DM pins so that they are able to detect and
generate the ‘J’, ‘K’, and SE0 bus signaling states. Each
hub port has single-ended and differential receivers on its
DP and DM lines. The ports I/O buffers comply to the voltage levels and drive requirements as specified in the USB
Specifications Rev 1.0.
The Hub Repeater implements a frame timer which is timed
by the 12MHz USB clock and gets reset every time a SOF
token is received from the Host.
Serial Interface Engine
The Serial Interface Engine handles the USB communication protocol. It performs the USB clock/data separation,
the NRZI data encod ing/d ecoding, bit stuffi ng, CRC ge neration and checking, USB packet ID decoding and generation, and data serialization and de- serialization. The onchip phase locke d l oop ge ner ate s the high-frequency c lock
for the clock/data separation circuit.
Power Management
A hub is a high-powered device and is allowed to draw up
to 500 mA of current from the host or upstream hub. The
AT43312 chip itself and its external hub circuitry consume
less than 100 mA. The AT4 3312’s power managem ent
logic work with external devices to detect overcurrent and
control power to the ports.
Overcurrent se nsing is on a pe r port basis and is achiev ed
through the OVCx
input of an analog comparator whose other input is connected to a reference voltag e source, V
mon to all four ports. Whenever the voltage at OVCx
than V
tion. This could be caused by an ove rload, or even a sho rt
circuit, and causes the AT43312 to set the por t’s
PORT_OVER_CURRENT status bit and its
C_PORT_OVER_CURRENT status ch ange bit. At the
same time, power to the offending port is shut off.
An external device is needed to perform the actual switching of the ports’ power under control of the AT43312. The
signal to control the external sw itches are th e PWRx
which are open drain signals and require external pull-up
resistors of 10 KΩ. Any type of suitable sw itc h or dev ice is
acceptable. However, it should have a low-voltage drop
across it even when the p ort abs orbs ful l po wer. In its si mplest form, this swit ch can be a P-c hannel MOS FET. The
advantages of using a MOSFET switch is its very low voltage drop and low cost.
Each one of the AT43312’s port has its own power control
pin which is asserted only when a
Set_Port_Feature[PORT-POWER] request is received
, the AT43312 tre ats it a s an overc urrent c ondi-
REF
pins. Each of the OVCx pin is the pl us
which is com-
REF
is less
pins
4
AT43312
AT43312
from the host. PWRx
is de-assert ed under the fo llowing
conditions:
1. Power up
2. Reset and initialization
3. Overcurrent condition
Self-powered Mode
In the self-powered mode, power to the downstream ports
must be supplie d by an exte rnal p ower supp ly. Thi s power
supply must be capable of supplying 500 mA per port.
The USB specificatio ns requ ire th at the v oltage dr op at th e
power switch, and board traces be no more than 100 mV. A
good conservative maximum drop at the power switch itself
should be no more than 750 mV. Careful design and selec-
Figure 2.
Self-Powered Hub Power Supply
BUS_POWER
GND
tion of the power switch and P C board layout is req uired to
meet the specifi catio ns. W hen usi ng a M OSFET sw itch, its
resistance must be 140 MΩ or less , und er wo rst ca se c onditions. A suitable MOSFET switch for an AT43312 based
hub is a P-channel enhancement mode MOSFET. The
input of the PMOS switch is connected to the local 5V
power supply while th e output is connected to the port
power line, as well as the port’s OVCx
pin. An overcurrent
condition increases the voltage drop across the MOSFET.
If this voltage drops to less than the voltage at V
REF
, the
AT43312 voltage reference pin, the AT43312 interpretes
this as an overcurrent condition. The AT43312 removes the
power from that port by de-activating the port’s PW Rx
and reports the condition to the Host.
3V REG
IN
OUT
GND
pin
POWER SUPPLY
5V OUT
GND
R1
VREF
R2
MOSFET P
Bus-powered Mode
In the bus-powered mode, all the power for the hub itself as
well as the downstream ports are supplied by the root hub
or upstream hub through the USB. Only 100 mA is available for each of the hub’s downstream devices and therefore only low power devices are supported.
The power switch and overcurrent protection work exactly
like the self-powered mode, except that the allowable
switch resistance is higher: 700 MΩ or less under the
worst-case condi tio n.
VCC5
PWR OVC DM DP
GND
AT43312
VCC3
PORT_POWER
DP
DM
GND
To
downstream
device
The diagrams of Figures 2 and 3 show examples of the
power supply and management connections for a typical
AT43312 port in the self-powered mode and bus-powered
mode.
5
Figure 3.
Bus-Powered Hub Power Suppl y
3V REG
BUS_POWER
GND
VCC5
R1
VREF
Y
R2
MOSFET P
Hub Controller
The Hub Controller of the AT43312 provides the mechanism for the Host to enum erate the Hu b, and the AT 43312
to provide the Host with its configuration information. It also
provides a mechanism for the Host to monitor and control
the downstream ports. Power is applied, on a per port
basis, by the Hub Controller upon receiving a command,
Set_Port_Feature[PORT_POWER], fro m the Host. The
Control Status Register
IN OUT
GND
GND
AT43312
PWR OVC DM DP
VCC3
PORT_POWER
DP
DM
GND
To
downstream
device
AT43312 itself must be configured first by the Host before
the Hub Controller can apply power to external devices.
The Hub Controller cont ains two endp oint s, Endp oint0 and
Endpoint1, and maintains a status register, Controller Sta-
Register, which reflects the AT43312’s current settings.
tus
At power up, all bits in this register will be set to 0’s.
Bit Function Value Description
0 Hub configuration status
1 Hub remote wakeup status
2 Endpoint0 STALL status 0
3 Endpoint1 STALL status 0
6
AT43312
Set to 0 or 1 by a Set_Configuration Request
0
Hub is not currently configured
1
Hub is currently configured
Set to 0 or 1 by ClearFeature or SetFeature request. Default value is 0.
0
Hub is currently not enabled to request remote wakeup
1
Hub is currently enabled to request remote wakeup
Endpoint0 is not stalled
1
Endpoint0 is stalled
Endpoint1 is not stalled
1
Endpoint1 is stalled
AT43312
Endpoint0
Endpoint0 is the AT 43312 ’s defa ult endpoin t used for enumeration of the Hub and exchange of configuration information and requests between the Host and the AT43312.
Endpoint0 supports control transfers.
The Hub Controller supports the following descriptors:
Device Descriptor, Configuration Descriptor, Interface
Descriptor, Endpoint Descriptor, and Hub Descriptor.
These Descriptors are de scribed in detail on page 9
through page 16 of this documen t. Standar d USB Device
Requests and class-specific Hub Requests are also supported through Endpoint0. There is no endpoint descriptor
for Endpoint0.
Status Change Register
Bit Function Value Meaning
0 Hub status change 0
1 Port1 status ch ange 0
2 Port2 status ch ange 0
3 Port3 status ch ange 0
No change i n status
1
Change in s tatus detected
No change i n status
1
Change in s tatus detected
No change i n status
1
Change in s tatus detected
No change i n status
1
Change in s tatus detected
Endpoint1
Endpoint1, an interrupt endpoint, is used by the Hub Controller to send status change information to the Host.
The Hub Controller samples the changes at the end of
every frame at time marker EO F2 in preparation for a
potential data transfer in the subsequent frame. The sampled information is stored in a byte-wide register, the Status
,
Change Register
Each bit in the Status Change Register
using a bitmap scheme.
corresponds to one
port as shown below:
4 Port4 status ch ange 0
5-7 Reserved 000 Default v alues
No change i n status
1
Change in s tatus detected
An IN Token packet from t he Ho st t o En dpo int 1 in di cat es a
request for port cha nge s tatus. If the Hub has not d etecte d
any change on its ports, nor any changes in itself, then all
bits in this register will be 0 and the Hub Controller will
return a NAK to requests on End point1 . If any o f bits 0 -4 is
1, the Hub Control ler will tra nsfer th e whole byte. The Hu b
Controller will continue to report a status change when
polled until that particular change has been removed by a
Clear_Port_Featu re request from the Host . No status
change will be reported by Endpoint1 until th e AT43312
has been enumerated and co nfigured by the Host via
Endpoint0.
7
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