• Downstream Support for Full Speed and Low Speed Transfer Rates
• Continual Monitoring of Port by System Host
• Individual Port Power Control
• USB Connection Status Indicators
• 6 MHz Oscillator with On-Chip PLL
Description
The AT43310 is a fully compliant USB hub chip with 5 ports, one upstream port and
four full/low-speed d ownstrea m por ts. The AT4331 0 can be us ed as a stand alone or
can provide a simple and quick method of adding USB ports to an existing device.
As a repeater, the AT43310 provides upstream connectivity between the selected
function and the hos t. Con nec ti vi ty i nv olv es s et ting up and tearing do wn co nne cti ons ,
handling bus faults, recovering from bus faults and detecting downstream device connections and disconnections.
The AT43310 may also act as a hub con troller managing the hub operations and
recording the status of the hub, bus transactions, and downstream ports. In this mode,
the AT43310 tracks and gene rates the bu s enumer ation , provide s confi guratio n infor mation to the host, prov ides indivi dual port stat us to the host, an d controls the port
operation based on host commands.
Note:This document assumes that the reader is familiar with the Universal Serial Bus and therefore only describes the unique fea-
tures of the AT43310 chip. For detailed information about the USB and its operation, the reader should refer to the Universal
Serial Bus Specification Version 1.0, January 19, 1996.
2
AT43310
AT43310
Pin Description
Pin DescriptionPin TypeDescription
OSC1IOscillator Input. Input to the inverting 6 MHz oscillator amplifier.
OSC2OOscillator Output. Output of the inverting oscillator amplifier.
LFTI
VREFIReference Voltage. This is an input pin that should be connected to an external
DP0BUpstream Plus USB I/O. This pin should be connected to VCC3 through an external
DM0BUpstream Minus USB I/O
DP[1:4]BPort Plus USB I/O. These pins should be connected to VSS through external 1.5K Ω
DM[1:4]B
OVL[1:4]
PWR[1:4]
IPort Overload. These are the input signals used to indicate to the AT43310 that there
ODPower Switch. These are the output signals used to enable or disable the external
PLL Filter. For proper operation of the PLL, this pin should be connected through a
100 Ω resistor and 10 nF capacitor to ground (V
(see Figure 1–Power Supply Connection).
voltage source. VREF is used internally as the reference voltage by the overload
protection circuit to decide whether there is a problem with a port’s power supply.
1.5K Ω pullup resistor. DP0 and DM0 form the full speed differential signal pin pairs
connected to the Host Controller or an upstream Hub.
resistors. DP[1:4] and DM[1:4] are the differential signal pin pairs to connect
downstream USB devices.
Port Minus USB I/O. These pins should be connected to VSS through external 15K Ω
resistors. DP[1:4] and DM[1:4] are the differential signal pin pairs to connect
downstream USB devices.
is a power supply problem with the port. If OVL
the corresponding PWR[1:4]
voltage regulator supplying power to the port. PWR[1:4]
supply problem is detected at OVL[1:4]
For proper operation of PWR[1:4]
required.
pin and report the status to the USB Host.
.
, an external pull-up resistor of 10K Ω to VCC5 is
) in parallel with a 2.2 nF capacitor
SS
is asserted, the AT43310 will assert
is de-asserted when a power
STAT[1:4]
V
CC3
V
CC5
V
CCA
GNDVGround
OConnect Status. These are output pins indicating that a port is properly connected.
STAT[1:4]
V3.3V Power Supply, used for the USB interface
V5V Power Supply, main power supply for the AT43310
V5V Analog Power Supply
is asserted when the port is enabled.
3
USB Hub Description
Hub Repeater
The hub repeater i s respo nsible for port co nnectivi ty setup
and tear-down. The repeater also supports exception handling such as bus fault detection and re covery, and connect/disconnect detection.
When a SOP token is detec ted on the upstream port ,
Port0, the AT43310 dete rmines the s peed of the transfer.
A USB hub must not propagate a full speed transfer to a
low speed port due to the possible misinterpretation of the
data. The AT43310 will propagate the packet to all enabled
downstream ports.
Note:
See USB Specification for further detail on bus
states
The AT43310 supports downstream data signaling at both
1.5 Mbps and 12 Mbps. Devic es attached to the downstream ports are either full speed or low speed depending
on which data line (DP or DM) is pulled hi gh. If a por t is
enumerated as low speed, the output buffers operate at a
slew rate between 75 ns and 300 ns. The AT43310 wi ll not
propagate any traffic to that port unless it is prefaced with a
preamble PID. Low speed d ata foll owing th e preambl e PID
is propagated to both low and full speed devices. The
AT43310 will enable low speed drivers within four fullspeed bit time s of the la st bit of a preamb le PID, an d will
disable the driv ers at the end of an E OP. The upstr eam
traffic from any port t o the host is p ropagated by Po rt0
using the full speed 4-20 ns slew rate drivers.
All ports are independently driven and monitored on the DP
and DM pins. The AT43310 detects or generates the ‘J’,
‘K’, and SE 0 bus signal ing st ates. E ach hu b port has s ingle-ended and differential receivers on its DP and DM lines.
The ports’ I/O buffers comply to the voltage levels and drive
requirements as specified in the USB Specifications Revision 1.0.
The Hub Repeater implements a frame timer that is timed
by the 12 MHz USB clock and is reset every time an SOF
token is received from the Host.
Hub Controller
The hub control ler man ages an d recor ds the operati ons of
the AT43310. During enumeration, the contro ller send s the
host the configuration information. The controller also
allows the host to re trieve the stat us of the downstre am
ports, and power the downs tream ports. The contr oller
applies power to the do wns tream por ts on a pe r por t ba si s.
After configuration , the c ontrol le r will e nab le the power to a
downstream port upon a SetPortPower command by the
host. The controller supports two endpoints and a Control
Status register.
Serial Interface Engine
The Serial Interface Engine (SIE) converts data between
the serialized USB format and usable data for the controller
and repeater. To carry out these tasks, the SIE is able to
detect or generate USB signaling. Once a valid operation is
detected, the SIE translates the data depending on the
operation.
During a reception, the SIE will use the high speed clock
supplied by the PLL to help synchronize and separate the
synchronization i nformatio n from th e data. T he data mu st
be decoded before the SIE may supply the packet ID to the
controller and repeater.
The USB protocol uses Cyclical Redundancy Check
(CRC), Non Return to Zero Invert (NRZI) d ata encoding
and bit stuffing to im prove th e reli ability of data trans fers.
The SIE must decode the NRZI and strip off the stuffed bit
to determine the actual data. The CRC information will be
used by the SIE to determine if a transmis sion error has
occurred. If an error has occurred, the SIE will corr ect the
data using CRC algorithms.
Control Status Register
BitFunctionValueDescription
0Hub configuration status
1Hub remote wakeup status
2Endpoint0 STALL status0
3Endpoint1 STALL status0
4
AT43310
0
1
0
1
1
1
Set to 0 or 1 by a Set_Configuration Request
Set to 0 or 1 by ClearFeature or SetFeature request
Default value is 0
Endpoint0 is stalled
Endpoint0 is stalled
Endpoint1 is not stalled
Endpoint1 is stalled
Hub is not currently configured
Hub is currently configured
Hub is currently not enabled to request remote wakeup
Hub is currently enables to request remote wakeup
AT43310
Endpoint0
Endpoint0 is the A T43310’ s defaul t endpoin t used for enumeration of the Hub and exchange of configuration information and requests between the Host and the AT43310.
Endpoint0 supports control transfers.
Standard USB Device Requests and class-specific Hub
Requests are supported through Endpoint0.
The Hub Controller supports the fol lowing descriptors
through Endpoint0 (Descriptors are described in detail in
the Descriptors Section of this document):
• Device Descriptor
• Configuration Descriptor
• Interface Descriptor
• Endpoint Descriptor
• Hub Descriptor
Endpoint1
Endpoint1 is used by the Hub Controller to send status
change information to th e Host. Endpoint1 supports interrupt transfers.
The Hub Controll er samples th e changes at the end of
every frame at time marker EO F2 in preparation for a
potential data transfer in the subsequent frame. The sampled information is store d as a by te in S tatus C hange Re gister using a bitmap scheme.
Each bit in the Status Chan ge Reg ister co rres po nds to one
port as shown below.
An IN Token packet from the Hos t to E nd poi nt1 ind icate s a
request for port change status. If the Hub has not detected
any change on the por ts or a ny cha nges in the hub itself ,
then all bits in this re giste r will be 0 and th e Hub Contro ller
will return a NAK to requests on Endpoint1. If a change in
the port status exists, the Hub Controller will transfer the
whole byte. The Hub Controller will continue to report a status change when polled until that particular change has
been removed by a Clea rPortFeature reques t from the
Host. No status change will be reported by Endpoint1 until
the AT43310 has been enumerated and configured by the
Host through Endpoint0.
Power Management
A hub is allowed to draw up to 500 mA from the host or
upstream hub. The AT4 3310’s i tsel f and its ex tern al circu it
except for the downstream ports consume less than 100
mA. Therefore 100 mA is available for e ach of the hub’s
downstream devices. The power supplied to each port is
individually monitored and controlled by AT43310.
The USB specifications requires that the voltage drop at
the power switch be no more than 10 0 mV. Caref ul design
and selection of the pow er swi tch is req uired to meet this
specifications . This is best achie ved by using a MO SFET
switch with a very low on resistance. If the port power are
switched individuallly, this resistance must be 1Ω or less
under the worst case cond ition to assure that even if a
downstream device dissipates 100mA the drop across the
switch is less than 100 mV. If the downstream devices are
switched in common, the switch resis tance must be no
more than 250mΩ.
A suitable MOSFET switch for a AT43310 based hub is a P
channel enhanc ement mode MOSF ET. The conditio n of
the port’s power is monitored at the output side of the
PMOS switch which is connected to the port’s OVLx# pin.
Whenever an overcurrent condition occurs, the MOSFET
switch’s internal resistance c auses the output volta ge to
drop. If the MOSFET’s output voltage drops to less than the
voltage at the VREF voltage reference pin, the AT43310
interpretes this as an overcurrent condition. The AT43310
does internal filte ring to make sure that spur ious or swi tching transients are ignored. If a true overcurrent condition
Status Change Register
BitFunctionValueMeaning
0Hub status change0
1
1Port1 status change0
1
2Port2 status change
3Port3 status change
4Port4 status change
5-7Reserved0Default values
0
1
0
1
0
1
No change in status
Change in status detected
No change in status
Change in status detected
No change in status
Change in status detected
No change in status
Change in status detected
No change in status
Change in status detected
5
Figure 1.
Power Supply Connection
exists, AT43310 re moves the power from that port by deactivating the port’s PWRx# pin and reports the condition to
the Host.
Figure 1 shows an example of the power supply connection
for a typical AT43310 port.
Port [1:4] Power Control
Each port has signals for port power management and for
port status feedback (PWR[1:4]
The AT43310 monitors and switches the power to each
port individually.
PWR[1:4]
the downstream ports. The AT43310 asserts a low value to
ports PWR[1:4]
power up, reset, and initialization of the Hub, PWR[1:4]
in-active. PWR[1:4 ]
Hub to power the port through the SetPortPower = ON
command. Additionally PWR[1:4]
when an overcurrent condition is detected at the port.
For proper operation of PWR[1:4]
tor to V
power to the port, any switch with a low voltage drop with
full power appl ied is a ccepta ble. The A T43 310 is des igned
for a simple , low cost P -channel MOSFET to use a s the
switch.
To detect a port overload, the AT43310 compares OVL[1:4]
to a common VREF defined by the designer.
are open drain outputs that control the power to
to turn on the power to the port. During
is asserted when the Hos t i ns truc ts the
is required for PWR[1:4] pins. To control the
CC5
, OVL[1:4], and STAT[1:4]).
is
is de-asserted by the Hub
, an external pull-up resis-
OVL[1:4]
respective downstream po rt. If OVL[1:4]
reference voltage VREF for more than 1 ms, the AT43310
treats the drop in voltage as a fault condition on the port’s
power supply. Upon this fault condition, the AT43310 sets
the port’s PORT_OVER_CURRENT status bit and the
port’s C_PORT_OVER_CURRENT bit. The AT43310 will
additionally shut off the power to the port by de-activating
the port’s PWR[1:4]
The STAT [1:4]
tion. STAT[1:4]
device is properly connected to the port. An LED and series
resistor connected to STAT[1:4]
visual feedback. The default state of STAT[1:4]
After a port is enabled AT43310 will assert the port’s
STAT[1:4]
should be attached to the power supply of the
drops below the
signal.
pins are not required by the USB specifica-
provide feedback to the user whenever a
can be used to provide
is inactive.
.
Oscillator and Phase-Locked-Loop
To reduce EMI and power dissip ation in the system, the
AT43310 on-chip oscillator is designed to operate with a 6
MHz external crystal. An on-chip PLL generates the high
frequency for the clock/data separator of the Serial Interface Engine. In the suspe nded state, the oscillato r circuitr y
is turned off.
A 6 MHz parallel resonance quartz crystal with a load
capacitance of approximately 10 pF is recommended. If the
crystal load capacitor is larger, external capacitors added to
6
AT43310
AT43310
pins OSC1 and OSC2 are recommended. The values for
these capacitors depends on th e crystal and the layout o f
the board, but typically are 33 pF at OSC1 a nd 47 pF at
OSC2. If the crystal used cannot tolerate the drive levels of
the oscillator, a series resistor between OSC2 and the crystal pin may be used.
Figure 2 shows how to properly connect the oscillator for
the AT43310. Ceramic resonators are not recommended
due to the frequency stability required by the USB specification (0.25%).
If desired, the cloc k can be ex ternally sourc ed. To clock
externally, connect the clock source to the OSC1 pin, while
leaving the OSC2 pin floating. The switching level at the
OSC1 pin can be as lo w as 0.47 V (see e lectric al spec ifications). A CMOS d ev ice is required to drive thi s pi n to m ai ntain good noise margins at the low switching level.
For proper operation of the PLL, see Figure 2-Ocscillator
and PLL Connection.
To provide the best operating condition for the AT43310,
careful consideration of the power supply connections are
Figure 2.
Oscillator and PLL Connection
recommended. Use short, low impedance connections to
, V
, V
all power supply lines: V
µF decoupling capacitors of high quality adjacent to the
device pins.
CC5
CC3
, and VSS with 0.1
CCA
Descriptors
The Hub Controller supports the following standard USB
descriptors: Dev ice, Conf igurat ion, Interf ace, and E ndpoint
Descriptors, as well as th e class sp ecific Hub Descrip tor.
All the required Standard Requests and Hub Class-Specific
Requests are supported by the AT43310’s Hub Controller.
7
Device Descriptor
The Device Descriptor provides general information about the AT43310 Hub.
OffsetFieldDescriptionSize (bytes)Value
0bLengthDefine size of descriptor = 18 bytes112H
1bDescriptorTypeDevice descriptor type100H
2bcdUSBUSB Spec. Release Number = Rev 1.0200H