The AT27LV256A is a high-performance, low-power, low-voltage 262,144-bit onetime programmable read-only memory (OTP EPROM) organized as 32K by 8 bits. It
requires only one supply in the range of 3.0V to 3.6V in normal read mode operation,
making it ideal for fast, portable systems using battery power.
Atmel’s innovative design techniques provide fast speeds that rival 5V parts while
keeping the low power consumption of a 3.3V supply. At V
accessed in less than 55 ns. With a typical power dissipation of only 18 mW at 5 MHz
and V
dard 5V EPROM. Standby mode supply current is typically less than 1 µA at 3.3V.
The AT27LV256A is available in industry-standard JEDEC-approved one-time
programmable (OTP) plastic PLCC, SOIC and TSOP packages. All devices feature
two-line control (CE
The AT27LV256A operating with V
compatible with standard TTL logic devices operating at V
also capable of standard 5-volt operation making it ideally suited for dual supply range
systems or card products that are pluggable in both 3-volt and 5-volt hosts.
Atmel’s AT27LV256A has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program
the part and guarantees reliable programming. Programming time is typically only
100 µs/byte. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry-standard programming
equipment to select the proper programming algorithms and voltages. The
AT27LV256A programs exactly the same way as a standard 5V AT27C256R and
uses the same programming equipment.
= 3.3V, the AT27LV256A consumes less than one fifth the power of a stan-
CC
, OE) to give designers the flexibility to prevent bus contention.
at 3.0V produces TTL level outputs that are
CC
= 3.0V, any byte can be
CC
= 5.0V. The device is
CC
0547G–EPROM–12/07
2.Pin Configurations
Pin NameFunction
A0 - A14Addresses
O0 - O7Outputs
CE
OE
NCNo Connect
Chip Enable
Output Enable
AT27LV256A
2.128-lead SOIC Top View
VPP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
2.232-lead PLCC Top View
A7
A12
A6
A5
A4
A3
A2
A1
A0
NC
O0
VPPNCVCC
432
5
6
7
8
9
10
11
12
13
14151617181920
1
323130
A14
A13
29
28
27
26
25
24
23
22
21
VCC
A14
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
A8
A9
A11
NC
OE
A10
CE
O7
O6
2.328-lead TSOP (Type 1) Top View
22
OE
A11
A9
A8
A13
A14
VCC
VPP
A12
A7
A6
A5
A4
A3
23
24
25
26
27
28
1
2
3
4
5
6
7
21
20
19
18
17
16
15
14
13
12
11
10
A10
CE
O7
O6
O5
O4
O3
GND
O2
O1
O0
A0
9
A1
8
A2
O1
O2
GND
O3O4O5
NC
Note:1. PLCC Package Pins 1 and 17 are Don’t Connect.
0547G–EPROM–12/07
2
3.System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
close as possible to the point where the power supply is connected to the array.
4.Block Diagram
AT27LV256A
and Ground terminals of the device, as close
CC
and Ground terminals. This capacitor should be positioned as
CC
5.Absolute Maximum Ratings*
Temperature Under Bias.................................. -40°C to +85°C
Storage Temperature..................................... -65°C to +125°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
Note:1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
V
+ 0.75V DC which may be exceeded if certain precautions are observed (consult application notes) and which may
CC
overshoot to +7.0V for pulses of less than 20 ns.
(1)
(1)
(1)
*NOTICE:Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
0547G–EPROM–12/07
3
6.Operating Modes
Mode/PinCEOEAiV
(2)
Read
Output Disable
Standby
Rapid Program
PGM Verify
(2)
(2)
(3)
(3)
Optional PGM Verify
PGM Inhibit
(3)
Product Identification
(3)
(3)(5)
V
V
V
V
X
V
V
V
IL
IL
IH
IL
(1)
IL
IH
IL
V
V
X
V
V
V
V
V
IL
IH
(1)
IH
IL
IL
IH
IL
AiV
(1)
X
(1)
X
AiV
AiV
AiV
(1)
X
A9 = V
(4)
H
A0 = VIH or VIL
A1 - A14 = V
IL
V
PP
CC
V
CC
V
CC
PP
PP
CC
V
PP
CC
Notes:1. X can be VIL or VIH.
2. Read, output disable, and standby modes require, 3.0V ≤ V