ATMEL AT27LV040A User Manual

BDTIC www.BDTIC.com/ATMEL

Features

•Fast Read Access Time – 90 ns

•Dual Voltage Range Operation

–Low Voltage Power Supply Range, 3.0V to 3.6V or Standard 5V ± 10% Supply Range

•Compatible With JEDEC Standard AT27C040

•Low Power 3.3-volt CMOS Operation

–20 µA Max (Less than 1 µA Typical) Standby for VCC = 3.6V

–36 mW Max Active at 5 MHz for VCC = 3.6V

•JEDEC Standard Packages

–32-lead PLCC

–32-lead TSOP

–32-lead VSOP

•High Reliability CMOS Technology

–2,000V ESD Protection

–200 mA Latchup Immunity

•Rapid Programming Algorithm – 100 µs/Byte (Typical)

•CMOS and TTL Compatible Inputs and Outputs

–JEDEC Standard for LVTTL

•Integrated Product Identification Code

•Industrial Temperature Range

•Green (Pb/Halide-free) Packaging Option

1. Description

The AT27LV040A is a high-performance, low-power, low-voltage, 4,194,304-bit onetime programmable read-only memory (OTP EPROM) organized as 512K by 8 bits. It requires only one supply in the range of 3.0 to 3.6V in normal read mode operation, making it ideal for fast, portable systems using battery power.

Atmel’s innovative design techniques provide fast speeds that rival 5V parts while keeping the low power consumption of a 3V supply. At VCC = 3.0V, any byte can be accessed in less than 90 ns. With a typical power dissipation of only 18 mW at 5 MHz and VCC = 3.3V, the AT27LV040A consumes less than one half the power of a standard 5V EPROM. Standby mode supply current is typically less than 1 µA at 3.3V.

The AT27LV040A is available in industry-standard JEDEC-approved one-time programmable (OTP) plastic PLCC, TSOP, and VSOP packages. All devices feature twoline control (CE, OE) to give designers the flexibility to prevent bus contention.

The AT27LV040A operating with VCC at 3.0V produces TTL level outputs that are compatible with standard TTL logic devices operating at VCC = 5.0V. The device is also capable of standard 5-volt operation making it ideally suited for dual supply range systems or card products that are pluggable in both 3-volt and 5-volt hosts.

Atmel’s AT27LV040A has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry-standard programming equipment to select the proper programming algorithms and voltages. The AT27LV040A programs exactly the same way as a standard 5V AT27C040 and uses the same programming equipment.

4-Megabit

(512K x 8) Low Voltage OTP EPROM

AT27LV040A

0557D–EPROM–12/07

2. Pin Configurations

	Pin Name			Function
	A0 - A18			Addresses
	O0 - O7			Outputs
				Chip Enable
	CE
				Output Enable
	OE

2.132-lead TSOP/VSOP (Type 1) Top View

A11	1			OE
		32
A9	2	31		A10
A8	3	30		CE
A13	4	29		O7
A14	5	28		O6
A17	6	27		O5
A18	7	26		O4
VCC	8	25		O3
VPP	9	24		GND
A16	10	23		02
A15	11	22		01
A12	12	21		O0
A7	13	20		A0
A6	14	19		A1
A5	15	18		A2
A4	16	17		A3

2.232-lead PLCC Top View

	A12
	4
A7	5
A6	6
A5	7
A4	8
A3	9
A2	10
A1	11
A0	12
O0	13
	14
	O1

A15	A16	VPP	VCC	A18
3	2	1	32	31

15	16	17	18	19
O2	GND	O3	O4	O5

A17
30	A14
29
28	A13
27	A8
26	A9
25	A11
24
	OE
23	A10
22
	CE
21	O7
20
O6

2 AT27LV040A

0557D–EPROM–12/07

AT27LV040A

3. System Considerations

Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array.

4. Block Diagram

5.	Absolute Maximum Ratings*
Temperature Under Bias		.................................. -40°C to +85°C	*NOTICE: Stresses beyond those listed under “Absolute
			Maximum Ratings” may cause permanent dam-
Storage Temperature .....................................		-65°C to +125°C	age to the device. This is a stress rating only and
			functional operation of the device at these or any
Voltage on Any Pin with		-2.0V to +7.0V(1)	other conditions beyond those indicated in the
Respect to Ground .........................................			operational sections of this specification is not
Voltage on A9 with			implied. Exposure to absolute maximum rating
		- 2.0V to +14.0V(1)	conditions for extended periods may affect
Respect to Ground ......................................			device reliability
VPP Supply Voltage with		- 2.0V to +14.0V(1)
Respect to Ground .......................................
Note:	1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
	VCC + 0.75V DC which may be exceeded if certain precautions are observed (consult application notes) and which may
	overshoot to +7.0V for pulses of less than 20 ns.

3

0557D–EPROM–12/07

6. Operating Modes

Mode/Pin

CE

OE

Ai

VPP

VCC

Outputs

Read(2)

V

IL

V

IL

Ai

X(1)

V

D

CC

OUT

Output Disable(2)

X

V

IH

X

X

V

High Z

CC

Standby(2)

V

IH

X

X

X

V

High Z

CC

Rapid Program(3)

V

IL

V

IH

Ai

V

PP

V

D

CC

IN

PGM Verify(3)

X

V

IL

Ai

V

PP

V

D

CC

OUT

PGM Inhibit(3)

V

IH

V

IH

X

V

PP

V

High Z

CC

A9 = V (4)

Product Identification(3)(5)

H

V

IL

V

IL

A0 = V

IH

or V

IL

X

V

Identification Code

CC

A1 - A18 = VIL

Notes: 1. X can be VIL or VIH.

2.Read, output disable, and standby modes require, 3.0V ≤VCC ≤3.6V, or 4.5V ≤VCC ≤5.5V.

3.Refer to Programming Characteristics. Programming modes require VCC = 6.5V.

4.VH = 12.0 ± 0.5V.

5.Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.

7.DC and AC Operating Conditions for Read Operation

AT27LV040A-90

Industrial Operating Temperature (Case)

-40°C - 85°C

3.0V to 3.6V

VCC Power Supply

5V ± 10%

4 AT27LV040A

0557D–EPROM–12/07

AT27LV040A

8. DC and Operating Characteristics for Read Operation

Symbol

Parameter

Condition

Min

Max

Units

VCC = 3.0V to 3.6V

ILI

Input Load Current

VIN = 0V to VCC

±1

µA

ILO

Output Leakage Current

VOUT = 0V to VCC

±5

µA

IPP1(2)

VPP(1) Read/Standby Current

VPP = VCC

10

µA

ISB1 (CMOS),

= VCC ± 0.3V

20

µA

ISB

VCC(1) Standby Current

CE

ISB2 (TTL), CE = 2.0 to VCC + 0.5V

100

µA

ICC

VCC Active Current

f = 5 MHz, IOUT = 0 mA,

= VIL

10

mA

CE

VIL

Input Low Voltage

-0.6

0.8

V

VIH

Input High Voltage

2.0

VCC + 0.5

V

VOL

Output Low Voltage

IOL = 2.0 mA

0.4

V

VOH

Output High Voltage

IOH = -2.0 mA

2.4

V

VCC = 4.5V to 5.5V

ILI

Input Load Current

VIN = 0V to VCC

±1

µA

ILO

Output Leakage Current

VOUT = 0V to VCC

±5

µA

IPP1(2)

VPP(1) Read/Standby Current

VPP = VCC

10

µA

ISB1 (CMOS),

= VCC ± 0.3V

100

µA

ISB

VCC(1) Standby Current

CE

ISB2 (TTL), CE = 2.0 to VCC + 0.5V

1

mA

ICC

VCC Active Current

f = 5 MHz, IOUT = 0 mA,

= VIL

30

mA

CE

VIL

Input Low Voltage

-0.6

0.8

V

VIH

Input High Voltage

2.0

VCC + 0.5

V

VOL

Output Low Voltage

IOL = 2.1 mA

0.4

V

VOH

Output High Voltage

IOH = -400 µA

2.4

V

Notes: 1. VCC must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP.

2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP.

5

0557D–EPROM–12/07