BDTIC www.BDTIC.com/ATMEL
Features
• Fast Read Access Time – 120 ns, see AT27BV020 for Faster Speeds
• Dual Voltage Range Operation
– Low Voltage Power Supply Range, 3.0V to 3.6V
or Standard 5V ± 10% Supply Range
• Compatible with JEDEC Standard AT27C020
• Low Power CMOS Operation
– 20 µA Max (Less than 1 µA Typical) Standby for V
– 29 mW Max Active at 5 MHz for V
• JEDEC Standard Packages
– 32-lead PLCC
– 32-lead TSOP
– 32-lead VSOP
• High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
• Rapid Programming Algorithm – 100 µs/Byte (Typical)
• Two-line Control
• CMOS and TTL Compatible Inputs and Outputs
– JEDEC Standard for LVTTL
• Integrated Product Identification Code
• Industrial Temperature Range
• Green (Pb/Halide-free) Packaging Option
= 3.6V
CC
= 3.6V
CC
2-Megabit
(256K x 8)
Low Voltage
OTP EPROM
AT27LV020A
1. Description
The AT27LV020A is a high-performance, low-power, low-voltage 2,097,152 bit onetime programmable read-only memory (OTP EPROM) organized as 256K by 8 bits. It
requires only one supply in the range of 3.0 to 3.6V in normal read mode operation,
making it ideal for fast, portable systems using battery power.
Atmel’s innovative design techniques provide fast speeds that rival 5V parts while
keeping the low power consumption of a 3V supply. At V
accessed in less than 120 ns. With a typical power dissipation of only 18 mW at 5 MHz
and V
dard 5V EPROM. Standby mode supply current is typically less than 1 µA at 3.3V.
The AT27LV020A is available in industry-standard JEDEC approved one-time programmable (OTP) plastic PLCC, TSOP, and VSOP. All devices feature two-line
control (CE
The AT27LV020A operating with V
compatible with standard TTL logic devices operating at V
also capable of standard 5-volt operation making it ideally suited for dual supply range
systems or card products that are pluggable in both 3-volt and 5-volt hosts.
Atmel's AT27LV020A has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program
the part and guarantees reliable programming. Programming time is typically only
100 µs/byte. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry standard programming
equipment to select the proper programming algorithms and voltages. The
AT27LV020A programs exactly the same way as a standard 5V AT27C020 and uses
the same programming equipment.
= 3.3V, the AT27LV020A consumes less than one fifth the power of a stan-
CC
, OE) to give designers the flexibility to prevent bus contention.
at 3.0V produces TTL level outputs that are
CC
= 3.0V, any byte can be
CC
= 5.0V. The device is
CC
0549G–EPROM–12/07
2. Pin Configurations
Pin Name Function
A0 - A17 Addresses
O0 - O7 Outputs
CE
OE
PGM
NC No Connect
2.1 32-lead TSOP/VSOP (Type 1) Top View
A11
A9
A8
A13
A14
A17
PGM
VCC
VPP
A16
A15
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Chip Enable
Output Enable
Program Strobe
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
O7
O6
O5
O4
O3
GND
02
01
O0
A0
A1
A2
A3
2.2 32-lead PLCC – Top View
2
AT27LV020A
A7
A6
A5
A4
A3
A2
A1
A0
O0
A12
A15
A16
VPP
432
5
6
7
8
9
10
11
12
13
14151617181920
O1
O2
1
O3O4O5
GND
VCC
PGM
A17
323130
29
28
27
26
25
24
23
22
21
O6
A14
A13
A8
A9
A11
OE
A10
CE
O7
0549G–EPROM–12/07
3. System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient
voltage excursions. Unless accommodated by the system design, these transients may exceed
datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency,
low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor
should be connected between the V
device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards
with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the V
possible to the point where the power supply is connected to the array.
4. Block Diagram
AT27LV020A
and Ground terminals of the device, as close to the
CC
and Ground terminals. This capacitor should be positioned as close as
CC
5. Absolute Maximum Ratings*
Temperature Under Bias................................. -40° C to +85° C
Storage Temperature .................................... -65° C to +125° C
Voltage on any Pin with
with Respect to Ground ..................................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground .......................................-2.0V to +14.0V
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
Notes: 1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
+ 0.75V DC which may be exceeded if certain precautions are observed (consult application notes) and which may
V
CC
overshoot to +7.0V for pulses of less than 20 ns.
(1)
(1)
(1)
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
0549G–EPROM–12/07
3
6. Operating Modes
Mode/Pin CE OE PGM Ai V
(2)
Read
Output Disable
Standby
Rapid Program
PGM Verify
PGM Inhibit
(2)
(2)
(3)
(3)
(3)
Product Identification
(3)(5)
V
IL
V
IL
XVIHXX XVCCHigh Z
V
IH
V
IL
V
IL
V
IH
V
IL
XX X X V
V
IH
V
IL
XX X VPPV
V
IL
(1)
X
V
IL
V
IH
X
Ai X V
Ai V
Ai V
A9 = V
A0 = VIH or V
A1 - A17 = V
(4)
H
IL
IL
PP
PP
PP
XVCCIdentification Code
V
CC
CC
CC
V
CC
V
CC
CC
Notes: 1. X can be VIL or VIH.
2. Read, output disable, and standby modes require, 3.0V ≤ V
3. Refer to Programming Characteristics. Programming modes require V
≤ 3.6V, or 4.5V ≤ VCC ≤ 5.5V.
CC
= 6.5V.
CC
4. VH = 12.0 ± 0.5V.
5. Two identifier bytes may be selected. All Ai inputs are held low (V
), except A9 which is set to VH and A0 which is toggled
IL
low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
7. DC and AC Operating Conditions for Read Operation
AT27LV020A-12
Industrial Operating Temperature (Case) -40° C - 85° C
Outputs
D
OUT
High Z
D
IN
D
OUT
High Z
VCC Power Supply
3.0V to 3.6V
5V ± 10%
4
AT27LV020A
0549G–EPROM–12/07
AT27LV020A
8. DC and Operating Characteristics for Read Operation
Symbol Parameter Condition Min Max Units
= 3.0V to 3.6V
V
CC
I
LI
I
LO
(2)
I
PP1
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
= 4.5V to 5.5V
V
CC
I
LI
I
LO
(2)
I
PP1
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Input Load Current VIN = 0V to V
Output Leakage Current V
Read/Standby Current
VCC Standby Current
(1)
(1)
= 0V to V
OUT
VPP = V
I
(CMOS), CE = V
SB1
(TTL), CE = 2.0 to VCC + 0.5V 100 µA
I
SB2
VCC Active Current f = 5 MHz, I
CC
CC
CC
= 0 mA, CE = V
OUT
± 0.3V 20 µA
CC
IL
Input Low Voltage -0.6 0.8 V
Input High Voltage 2.0 VCC + 0.5 V
Output Low Voltage IOL = 2.0 mA 0.4 V
Output High Voltage IOH = -2.0 mA 2.4 V
Input Load Current VIN = 0V to V
Output Leakage Current V
Read/Standby Current
VCC Standby Current
(1)
(1)
= 0V to V
OUT
VPP = V
I
(CMOS), CE = VCC ± 0.3V 100 µA
SB1
I
(TTL), CE = 2.0 to VCC + 0.5V 1 mA
SB2
VCC Active Current f = 5 MHz, I
CC
CC
CC
= 0 mA, CE = V
OUT
IL
Input Low Voltage -0.6 0.8 V
Input High Voltage 2.0 VCC + 0.5 V
Output Low Voltage IOL = 2.1 mA 0.4 V
Output High Voltage IOH = -400 µA 2.4 V
Notes: 1. VCC must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP.
2. V
may be connected directly to VCC, except during programming. The supply current would then be the sun of ICC and IPP.
PP
±1 µA
±5 µA
10 µA
8mA
±1 µA
±5 µA
10 µA
25 mA
0549G–EPROM–12/07
5
9. AC Characteristics for Read Operation
VCC = 3.0V to 3.6V and 4.5V to 5.5V
Symbol Parameter Condition
t
t
t
t
t
ACC
CE
OE
DF
OH
(3)
(2)
(2)(3)
(4)(5)
Address to Output Delay CE = OE = V
CE to Output Delay OE = V
OE to Output Delay CE = V
OE or CE High to Output Float, Whichever Occurred First 40 ns
Output Hold from Address, CE or OE, Whichever Occurred First 0 ns
10. AC Waveforms for Read Operation
AT27LV020A-12
UnitsMin Max
IL
IL
IL
120 ns
120 ns
50 ns
Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3. OE
may be delayed up to t
- tOE after the address is valid without impact on t
ACC
ACC
.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
6
AT27LV020A
0549G–EPROM–12/07
11. Input Test Waveform and Measurement Level
tR, tF < 20 ns (1% to 90%)
12. Output Test Load
Note: CL = 1 pF including jig capacitance.
AT27LV020A
13. Pin Capacitance
f = 1 MHz, T = 25° C
Symbol Typ Max Units Conditions
C
IN
C
OUT
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
(1)
48pFV
812pFV
IN
OUT
= 0V
= 0V
0549G–EPROM–12/07
7
14. Programming Waveforms
(1)
Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and t
3. When programming the AT27LV020A a 0.1 µF capacitor is required across V
transients.
are characteristics of the device but must be accommodated by the programmer.
DFP
and ground to suppress spurious voltage
PP
8
AT27LV020A
0549G–EPROM–12/07
15. DC Programming Characteristics
TA = 25 ± 5° C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Symbol Parameter Test Conditions
AT27LV020A
Limits
UnitsMin Max
I
V
V
V
V
I
I
V
LI
IL
IH
OL
OH
CC2
PP2
ID
Input Load Current V
= VIL, V
IN
IH
Input Low Level -0.6 0.8 V
Input High Level 2.0 VCC + 0.5 V
Output Low Voltage IOL = 2.1 mA 0.4 V
Output High Voltage IOH = -400 µA 2.4 V
VCC Supply Current (Program and Verify) 40 mA
VPP Supply Current CE = PGM = V
IL
A9 Product Identification Voltage 11.5 12.5 V
16. AC Programming Characteristics
TA = 25 ± 5° C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Symbol Parameter Test Conditions
t
AS
t
CES
t
OES
t
DS
t
AH
t
DH
t
DFP
t
VPS
t
VCS
t
PW
t
OE
t
PRT
Address Setup Time
CE Setup Time 2 µs
OE Setup Time 2 µs
Input Rise and Fall Times
Data Setup Time 2 µs
Address Hold Time 0 µs
Input Pulse Levels
Data Hold Time 2 µs
OE High to Output Float Delay
VPP Setup Time 2 µs
(3)
Input Timing Reference Level
VCC Setup Time 2 µs
PGM Program Pulse Width
(2)
Output Timing Reference Level
Data Valid from OE 150 ns
VPP Pulse Rise Time During
Programming
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.
2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven –
see timing diagram.
3. Program Pulse width tolerance is 100 µsec ± 5%.
(1)
2µs
(10% to 90%) 20 ns
0.45V to 2.4V
0130ns
0.8V to 2.0V
95 105 µs
0.8V to 2.0V
50 ns
±10 µA
20 mA
Limits
UnitsMin Max
17. Atmel’s AT27LV020A Integrated Product Identification Code
Pins
Codes
(1)
Hex
DataA0 O7 O6 O5 O4 O3 O2 O1 O0
Manufacturer 0 00011110 1E
Device Type 1 10000110 86
Note: 1. The AT27LV020A has the same Product Identification Code as the AT27C020. Both are programming compatible.
9
0549G–EPROM–12/07
18. Rapid Programming Algorithm
A 100 µs PGM pulse width is used to program. The address is set to the first location. VCC is
raised to 6.5V and V
PGM
pulse without verification. Then a verification/reprogramming loop is executed for each
address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are
applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been
applied, the part is considered failed. After the byte verifies properly, the next address is
selected until all have been checked. V
read again and compared with the original data to determine if the device passes or fails.
PP
is raised to 13.0V. Each address is first programmed with one 100 µs
is then lowered to 5.0V and V
PP
to 5.0V. All bytes are
CC
10
AT27LV020A
0549G–EPROM–12/07
19. Ordering Information
19.1 Standard Package
(mA)
I
CC
t
ACC
(ns)
120 8 0.02 AT27LV020A-12JI
VCC = 3.6V
Ordering Code Package Operation RangeActive Standby
AT27LV020A-12TI
AT27LV020A-12VI
32J
32T
32V
AT27LV020A
Industrial
(-40° C to 85° C)
(1)
Note:
Not recommended for new designs. Use Green package option.
19.2 Green Package Option (Pb/Halide-free)
(mA)
I
CC
= 3.6V
V
t
ACC
(ns)
120 8 0.02 AT27LV020A-12JU
Note: 1. The 32-lead VSOP package is not recommended for new designs.
CC
Ordering Code Package Operation RangeActive Standby
AT27LV020A-12TU
AT27LV020A-12VU
32J
32T
32V
Industrial
(-40° C to 85° C)
(1)
Package Type
32J 32-Lead, Plastic J-Leaded Chip Carrier (PLCC)
32T 32-Lead, Plastic Thin Small Outline Package (TSOP)
32V 32-Lead, Plastic Thin Small Outline Package (VSOP)
0549G–EPROM–12/07
11
20. Packaging Information
20.1 32J – PLCC
1.14(0.045) X 45˚
B
e
0.51(0.020)MAX
45˚ MAX (3X)
Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254 mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
3. Lead coplanarity is 0.004" (0.102 mm) maximum.
PIN NO. 1
IDENTIFIER
D1
D
D2
1.14(0.045) X 45˚
E1 E
0.318(0.0125)
0.191(0.0075)
E2
B1
A2
A1
A
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
A 3.175 – 3.556
A1 1.524 – 2.413
A2 0.381 – –
D 12.319 – 12.573
D1 11.354 – 11.506 Note 2
D2 9.906 – 10.922
E 14.859 – 15.113
E1 13.894 – 14.046 Note 2
E2 12.471 – 13.487
B 0.660 – 0.813
B1 0.330 – 0.533
e 1.270 TYP
MIN
NOM
MAX
NOTE
10/04/01
12
2325 Orchard Parkway
R
San Jose, CA 95131
AT27LV020A
TITLE
32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC)
DRAWING NO.
32J
0549G–EPROM–12/07
REV.
B
20.2 32T –TSOP
AT27LV020A
PIN 1
Pin 1 Identifier
D1
D
e
E
b
A2
A
SEATING PLANE
A1
Notes: 1. This package conforms to JEDEC reference MO-142, Variation BD.
2. Dimensions D1 and E do not include mold protrusion. Allowable
protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side.
3. Lead coplanarity is 0.10 mm maximum.
0º ~ 8º
L
COMMON DIMENSIONS
SYMBOL
A – – 1.20
A1 0.05 – 0.15
A2 0.95 1.00 1.05
D 19.80 20.00 20.20
D1 18.30 18.40 18.50 Note 2
E 7.90 8.00 8.10 Note 2
L 0.50 0.60 0.70
L1 0.25 BASIC
b 0.17 0.22 0.27
c 0.10 – 0.21
e 0.50 BASIC
c
L1
GAGE PLANE
(Unit of Measure = mm)
MIN
NOM
MAX
NOTE
2325 Orchard Parkway
R
San Jose, CA 95131
0549G–EPROM–12/07
TITLE
32T, 32-lead (8 x 20 mm Package) Plastic Thin Small Outline
Package, Type I (TSOP)
DRAWING NO.
32T
10/18/01
REV.
B
13
20.3 32V –VSOP
PIN 1
Pin 1 Identifier
D1
D
e
E
b
A2
A
SEATING PLANE
A1
Notes: 1. This package conforms to JEDEC reference MO-142, Variation BA.
2. Dimensions D1 and E do not include mold protrusion. Allowable
protrusion on E is 0.15 mm per side and on D1 is 0.25 mm per side.
3. Lead coplanarity is 0.10 mm maximum.
0º ~ 8º
L
COMMON DIMENSIONS
SYMBOL
A – – 1.20
A1 0.05 – 0.15
A2 0.95 1.00 1.05
D 13.80 14.00 14.20
D1 12.30 12.40 12.50 Note 2
E 7.90 8.00 8.10 Note 2
L 0.50 0.60 0.70
L1 0.25 BASIC
b 0.17 0.22 0.27
c 0.10 – 0.21
e 0.50 BASIC
c
L1
GAGE PLANE
(Unit of Measure = mm)
MIN
NOM
MAX
NOTE
14
2325 Orchard Parkway
R
San Jose, CA 95131
AT27LV020A
TITLE
32V, 32-lead (8 x 14 mm Package) Plastic Thin Small Outline
Package, Type I (VSOP)
DRAWING NO.
32V
0549G–EPROM–12/07
10/18/01
REV.
B
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