ATMEL AT27LV010A User Manual

BDTIC www.BDTIC.com/ATMEL

Features

• Fast Read Access Time – 55 ns

• Low Power CMOS Operation

– 100 µA Maximum Standby
– 40 mA Maximum Active at 5 MHz

• JEDEC Standard Packages

– 40-lead PDIP
– 44-lead PLCC
– 40-lead VSOP

• Direct Upgrade from 512-Kbit, 1-Mbit, and 2-Mbit

(AT27C516, AT27C1024, and AT27C2048) EPROMs

• 5V ± 10% Power Supply

• High Reliability CMOS Technology

– 2,000V ESD Protection
– 200 mA Latchup Immunity

• Rapid

• CMOS and TTL Compatible Inputs and Outputs

• Integrated Product Identification Code

• Industrial Temperature Range

• Green (Pb/Halide-free) Packaging Option

Programming Algorithm – 50 µs/Word (Typical)

4-Megabit
(256K x 16)
OTP EPROM

AT27C4096

1. Description

The AT27C4096 is a low-power, high-performance 4,194,304-bit one-time program­mable read-only memory (OTP EPROM) organized 256K by 16 bits. It requires a
single 5V power supply in normal read mode operation. Any word can be accessed in
less than 55 ns, eliminating the need for speed-reducing WAIT states. The x16 organi­zation makes this part ideal for high-performance 16- and 32-bit microprocessor
systems.

In read mode, the AT27C4096 typically consumes 15 mA. Standby mode supply cur­rent is typically less than 10 µA.

The AT27C4096 is available in industry-standard JEDEC-approved one-time pro­grammable (OTP) plastic PDIP, PLCC, and VSOP packages. The device features
two-line control (CE

With high density 256K word storage capability, the AT27C4096 allows firmware to be
stored reliably and to be accessed by the system without the delays of mass storage
media.

Atmel’s AT27C4096 has additional features that ensure high quality and efficient pro­duction use. The Rapid
the part and guarantees reliable programming. Programming time is typically only
50 µs/word. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry-standard programming
equipment to select the proper programming algorithms and voltages.

, OE) to eliminate bus contention in high-speed systems.

Programming Algorithm reduces the time required to program

0311I–EPROM–12/07

2. Pin Configurations

Pin Name Function

A0 - A17 Addresses

O0 - O15 Outputs

CE

OE

Chip Enable

Output Enable

NC No Connect

Note: Both GND pins must be connected.

2.1 44-lead PLCC Top View

O13

O14

O12
O11
O10

O9
O8

GND

NC

O7
O6
O5
O4

O15CEVPPNCVCC

65432

7
8
9
10
11
12
13
14
15
16
17

1819202122232425262728

O3O2O1

O0

OE

A17

A16

1

4443424140

A0A1A2A3A4

NC

A15

A14

39
38
37
36
35
34
33
32
31
30
29

A13
A12
A11
A10
A9
GND
NC
A8
A7
A6
A5

2.3 40-lead VSOP (Type 1) Top View

A10
A11
A12
A13
A14
A15
A16
A17

VCC

VPP

CE
O15
O14
O13
O12
O11
O10

O9

O8

1

A9

2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

GND

40

A8

39

A7

38

A6

37

A5

36

A4

35

A3

34

A2

33

A1

32

A0

31

OE

30

O0

29

O1

28

O2

27

O3

26

O4

25

O5

24

O6

23

O7

22

GND

21

2.2 40-lead PDIP Top View

1

VPP

2

CE

3

O15

4

O14

5

O13

6

O12

7

O11

8

O10

9

O9

10

O8

11

GND

12

O7

13

O6

14

O5

15

O4

16

O3

17

O2

18

O1

19

O0

20

OE

2

AT27C4096

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21

VCC
A17
A16
A15
A14
A13
A12
A11
A10
A9
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0

0311I–EPROM–12/07

3. System Considerations

Switching between active and standby conditions via the Chip Enable pin may produce tran­sient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
close as possible to the point where the power supply is connected to the array.

4. Block Diagram

AT27C4096

and Ground terminals of the device, as close

CC

and Ground terminals. This capacitor should be positioned as

CC

5. Absolute Maximum Ratings*

Temperature Under Bias............................... -55° C to +125° C

Storage Temperature .................................... -65° C to +150° C

Voltage on Any Pin with

Respect to Ground .........................................-2.0V to +7.0V

Voltage on A9 with

Respect to Ground ......................................-2.0V to +14.0V

VPP Supply Voltage with

Respect to Ground .......................................-2.0V to +14.0V

Note: 1. Maximum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is

+ 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns.

V

CC

(1)

(1)

(1)

*NOTICE: Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam­age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.

0311I–EPROM–12/07

3

6. Operating Modes

Mode/Pin CE OE Ai V

Read V

IL

Output Disable X V

Standby V

Rapid Program

(2)

PGM Verify V

PGM Inhibit V

Product Identification

(4)

IH

V

IL

IH

IH

V

IL

V

IL

IH

XX X

V

IH

V

IL

V

IH

V

IL

Ai X

X X High Z

Ai V

Ai V

XVPPHigh Z

A9 = V

(3)

H

A0 = VIH or VIL

A1 - A17 = V

IL

Notes: 1. X can be VIL or VIH.

2. Refer to the Programming characteristics.

3. V

= 12.0 ± 0.5V.

H

4. Two identifier words may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH, and A0, which is toggled
low (VIL) to select the Manufacturer’s Identification word and high (VIH) to select the Device Code word.

5. Standby V

current (ISB) is specified with VPP = VCC. VCC > VPP will cause a slight increase in ISB.

CC

7. DC and AC Operating Conditions for Read Operation

AT27C4096

-55 -90

V

PP

(1)

PP

PP

CC

Outputs

D

OUT

(5)

High Z

D

IN

D

OUT

Identification Code

Industrial Operating Temperature (Case) -40° C - 85° C-40° C - 85° C

Power Supply 5V ± 10% 5V ± 10%

V

CC

8. DC and Operating Characteristics for Read Operation

Symbol Parameter Condition Min Max Units

I

LI

I

LO

(2)

I

PP1

I

SB

I

CC

V

IL

V

IH

V

OL

V

OH

Notes: 1. V

Input Load Current VIN = 0V to V

Output Leakage Current V

(1)

V

Read/Standby Current VPP = V

PP

(1)

V

Standby Current

CC

= 0V to V

OUT

I

(CMOS)

SB1

CE = V

I

(TTL)

SB2

CC

CC

± 0.3V

CE = 2.0 to V

VCC Active Current f = 5 MHz, I

CC

CC

+ 0.5V

CC

= 0 mA, CE = V

OUT

IL

± 1µA

± 5µA

10 µA

100 µA

1mA

40 mA

Input Low Voltage -0.6 0.8 V

Input High Voltage 2.0 VCC + 0.5 V

Output Low Voltage IOL = 2.1 mA 0.4 V

Output High Voltage I

must be applied simultaneously or before VPP, and removed simultaneously or after VPP.

CC

2. V

may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP.

PP

= -400 µA 2.4 V

OH

4

AT27C4096

0311I–EPROM–12/07