ATMEL AT27C512R-90TI, AT27C512R-90TC, AT27C512R-90RI, AT27C512R-90RC, AT27C512R-90PI Datasheet

...
AT27C512R
512K (64K x 8) OTP CMOS EPROM
Features
0015H
Fast Read Access Ti me - 45 ns
Low Power CMOS Operation
100 µA max. Standby 20 mA max. Active at 5 MHz
JEDEC Standard Packages
28-Lead 600-mil PDIP 32-Lead PLCC 28-Lead TSOP and SOIC
5V ± 10% Supply
High Reliabili ty C MOS Te ch nology
2,000V ESD Protection 200 mA Latchup Imm un ity
RapidProgramming Algorithm - 100 µs/byte (typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Produc t Ide nti fication Code
Commercial and Industrial Temperature Ranges
Description
The AT27C512R is a low-power, high performance 524,288 bit one-time program­mable read only memory (OTP EPROM) organized 64K by 8 bits. It requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 45 ns, eliminating the need for speed reducing WAIT states on high per­formance microprocessor systems.
Atmel’s scaled CMOS technology provides high speed, lower active power con­sumption, and significantly faster programming. Power consumption is ty pically only 8 mA in Active Mode and less than 10 µA in Standby.
(continued)
AT27C512R
Pin Configurations
Pin Name Function
A0 - A15 Addresses O0 - O7 Outputs CE Chip Enable OE /V NC No Connect
Output Enable/V
PLCC Top View
Note: PLCC Package Pins 1 and 17 are DON’T CONNECT.
PDIP, SOIC Top View
TSOP Top View
Type 1
3-135
Description (Continued)
The AT27C512R is available in a choice of industry stand­ard JEDEC-approved one-time programmable (OTP) plastic PDIP, PLCC, SOIC, and TSOP packages. All de­vices feature two-line control ( the flexibility to prevent bus contention.
With 64K byte storage capability, the AT27C512R allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media.
Atmel’s 27C512R has additional features to ensure high quality and efficient production use. The Rapid ming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry standard programming equipment to select the proper program­ming algorithms and voltages.
CE, OE) to give designers
Program-
System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excur­sions. Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in de­vice non-conformance. At a minimum, a 0.1 µF high fre­quency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V the device, as close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the
and Ground terminals. This capacitor should be posi-
V
CC
tioned as close as possible to the point where the power supply is connected to the array.
and Ground terminals of
CC
3-136 AT27C512R
AT27C512R
Block Diagram
Absolute Maximum Ra ti ngs *
Temperature Under Bias ................ -55°C to +125°C
Storage Temperature...................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground.........................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................-2.0V to +14.0V
VPP Supply Voltage with
Respect to Ground.......................-2.0V to +14.0V
*NOTICE: Stresses beyond those listed unde r “Absolu te Maxi-
mum Ratings” may cause permanent da ma ge to th e de vice . This is a stress rating only and functional operation of the device at these or any other conditions beyond those indi­cated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Note: 1. Minimum voltage is -0.6V dc which may undershoot
to -2.0V for pulses of less than 20 ns. Maximum out­put pin voltage is V shoot to +7.0V for pulses of less than 20 ns.
+ 0.75V dc wh ich may over-
CC
(1)
(1)
(1)
Operating Modes
Mode \ Pin
Read V Output Disable V Standby V Rapid Program PGM Inhibit V
Product Identification
Notes: 1. X can be VIL or VIH.
2. Refer to Programming Characteristics.
3. VH = 12.0 ± 0.5V.
(2)
(4)
CE OE/V
X
V V
V V
PP PP
V
IL IL IH
V
IL IH
V
IL
PP
IL
IH (1)
Ai Ai D
(1)
X
X High Z
Ai D
(1)
X
A9 = VH
IL
A0 = VIH or VIL
A1 - A15 = V
4. Two identifier by tes may be selec ted. All Ai in pu ts are held low (V gled low (V and high (V
), except A9 which is set to VH and A0 which is tog-
IL
) to select the Manuf ac tu rer’s Identifi ca ti on byte
IL
) to select the Dev ice Code byte.
IH
(3)
IL
Outputs
OUT
High Z
IN
High Z
Identification Code
3-137
DC and AC Operating Conditions f or Read Operation
AT27C512R
-90 -12
-15
Operating
-45 -55 -70
Com. 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C 0°C - 70°C
Temp.(Case)
Ind. -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C
Supply 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10%
V
CC
DC and Operating Characte ristics for Read Operation
Symbol Parameter Condition Min Max Units
I
LI
I
LO
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Note: 1. V
Input Load Current VIN = 0V to V Output Leakage Current V
(1)
VCC
Standby Current
VCC Active Current
= 0V to V
OUT
I
(CMOS), CE = V
SB1
(TTL), CE = 2.0 to VCC + 0.5V
I
SB2
f = 5 MHz, I CE = V
IL
CC
OUT
CC
CC
= 0 mA,
± 0.3V
±1 µA ±5 µA
100 µA
20 mA
Input Low Voltage -0.6 0.8 V Input High Voltage 2.0 VCC + 0.5 V Output Low Voltage IOL = 2.1 mA 0.4 V Output High Voltage IOH = -400 µA 2.4 V
must be applied simultaneou sl y or before OE/VPP, and removed simultaneously or after OE/VPP.
CC
1mA
AC Characteristics for Read Operation
-45 -55 -70 -90 -12
Symbol Parameter Condition
ACC
t
CE
t
OE
t
DF
t
OH
Notes: 2, 3, 4, 5. - see AC Waveforms for Read Operation.
Output Delay
(2)
CE to Output Delay OE/VPP = V OE/VPP to Output
(2, 3)
Delay OE/V
(4, 5)
Output Float, whichever occurred firs t Output Hold from
Address, CE or OE/VPP, whichever occurred first
or CE High to
PP
Address to
(3)
t
CE = OE/V = V
CE = V
IL
IL
PP
IL
3-138 AT27C512R
Min Max Min Max Min Max Min Max Min Max Min Max
45 55 70 90 120 150 ns 45 55 70 90 120 150 ns 20 25 30 35 35 40 ns
20 20 25 25 30 35 ns
777000 ns
AT27C512R
-15 Units
Output Test Load
AT27C512R
AC Waveforms for Re ad O peration
(1)
Notes: 1. Timing measurement reference level is 1.5V for -45 and
-55 devices. Input AC drive levels are V = 3.0V. Timing meas ure me nt reference level s fo r
V
IH
all other speed grades are V
2.0V. Input AC drive levels are V
2.4V.
2. OE/VPP may be delayed up to t edge of
CE without impact on t
= 0.8V and VOH =
OL
IL
CE CE
= 0.0V and
IL
= 0.45V and VIH =
- tOE after the falling .
3. OE/VPP may be delayed up to t address is valid without impact on t
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
- tOE after the
ACC
.
ACC
Input Test Waveforms and Measurement Levels
For -45 and -55 devices only:
tR, tF < 5 ns (10% to 90%)
For -70, -90, -12, -15, and -20 devices:
Note: CL = 100 pF including jig capaci-
tance, except for the -45 and -55 devices, where CL = 30 pF.
tR, tF < 20 ns (10% to 90%)
(1)
Pin Capacitance (f = 1 MHz T = 25°C)
Typ Max Units Conditions
C
IN
C
OUT
Note: 1. Typical values for nominal supply voltage. This parame te r is on ly sampl ed and is not 10 0% t ested.
46pFV 812pFV
= 0V
IN OUT
= 0V
3-139
Programming Wavef or ms
Notes: 1. The Input Timing Re fe rence is 0.8V for VIL and 2.0V for VIH.
2. t
OE
and t
are characteristics of the devic e but mu st be acco mmod at ed by the pro gra mmer.
DFP
DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25V
Symbol Parameter
I
LI
V
IL
V
IH
V
OL
V
OH
I
CC2
I
PP2
V
ID
3-140 AT27C512R
Input Load Current VIN = VIL,V Input Low Level -0.6 0.8 V Input High Level 2.0 V Output Low Voltage I Output High Volta ge IOH = -400 µA2.4 V
VCC Supply Current (Program and Verify)
OE/VPP Current CE = V A9 Product Identi fication Volt age 11.5 1 2. 5 V
Test Conditions
IH
= 2.1 mA 0.4 V
OL
Min
Limits
Max
±10 µA
+ 1 V
CC
25 mA
IL
25 mA
Units
AT27C512R
AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, OE/VPP = 13.0 ± 0.25 V
Sym­bol Parameter
Address Setup Time 2 µs
t
AS
OE/VPP Setup Time 2 µs
t
OES
OE/VPP Hold Time 2 µs
t
OEH
Data Setup Time 2 µs
t
DS
Address Hold Time 0 µs
t
AH
Data Hold Time 2 µs
t
DH
CE High to
t
DFP
Output Float Delay VCC Setup Time 2 µs
t
VCS
CE Program Pulse Width
t
PW
Data Valid from CE
t
DV
OE/VPP Recovery Time 2 µs
t
VR
OE/VPP Pulse Rise
t
PRT
Time During Programming
*AC Conditions of Test:
Input Rise and Fa ll Times (10% to 90%). .......... .. . 20 ns
Input Pulse Levels....................................0.45V to 2.4V
Input Timing Reference Level....................0.8V to 2.0V
Output Timing Reference Level.................0.8V to 2.0V
Test Condtions*
(2)
(3)
(2)
Limits Units
(1)
Min Max
0130ns
95 105 µs
50 ns
1 µs
Rapid Programming Algor ithm
A 100 µs CE pulse width is used to program. The address is set to the first location. V OE/VPP is raised to 13.0V. Each address is first pro­grammed with one 100 µs Then a verification/reprogram ming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses ar e applied with a veri­fication after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is se­lected until all have been checked. ered to V
and VCC to 5.0V. All bytes are read again and
IL
compared with the original data to determine if the device passes or fails.
is raised to 6.5V and
CC
CE pulse without verification.
OE/VPP is then low-
Notes: 1. V
must be applied simultaneou sl y or before
CC
OE/VPP and removed simultaneously or after OE/VPP.
2. This parameter is only sampl ed and is no t 100% tested. Output Float is defined as the point where data is no longer driven — see timing diagram.
3. Program Pu lse width tolerance is 100 µsec ± 5%.
Atmel’s 27C512R Int egr ated Product Identification Code
Pins
Codes
Manufacturer0000111101E Device Type 1000011010D
A0 O7 O6 O5 O4 O3 O2 O1 O0
Hex
Data
3-141
Ordering Information
t
ACC
(ns)
45 20 0.1 AT27C512R-45JC 32J Commercial
55 20 0.1 AT27C512R-55JC 32J Commercial
70 20 0.1 AT27C512R-70JC 32J Commercial
90 20 0.1 AT27C512R-90JC 32J Commercial
120 20 0.1 AT27C512R-12JC 32J Commercial
150 20 0.1 AT27C512R-15JC 32J Commercial
I
(mA)
CC
Active Standby
Ordering Code Package Operation Range
AT27C512R-45PC 28P6 (0°C to 70°C) AT27C512R-45RC 28R AT27C512R-45TC 28T
20 0.1 AT27C512R-45JI 32J Industrial
AT27C512R-45PI 28P6 (-40°C to 85°C) AT27C512R-45RI 28R AT27C512R-45TI 28T
AT27C512R-55PC 28P6 (0°C to 70°C) AT27C512R-55RC 28R AT27C512R-55TC 28T
20 0.1 AT27C512R-55JI 32J Industrial
AT27C512R-55PI 28P6 (-40°C to 85°C) AT27C512R-55RI 28R AT27C512R-55TI 28T
AT27C512R-70PC 28P6 (0°C to 70°C) AT27C512R-70RC 28R AT27C512R-70TC 28T
20 0.1 AT27C512R-70JI 32J Industrial
AT27C512R-70PI 28P6 (-40°C to 85°C) AT27C512R-70RI 28R AT27C512R-70TI 28T
AT27C512R-90PC 28P6 (0°C to 70°C) AT27C512R-90RC 28R AT27C512R-90TC 28T
20 0.1 AT27C512R-90JI 32J Industrial
AT27C512R-90PI 28P6 (-40°C to 85°C) AT27C512R-90RI 28R AT27C512R-90TI 28T
AT27C512R-12PC 28P6 (0°C to 70°C) AT27C512R-12RC 28R AT27C512R-12TC 28T
20 0.1 AT27C512R-12JI 32J Industrial
AT27C512R-12PI 28P6 (-40°C to 85°C) AT27C512R-12RI 28R AT27C512R-12TI 28T
AT27C512R-15PC 28P6 (0°C to 70°C) AT27C512R-15RC 28R AT27C512R-15TC 28T
3-142 AT27C512R
(continued)
AT27C512R
Ordering Information (Continued)
t
ACC
(ns)
150 20 0.1 AT27C512R-15JI 32J Industrial
I
(mA)
CC
Active Standby
Ordering Code Package Operation Range
AT27C512R-15PI 28P6 (-40°C to 85°C) AT27C512R-15RI 28R AT27C512R-15TI 28T
Package Type
32J 32 Lead, Plastic J-Leade d Chi p Carrier (PLCC) 28P6 28 Lead, 0.600" Wide, Plastic Dual Inl in e Packa ge (PDIP) 28R 28 Lead, 0.330" Wide, Plastic Gull Win g Small Outl ine (SOIC) 28T 28 Lead, Thin Small Outline Package (TSOP)
3-143
Loading...