ATMEL AT27C4096-90JI, AT27C4096-90JC, AT27C4096-70VI, AT27C4096-70VC, AT27C4096-70PI Datasheet
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Features
• Fast Read Access Time - 55 ns
• Low Power CMOS Operation
– 100 µA Maximum Standby
– 40 mA Maximum Active at 5 MHz
• JEDEC Standard Packages
– 40-Lead 600 mil PDIP
– 44-Lead PLCC
– 40-Lead TSOP (10 mm x 14 mm)
• Direct Upgrade from 512K bit, 1M bit, and 2M bit
(AT27C516, AT27C1024, and AT27C2048) EPROMs
• 5V ± 10% Power Supply
• High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
™
• Rapid
• CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code
• Commercial and Industrial Temperature Ranges
Programming Algorithm - 50 µs/word (typical)
Description
The AT27C4096 is a low-power, high-performance 4,194,304-bit one-time programmable read only memor y (OTP EP ROM) organiz ed 256K by 16 bits . It requ ires a s ingle 5V power supply in nor mal read mode op eration. Any w ord can be acce ssed in
less than 55 ns , eliminatin g the need fo r speed-redu cing WAIT states. T he by-16
organization makes this part ideal for high-performance 16- and 32-bit microprocessor
systems.
(continued)
Pin Configurations
Pin Name Function
PDIP Top View
AT27C4096
4-Megabit
(256K x 16)
OTP EPROM
AT27C4096
A0 - A17 Addresses
O0 - O15 Outputs
CE
OE
NC No Connect
Note: Both GND pins must be
Chip Enable
Output Enable
connected.
PLCC Top View
TSOP Top View
Type 1
0311E-A–06/97
1
Description
µ
µ
µ
µ
In read mode, the AT27C4096 typically consumes 15 mA.
™
A.
Pro-
Standby mode supply current is typically less than 10
The AT27C4096 is ava ilable in industry standard
JEDEC-approved one -time programm able (OTP) plasti c
PDIP, PLCC, and TSOP pa ckages. The de vice features
two-line control (CE
high-speed systems.
With high density 256K word storage capability, the
AT27C4096 allows firmware to be store d reliabl y and to be
accessed by the system without the delays of mass storage
media.
Atmel’s AT27C4096 has additional features that ensure
high quality and efficient production use. The Rapid
gramming Algorithm reduces the time required to program
the part and guarantees reliable programming. Programming time is typically only 50
uct Identifi cation Co de elect ronicall y identi fies the d evice
and manufacturer. This feature is use d by industry standard programming equipment to select the proper programming algorithms and voltages.
, OE) to eliminate bus contention in
s/word. The Integrated Prod-
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce tr ans ie nt v olta ge e xcur sion s.
Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device
non-conformance . At a minim um, a 0.1
low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor shoul d be connected
between the V
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7
be utilized, agai n connec ted betwe en the V
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
and Ground terminals of the device, as
CC
F bulk electrolytic capacitor should
F high frequency,
and Ground
CC
2
AT27C4096
Block Diagram
Absolute Maximum Ratings*
AT27C4096
Temperature Under Bias ......................-55°C to +125°C
Storage Temperature............................-65°C to +150°C
Voltage on Any Pin with
Respect to Ground ...............................-2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ............................-2.0V to +14.0V
(1)
VPP Supply Voltage with
Respect to Ground .............................-2.0V to +14.0V
(1)
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the dev ice . This is a stress rating only an d
functional operati on of the de vi ce at these or an y
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions f or exten ded periods ma y affect d evice
reliability .
Note: Maximum voltage is -0.6V dc which may undershoot
to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is V
shoot to +7.0V for pulses of less than 20 ns.
CC
Operating Modes
Mode/Pin CE OE Ai V
Read V
IL
Output Disable X V
Standby V
Rapid Program
(2)
PGM Verify V
PGM Inhibit V
Product Identification
Notes: 1. X can be VIL or VIH.
2. Refer to the Programming characteristics.
= 12.0 ± 0.5V.
3. V
H
4. Two identifier words ma y be selec ted. All Ai input s are held low (VIL), except A9 , which is set to VH, and A0, wh ich i s to ggl ed
low (V
5. Standby VCC current (ISB) is specified with VPP = VCC. VCC > VPP will cause a slight increase in ISB.
(4)
) to select the Manufacturer’s Identification word and high (VIH) to select the Device Code word.
IL
IH
V
IL
IH
IH
V
IL
V
IL
IH
XXX
V
IH
V
IL
V
IH
V
IL
Ai X
X X High Z
Ai V
Ai V
XV
A9 = V
(3)
H
A0 = VIH or VIL
A1 - A17 = V
IL
+ 0.75V dc which may over-
Outputs
PP
(1)
D
OUT
(5)
High Z
D
V
PP
PP
PP
CC
IN
D
OUT
High Z
Identification Code
3
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