ATMEL AT27C1024 User Manual

BDTIC www.BDTIC.com/ATMEL

Features

• Fast Read Access Time – 45 ns

• Low-Power CMOS Operation

– 100 µA Max Standby
– 30 mA Max Active at 5 MHz

• JEDEC Standard Packages

– 40-lead PDIP
– 44-lead PLCC
– 40-lead VSOP

• Direct Upgrade from 512K (AT27C516) EPROM

• 5V ± 10% Power Supply

• High-Reliability CMOS Technology

– 2000V ESD Protection
– 200 mA Latchup Immunity

• Rapid

• CMOS and TTL Compatible Inputs and Outputs

• Integrated Product Identification Code

• Industrial and Automotive Temperature Ranges

• Green (Pb/Halide-free) Packaging Option

Programming Algorithm – 100 µs/Word (Typical)

1-Megabit
(64K x 16)
OTP EPROM

AT27C1024

1. Description

The AT27C1024 is a low-power, high-performance 1,048,576 bit one-time program­mable read-only memory (OTP EPROM) organized 64K by 16 bits. It requires only
one 5V power supply in normal read mode operation. Any word can be accessed in
less than 45 ns, eliminating the need for speed reducing WAIT states. The by-16 orga­nization make this part ideal for high-performance 16- and 32-bit microprocessor
systems.

In read mode, the AT27C1024 typically consumes 15 mA. Standby mode supply cur­rent is typically less than 10 µA.

The AT27C1024 is available in industry-standard JEDEC-approved one-time pro­grammable (OTP) plastic PDIP, PLCC, and VSOP packages. The device features
two-line control (CE

With high density 64K word storage capability, the AT27C1024 allows firmware to be
stored reliably and to be accessed by the system without the delays of mass storage
media.

Atmel’s AT27C1024 have additional features to ensure high quality and efficient pro­duction use. The Rapid
the part and guarantees reliable programming. Programming time is typically only
100 µs/word. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry-standard programming
equipment to select the proper programming algorithms and voltages.

, OE) to eliminate bus contention in high-speed systems.

Programming Algorithm reduces the time required to program

0019M–EPROM–12/07

2. Pin Configurations

Pin Name Function

A0 - A15 Addresses

O0 - O15 Outputs

CE

OE

Chip Enable

Output Enable

PGM

Program Strobe

NC No Connect

Note: Both GND pins must be connected.

2.1 40-lead PDIP Top View

VPP

CE
O15
O14
O13
O12
O11
O10

O9

O8

GND

O7

O6

O5

O4

O3

O2

O1

O0

OE

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21

VCC
PGM
NC
A15
A14
A13
A12
A11
A10
A9
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0

2.3 44-lead PLCC Top View

O12
O11
O10

O9
O8

GND

NC
O7
O6
O5
O4

O13

O14

O15CEVPPNCVCC

65432

7
8
9
10
11
12
13
14
15
16
17

1819202122232425262728

O3O2O1

O0

OE

1

NC

PGMNCA15

4443424140

A0A1A2A3A4

A14

39
38
37
36
35
34
33
32
31
30
29

A13
A12
A11
A10
A9
GND
NC
A8
A7
A6
A5

2.2 40-lead VSOP Top View – Type 1

1

A9

2

A10

3

A11

4

A12

5

A13

6

A14

7

A15

8

NC

9

PGM

10

VCC

11

VPP

12

CE

13

O15

14

O14

15

O13

16

O12

17

O11

18

O10

19

O9

20

O8

2

AT27C1024

GND

40

A8

39

A7

38

A6

37

A5

36

A4

35

A3

34

A2

33

A1

32

A0

31

OE

30

O0

29

O1

28

A2

27

O3

26

O4

25

O5

24

O6

23

O7

22

GND

21

0019M–EPROM–12/07

3. System Considerations

Switching between active and standby conditions via the Chip Enable pin may produce tran­sient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
close as possible to the point where the power supply is connected to the array.

4. Block Diagram

AT27C1024

and Ground terminals of the device, as close

CC

and Ground terminals. This capacitor should be positioned as

CC

5. Absolute Maximum Ratings*

Temperature Under Bias.............................. -55° C to + 125° C

Storage Temperature................................... -65° C to + 150° C

Voltage on Any Pin with

Respect to Ground ........................................-2.0V to + 7.0V

Voltage on A9 with

Respect to Ground .....................................-2.0V to + 14.0V

VPP Supply Voltage with

Respect to Ground ......................................-2.0V to + 14.0V

Note: 1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is

+ 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns.

V

CC

*NOTICE: Stresses beyond those listed under “Absolute Maxi-

mum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-

(1)

(1)

(1)

tions beyond those indicated in the operational sec­tions of this specification is not implied. Exposure to
absolute maximum rating conditions for extended
periods may affect device reliability.

0019M–EPROM–12/07

3

6. Operating Modes

Mode/Pin CE OE PGM Ai V

Read V

IL

Output Disable X V

Standby V

Rapid Program

(2)

PGM Verify V

PGM Inhibit V

Product Identification

(4)

IH

V

IL

IL

IH

V

IL

V

IL

IH

XX X X

V

IH

V

IL

XX X V

V

IL

(1)

X

Ai X D

X X X High Z

V

IL

V

IH

X

Ai V

Ai V

A9 = V

(3)

H

A0 = VIH or VIL

A1 - A15 = V

IL

V

PP

(5)

PP

PP

PP

CC

Notes: 1. X can be VIL or VIH.

2. Refer to Programming Characteristics.

3. V

= 12.0 ± 0.5V.

H

4. Two identifier words may be selected. All Ai inputs are held low (V

), except A9 which is set to VH and A0 which is toggled

IL

low (VIL) to select the Manufacturer’s Identification word and high (VIH) to select the Device Code word.

5. Standby V

current (ISB) is specified with VPP = VCC. V

CC

> VPP will cause a slight increase in ISB.

CC

7. DC and AC Operating Conditions for Read Operation

AT27C 102 4

-45 -70

Operating Temp. (Case)

Power Supply 5V ± 10% 5V ± 10%

V

CC

Ind. -40° C - 85° C-40° C - 85° C

Auto.

Outputs

OUT

High Z

D

IN

D

OUT

High Z

Identification Code

8. DC and Operating Characteristics for Read Operation

Symbol Parameter Condition Min Max Units

I

I

I

I

I

V

V

V

V

LI

LO

PP1

SB

CC

IL

IH

OL

OH

(2)

Input Load Current VIN = 0V to V

Output Leakage Current V

(1))

V

Read/Standby Current VPP = V

PP

(1)

V

Standby Current

CC

= 0V to V

OUT

I

(CMOS), CE = V

SB1

(TTL), CE = 2.0 to VCC + 0.5V 1 mA

I

SB2

VCC Active Current f = 5 MHz, I

CC

CC

OUT

CC

CC

= 0 mA, CE = V

Input Low Voltage -0.6 0.8 V

Input High Voltage 2.0 V

Output Low Voltage IOL = 2.1 mA 0.4 V

Output High Voltage I

= -400 µA 2.4 V

OH

Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP..

2. V

may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP..

PP

4

AT27C1024

Ind. ±1 µA

Auto. ±5 µA

Ind. ±5 µA

Auto. ±10 µA

10 µA

± 0.3V 100 µA

IL

30 mA

+ 0.5 V

CC

0019M–EPROM–12/07