BDTIC www.BDTIC.com/ATMEL
Features
• Fast Read Access Time – 90 ns
• Low Power CMOS Operation
– 100 µA Max Standby
– 40 mA Max Active at 5 MHz
• JEDEC Standard Packages
– 32-lead PLCC
– 32-lead PDIP
– 32-lead TSOP
• 5V ± 10% Supply
• High-Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
• Rapid
• CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code
• Industrial Temperature Range
• Green (Pb/Halide-free) Packaging Option
Programming Algorithm – 50 µs/Byte (Typical)
8-Megabit
(1M x 8) OTP
EPROM
AT27C080
1. Description
The AT27C080 chip is a low-power, high-performance 8,388,608-bit one-time programmable read only memory (OTP EPROM) organized as 1M by 8 bits. The
AT27C080 requires only one 5V power supply in normal read mode operation. Any
byte can be accessed in less than 90 ns, eliminating the need for speed reducing
WAIT states on high-performance microprocessor systems.
Atmel’s scaled CMOS technology provides low active power consumption and fast
programming. Power consumption is typically 10 mA in active mode and less than
10 µA in standby mode.
The AT27C080 is available in a choice of packages, including; one-time programmable (OTP) plastic PLCC, PDIP and TSOP. All devices feature two-line control (CE
OE
) to give designers the flexibility to prevent bus contention.
With high density 1-Mbyte storage capability, the AT27C080 allows firmware to be
stored reliably and to be accessed by the system without the delays of mass storage
media.
Atmel’s AT27C080 has additional features to ensure high quality and efficient production use. The Rapid
part and guarantees reliable programming. Programming time is typically only
50 µs/byte. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry standard programming
equipment to select the proper programming algorithms and voltages.
Programming Algorithm reduces the time required to program the
,
0360L–EPROM–12/07
2. Pin Configurations
Pin Name Function
A0 - A19 Addresses
O0 - O7 Outputs
CE
/VPP Output Enable/Program Supply
OE
2.1 32-lead TSOP (Type 1) Top View
1
A11
A13
A14
A17
A18
VCC
A19
A16
A15
A12
A9
A8
A7
A6
A5
A4
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Chip Enable
2.3 32-lead PLCC Top View
OE/VPP
A10
CE
O7
O6
O5
O4
O3
GND
O2
O1
O0
A0
A1
A2
A3
2.2 32-lead PDIP Top View
A7
A6
A5
A4
A3
A2
A1
A0
O0
A12
A15
A16
A19
432
1
5
6
7
8
9
10
11
12
13
14151617181920
O1
O2
O3O4O5
GND
VCC
A18
A17
323130
29
28
27
26
25
24
23
22
21
O6
A14
A13
A8
A9
A11
OE/VPP
A10
CE
O7
1
A19
2
A16
3
A15
4
A12
5
A7
6
A6
7
A5
8
A4
9
A3
10
A2
11
A1
12
A0
13
O0
14
O1
15
O2
16
GND
2
AT27C080
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A18
A17
A14
A13
A8
A9
A11
OE/VPP
A10
CE
O7
O6
O5
O4
O3
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3. System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
close as possible to the point where the power supply is connected to the array.
4. Block Diagram
AT27C080
and Ground terminals of the device, as close
CC
and Ground terminals. This capacitor should be positioned as
CC
5. Absolute Maximum Ratings*
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
VPP Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
Integrated UV Erase Dose............................. 7258 W•sec/cm
Note: 1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
+ 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns.
V
CC
(1)
(1)
(1)
2
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions beyond those
indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect device reliability.
0360L–EPROM–12/07
3
6. Operating Modes
Mode/Pin CE OE/V
Read V
IL
Output Disable X V
Standby V
Rapid Program
(2)
PGM Verify V
PGM Inhibit V
Product Identification
Notes: 1. X can be VIL or V
(4)
IH.
IH
V
IL
IL
IH
V
IL
PP
V
IL
IH
X X High Z
V
PP
V
IL
V
PP
V
IL
Ai Outputs
Ai D
(1)
X
Ai D
Ai D
X High Z
A9 = V
A0 = VIH or V
A1 - A19 = V
(3)
H
IL
IL
2. Refer to Programming Characteristics.
3. V
= 12.0 ± 0.5V.
H
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled
low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
7. DC and AC Operating Conditions for Read Operation
AT27C080-90
Industrial Operating Temperature (Case) -40° C - 85° C
Power Supply 5V ± 10%
V
CC
OUT
High Z
IN
OUT
Identification Code
8. DC and Operating Characteristics for Read Operation
Symbol Parameter Condition Min Max Units
I
LI
I
LO
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Input Load Current VIN = 0V to V
Output Leakage Current V
(1)
V
Standby Current
CC
= 0V to V
OUT
I
(CMOS), CE = VCC ± 0.3V 100 µA
SB1
(TTL), CE = 2.0 to V
I
SB2
VCC Active Current f = 5 MHz, I
Input Low Voltage -0.6 0.8 V
Input High Voltage 2.0 VCC + 0.5 V
Output Low Voltage I
= 2.1 mA 0.4 V
OL
Output High Voltage IOH = -400 µA 2.4 V
Note: 1. VCC must be applied simultaneously or before OE/ V
(Com., Ind.) ±1.0 µA
CC
(Com., Ind.) ±5.0 µA
CC
+ 0.5V 1.0 mA
CC
= 0 mA, CE = V
OUT
, and removed simultaneously or after OE/V
PP
IL
40 mA
PP .
4
AT27C080
0360L–EPROM–12/07