ATMEL AT27C080 User Manual

Features

Fast Read Access Time – 90 ns
Low Power CMOS Operation
100 µA Max Standby
40 mA Max Active at 5 MHz
JEDEC Standard Packages
32-lead PLCC
32-lead PDIP
5V ± 10% Supply
High-Reliability CMOS Technology
2,000V ESD Protection
200 mA Latchup Immunity
Rapid
Programming Algorithm – 50 µs/Byte (Typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Industrial Temperature Range
Green (Pb/Halide-free) Packaging Option

1. Description

The AT27C080 chip is a low-power, high-performance 8,388,608-bit one-time pro-
grammable read only memory (OTP EPROM) organized as 1M by 8 bits. The
AT27C080 requires only one 5V power supply in normal read mode operation. Any
byte can be accessed in less than 90 ns, eliminating the need for speed reducing
WAIT states on high-performance microprocessor systems.
Atmel’s scaled CMOS technology provides low active power consumption and fast
programming. Power consumption is typically 10 mA in active mode and less than
10 µA in standby mode.
The AT27C080 is available in a choice of packages, including; one-time programma-
ble (OTP) plastic PLCC, PDIP and TSOP. All devices feature two-line control (CE
,
OE
) to give designers the flexibility to prevent bus contention.
With high density 1-Mbyte storage capability, the AT27C080 allows firmware to be
stored reliably and to be accessed by the system without the delays of mass storage
media.
Atmel’s AT27C080 has additional features to ensure high quality and efficient produc-
tion use. The Rapid
Programming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming time is typically only
50 µs/byte. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry standard programming
equipment to select the proper programming algorithms and voltages.
8-Megabit
(1M x 8) OTP
EPROM
AT27C080
0360L–EPROM–12/07
BDTIC www.BDTIC.com/ATMEL
2
0360L–EPROM–12/07
AT27C080

2.1 32-lead TSOP (Type 1) Top View

2.2 32-lead PDIP Top View

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A11
A9
A8
A13
A14
A17
A18
VCC
A19
A16
A15
A12
A7
A6
A5
OE/VPP
A10
CE
O7
O6
O5
O4
O3
GND
O2
O1
O0
A0
A1
A2
A3
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A19
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
VCC
A18
A17
A14
A13
A8
A9
A11
OE/VPP
A10
CE
O7
O6
O5
O4
O3

2.3 32-lead PLCC Top View

5
6
7
8
9
10
11
12
13
29
28
27
26
25
24
23
22
21
A7
A6
A5
A4
A3
A2
A1
A0
O0
A14
A13
A8
A9
A11
OE/VPP
A10
CE
O7
4
3
2
1
32
31
30
14
15
16
17
18
19
20
O1
O2
GND
O3
O4
O5
O6
A12
A15
A16
A19
VCC
A18
A17

2. Pin Configurations

Pin Name Function
A0 - A19 Addresses
O0 - O7 Outputs
CE
Chip Enable
OE
/VPP Output Enable/Program Supply
3
0360L–EPROM–12/07
AT27C080

3. System Considerations

Switching between active and standby conditions via the Chip Enable pin may produce tran-
sient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
CC
and Ground terminals of the device, as close
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
CC
and Ground terminals. This capacitor should be positioned as
close as possible to the point where the power supply is connected to the array.

4. Block Diagram

Note: 1. Minimum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
V
CC
+ 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns.

5. Absolute Maximum Ratings*

Temperature Under Bias................................ -55°C to +125°C
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent
damage to the device. This is a stress rating
only and functional operation of the device at
these or any other conditions beyond those
indicated in the operational sections of this
specification is not implied. Exposure to abso-
lute maximum rating conditions for extended
periods may affect device reliability.
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
(1)
V
PP
Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
(1)
Integrated UV Erase Dose............................. 7258 W•sec/cm
2
4
0360L–EPROM–12/07
AT27C080
Notes: 1. X can be V
IL
or V
IH.
2. Refer to Programming Characteristics.
3. V
H
= 12.0 ± 0.5V.
4. Two identifier bytes may be selected. All Ai inputs are held low (V
IL
), except A9 which is set to V
H
and A0 which is toggled
low (V
IL
) to select the Manufacturer’s Identification byte and high (V
IH
) to select the Device Code byte.
Note: 1. V
CC
must be applied simultaneously or before OE/ V
PP
, and removed simultaneously or after OE/V
PP
.

6. Operating Modes

Mode/Pin CE OE/V
PP
Ai Outputs
Read V
IL
V
IL
Ai D
OUT
Output Disable X V
IH
X
(1)
High Z
Standby V
IH
X X High Z
Rapid Program
(2)
V
IL
V
PP
Ai D
IN
PGM Verify V
IL
V
IL
Ai D
OUT
PGM Inhibit V
IH
V
PP
X High Z
Product Identification
(4)
V
IL
V
IL
A9 = V
H
(3)
A0 = V
IH
or V
IL
A1 - A19 = V
IL
Identification Code

7. DC and AC Operating Conditions for Read Operation

AT27C080-90
Industrial Operating Temperature (Case) -40° C - 85° C
V
CC
Power Supply 5V ± 10%

8. DC and Operating Characteristics for Read Operation

Symbol Parameter Condition Min Max Units
I
LI
Input Load Current V
IN
= 0V to V
CC
(Com., Ind.) ±1.0 µA
I
LO
Output Leakage Current V
OUT
= 0V to V
CC
(Com., Ind.) ±5.0 µA
I
SB
V
CC
(1)
Standby Current
I
SB1
(CMOS), CE = V
CC
± 0.3V 100 µA
I
SB2
(TTL), CE = 2.0 to V
CC
+ 0.5V 1.0 mA
I
CC
V
CC
Active Current f = 5 MHz, I
OUT
= 0 mA, CE = V
IL
40 mA
V
IL
Input Low Voltage -0.6 0.8 V
V
IH
Input High Voltage 2.0 V
CC
+ 0.5 V
V
OL
Output Low Voltage I
OL
= 2.1 mA 0.4 V
V
OH
Output High Voltage I
OH
= -400 µA 2.4 V
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