The Atmel® AT27C080 is a low-power, high-performance 8,388,608-bit, one-time programmable, read-only memory (OTP EPROM) organized as 1M by 8 bits. The AT27C080
requires only one 5V power supply in normal read mode operation. Any byte can be
accessed in less than 90ns, eliminating the need for speed reducing WAIT states on highperformance microprocessor systems.
8Mb (1M x 8)
One-time
Programmable,
Read-only Memory
Atmel AT27C080
The Atmel scaled CMOS technology provides low active power consumption and fast programming. Power consumption is typically 10mA in active mode and less than 10µA in
standby mode.
The AT27C080 is available in a choice of industry standard, JEDEC-approved, one-time programmable (OTP) PLCC and PDIP packages. All devices feature two-line control (CE, OE)
to give designers the flexibility to prevent bus contention.
With high-density, 8Mb storage capability, the AT27C080 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media.
The AT27C080 has additional features to ensure high quality and efficient production use.
The rapid programming algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 50µs/byte. The integrated
product identification code electronically identifies the device and manufacturer. This feature
is used by industry standard programming equipment to select the proper programming
algorithms and voltages.
0360N–EPROM–042015
2.Pin configurations
Pin nameFunction
A0 - A19Addresses
O0 - O7Outputs
CEChip enable
OE/VPPOutput enable/Program supply
3.System considerations
Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless
accommodated by the system design, these transients may exceed datasheet limits, resulting in device nonconformance.
At a minimum, a 0.1µF, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the VCC and ground terminals of the device, as close to the device as possible.
Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7µF bulk electrolytic
capacitor should be utilized, again connected between the VCC and ground terminals. This capacitor should be positioned as
close as possible to the point where the power supply is connected to the array.
Note:1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20ns. Maximum output pin voltage is
V
+ 0.75V DC, which may overshoot to +7.0V for pulses of less than 20ns.
CC
5.DC and AC characteristics
Table 5-1.Operating modes
Mode/PinCEOE/V
ReadV
Output disableXV
StandbyV
Rapid program
PGM verifyV
PGM inhibitV
Product identification
Notes:1. X can be V
(2)
(4)
or VIH.
IL
2. Refer to programming characteristics.
= 12.0 ± 0.5V.
3. V
H
4. Two identifier bytes may be selected. All Ai inputs are held low (V
gled low (V
) to select the manufacturer’s identification byte and high (VIH) to select the device code byte.
IL
*NOTICE: Stresses beyond those listed under “Absolute
maximum ratings” may cause permanent damage to
the device. This is a stress rating only, and functional
operation of the device at these or any other
conditions beyond those indicated in the operational
(1)
sections of this specification is not implied. Exposure
to absolute maximum rating conditions for extended
periods may affect device reliability.
(1)
(1)
2
PP
IL
IH
V
IL
IL
IH
V
IL
V
IL
IH
XXHigh Z
V
PP
V
IL
V
PP
V
IL
), except A9, which is set to VH, and A0, which is tog-
IL
AiOutputs
AiD
(1)
X
AiD
AiD
XHigh Z
A9 = V
A0 = VIH or V
A1 - A19 = V
(3)
H
IL
IL
OUT
High Z
IN
OUT
Identification code
Table 5-2.DC and AC operating conditions for read operation
Industrial operating temperature (case)-40C - 85C
power supply5V 10%
V
CC
0360N–EPROM–042015
Atmel AT27C080-90
3
Table 5-3.DC and operating characteristics for read operation
SymbolParameterConditionMinMaxUnits
I
LI
I
LO
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Input load currentVIN = 0V to V
Output leakage currentV
(1)
V
standby current
CC
= 0V to V
OUT
(CMOS), CE = VCC 0.3V100A
I
SB1
(TTL), CE = 2.0 to V
I
SB2
VCC active currentf = 5MHz, I
Input low voltage-0.60.8V
Input high voltage2.0VCC + 0.5V
Output low voltageI
= 2.1mA0.4V
OL
Output high voltageIOH = -400µA2.4V
Note:1. VCC must be applied simultaneously or before OE/ V
(Com., Ind.)±1.0A
CC
(Com., Ind.)±5.0A
CC
+ 0.5V1.0mA
CC
= 0mA, CE = V
OUT
, and removed simultaneously or after OE/V
PP
IL
40mA
PP
Table 5-4.AC characteristics for read operation
Atmel AT27C080-90
SymbolParameterCondition
t
t
t
t
t
ACC
CE
OE
DF
OH
(4)
(3)
(3)(4)
(2)(5)
Address to output delay
CE to output delayOE = V
OE to output delayCE = V
OE or CE high to output float, whichever occurred first30ns
Output hold from address, CE or OE/VPP, whichever occurred first0ns
CE = OE/VPP
= V
IL
IL
UnitsMinMax
IL
90ns
90ns
20ns
4
Atmel AT27C080
0360N–EPROM–042015
Atmel AT27C080
Figure 5-1.AC waveforms for read operation
(1)
Notes:1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
is specified form OE/VPP or CE, whichever occurs first. Output float is defined as the point when data is no longer
2. t
DF
driven.
3.
OE/V
may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
PP
OE/V
4.
may be delayed up to t
PP
- tOE after the address is valid without impact on t
ACC
ACC
.
5. This parameter is only sampled and is not 100% tested.
Figure 5-2.Input test waveform and measurement levels
tR, tF < 20ns (10% to 90%)
Figure 5-3.Output test load
1.3V
(1N914)
OUTPUT
PIN
Note:CL = 100pF including jig capacitance.
3.3K
CL
0360N–EPROM–042015
5
Table 5-5.Pin capacitance
f = 1MHz, T = 25°C
(1)
SymbolTypMaxUnits Conditions
C
IN
C
OUT
48pFV
812pFV
IN
OUT
= 0V
= 0V
Note:1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
Figure 5-4.Programming waveforms
Notes:1. The input timing reference is 0.8V for V
and t
2. t
OE
6
Atmel AT27C080
are characteristics of the device, but must be accommodated by the programmer.
A 50µs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and OE/VPP is raised
to 13.0V. Each address is first programmed with one 50µs
loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 50µs pulses are applied
with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed.
After the byte verifies properly, the next address is selected until all have been checked. OE/VPP is then lowered to VIL and
VCC to 5.0V. All bytes are read again and compared with the original data to determine if the device passes or fails.
Figure 6-1.Rapid programming algorithm
CE pulse without verification. Then a verification reprogramming
Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254 mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
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Atmel
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