ATMEL AT27C040-70TI, AT27C040-70RI, AT27C040-70RC, AT27C040-70PI, AT27C040-70PC Datasheet
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AT27C040
1
4-Megabit
(512K x 8)
OTP EPROM
AT27C040
Features
• Fast Read Access Time - 70 ns
• Low Power CMOS Operation
100 µA max. Standby
30 mA max. Active at 5 MHz
• JEDEC Standard Packages
32-Lead 600-mil PDIP
32-Lead 450-mil SOIC (SOP)
32-Lead PLCC
32-Lead TSOP
• 5V ± 10% Supply
• High Reliability CMOS Technology
2000V ESD Protection
200 mA Latchup Immunity
• Rapid
™
Programming Algorithm - 100 µs/byte (typical)
• CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code
• Commercial and Industrial Temperature Ranges
Description
The AT27C040 chip is a low- power, high-pe rformance, 4,194,304-bit one-time programmable read only memory (OTP EPROM) organized as 512K by 8 bits . The
AT27C040 requires only one 5V power suppl y in no rmal read mode operatio n. Any
byte can be accessed in less than 70 ns, eliminating the need for speed reducing
WAIT states on high-performance microprocessor systems.
Atmel's scaled CM OS tec hnology pr ovides l ow active power c onsumption , and fast
programming. Power consumption is typically 8 mA in active mode and less than 10
µ
A in standby mode.
0189E-A–7/97
Pin Configurations
Pin Name Function
A0 - A18 Addresses
O0 - O7 Outputs
CE
Chip Enable
OE
Output Enable
PDIP, SOIC Top View
TSOP Top View
PLCC Top View
(continued)
AT27C040
2
The AT27C040 is available in a choice of industry standard
JEDEC-approved one -time programm able (OTP) plasti c
PDIP, PLCC, SOI C (SOP), and TSOP pac kages. The
device features two-line control (CE
, OE) to eliminate bus
contention in high-speed systems.
Atmel's AT27C040 has additi onal feature s to ensure high
quality and efficient produc tion use. The Rapid
™
Programming Algorith m reduc es the tim e requi red to pro gram the
part and guarantees reliable programming. Programming
time is typically only 100
µ
s/byte. The Integrat ed Product
Identification Code electronically identifies the device and
manufacturer. This feature is used by industry standard
programming eq uipme nt to selec t the pro per prog ramming
algorithms and voltages.
Switching Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce tr ans ie nt volta ge excursions.
Unless accommodated by the system design, these transients may exceed data sheet limits, resulting in device
non-conformance . At a mini mum, a 0.1
µ
F high frequency,
low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor shoul d be connected
between the V
CC
and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7
µ
F bulk electrolytic capacitor should
be utilized, agai n connec ted betwe en the V
CC
and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
AT27C040
3
Block Diagram
Absolute Maximum Ratings*
*NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functio nal ope ratio n of th e de vic e at thes e or an y other c onditi ons be y ond those in dicat ed in the op erational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
Temperature Under Bias ......................-55°C to +125°C
Storage Temperature............................-65°C to +150°C
Voltage on Any Pin with
Respect to Ground ..............................-2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ...........................-2.0V to +14.0V
(1)
VPP Supply Voltage with
Respect to Ground ............................-2.0V to +14.0V
(1)
Operating Modes
Notes: 1. X can be VIL or VIH.
2. Refer to Programming Characteristics
3. V
H
= 12.0 ± 0.5V.
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled
low (V
IL
) to select the Manufacturer’s Identificaton byte and high (VIH) to select the Device Code byte.
Mode/Pin CE OE Ai V
PP
Outputs
Read V
IL
V
IL
Ai X
(1)
D
OUT
Output Disable X V
IH
XXHigh Z
Standby V
IH
XX X High Z
Rapid Program
(2)
V
IL
V
IH
Ai V
PP
D
IN
PGM Verify X V
IL
Ai V
PP
D
OUT
PGM Inhibit V
IH
V
IH
XVPPHigh Z
Product Identification
(4)
V
IL
V
IL
A9 = V
H
(3)
A0 = VIH or VIL
A1 - A18 = V
IL
X Identification Code
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