ATMEL AT27C040 User Manual
BDTIC www.BDTIC.com/ATMEL
Features
• Fast Read Access Time – 70 ns
• Low Power CMOS Operation
– 100 µA Max Standby
– 30 mA Max Active at 5 MHz
• JEDEC Standard Packages
– 32-lead PDIP
– 32-lead PLCC
– 32-lead TSOP
• 5V ± 10% Supply
• High Reliability CMOS Technology
– 2000V ESD Protection
– 200 mA Latchup Immunity
• Rapid Programming Algorithm – 100 µs/Byte (Typical)
• CMOS and TTL Compatible Inputs and Outputs
• Industrial Temperature Range
• Green (Pb/Halide-free) Packaging Option
4-Megabit
(512K x 8)
OTP EPROM
AT27C040
1. Description
The AT27C040 chip is a low-power, high-performance, 4,194,304-bit one-time programmable read-only memory (OTP EPROM) organized as 512K by 8 bits. The
AT27C040 requires only one 5V power supply in normal read mode operation. Any
byte can be accessed in less than 70 ns, eliminating the need for speed reducing
WAIT states on high-performance microprocessor systems.
Atmel’s scaled CMOS technology provides low active power consumption, and fast
programming. Power consumption is typically 8 mA in active mode and less than
10 µA in standby mode.
The AT27C040 is available in a choice of industry-standard JEDEC-approved onetime programmable (OTP) plastic PDIP, PLCC and TSOP packages. The device features two-line control (CE
Atmel’s AT27C040 has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program the
part and guarantees reliable programming. Programming time is typically only
100 µs/byte. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry-standard programming
equipment to select the proper programming algorithms and voltages.
, OE) to eliminate bus contention in high-speed systems.
0189H–EPROM–12/07
2. Pin Configurations
Pin Name Function
A0 - A18 Addresses
O0 - O7 Outputs
CE
OE
Chip Enable
Output Enable
2.1 32-lead PDIP Top View
A16
A15
A12
O0
O1
O2
A7
A6
A5
A4
A3
A2
A1
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VPP
GND
2.2 32-lead TSOP Top View
1
A11
2
A9
3
A8
4
A13
5
A14
6
A17
7
A18
VPP
A16
A15
A12
A7
A6
A5
A4
8
9
10
11
12
13
14
15
16
VCC
VCC
A18
A17
A14
A13
A8
A9
A11
OE
A10
CE
07
06
05
04
03
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE
07
06
05
04
03
GND
02
01
O0
A0
A1
A2
A3
2.3 32-lead PLCC Top View
A12
A15
A16
VPP
VCC
A18
A7
A6
A5
A4
A3
A2
A1
A0
O0
432
5
6
7
8
9
10
11
12
13
14151617181920
01
02
GND
1
323130
030405
A17
29
28
27
26
25
24
23
22
21
06
A14
A13
A8
A9
A11
OE
A10
CE
07
2
AT27C040
0189H–EPROM–12/07
3. Switching Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
close as possible to the point where the power supply is connected to the array.
4. Block Diagram
AT27C040
and Ground terminals of the device, as close
CC
and Ground terminals. This capacitor should be positioned as
CC
5. Absolute Maximum Ratings*
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground ............................................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground .........................................-2.0V to +14.0V
VPP Supply Voltage with
Respect to Ground ..........................................-2.0V to +14.0V
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
0189H–EPROM–12/07
3
6. Operating Modes
Mode/Pin CE OE Ai V
Read V
IL
Output Disable X V
Standby V
Rapid Program
(2)
IH
V
IL
PGM Verify X V
PGM Inhibit V
Product Identification
(4)
IH
V
IL
V
IL
IH
X X X High Z
V
IH
IL
V
IH
V
IL
Ai X
X X High Z
Ai V
Ai V
XVPPHigh Z
A9 = V
(3)
H
A0 = VIH or VIL
A1 - A18 = V
IL
PP
(1)
PP
PP
X Identification Code
Outputs
Notes: 1. X can be VIL or VIH.
2. Refer to Programming Characteristics
3. V
= 12.0 ± 0.5V.
H
4. Two identifier bytes may be selected. All Ai inputs are held low (VIL), except A9 which is set to VH and A0 which is toggled
low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.
7. DC and AC Operating Conditions for Read Operation
AT27C040-70 AT27C040-90
Industrial Operating Temperature (Case) -40°C - 85°C -40°C - 85°C
VCC Power Supply 5V ± 10% 5V ± 10%
D
OUT
D
IN
D
OUT
8. DC and Operating Characteristics for Read Operation
Symbol Parameter Condition Min Max Units
I
LI
I
LO
(2)
I
PP1
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Notes: 1. V
Input Load Current VIN = 0V to V
Output Leakage Current V
(1)
V
Read/Standby Current VPP = V
PP
(1)
V
Standby Current
CC1
= 0V to V
OUT
CC
I
(CMOS), CE = VCC ± 0.3V 100 µA
SB1
(TTL), CE = 2.0 to V
I
SB2
VCC Active Current f = 5 MHz, I
CC
CC
= 0 mA, CE = V
OUT
+ 0.5V 1 mA
CC
IL
±1µA
±5µA
10 µA
30 mA
Input Low Voltage -0.6 0.8 V
Input High Voltage 2.0 V
+ 0.5 V
CC
Output Low Voltage IOL = 2.1 mA 0.4 V
Output High Voltage IOH = -400 µA 2.4 V
must be applied simultaneously or before VPP, and removed simultaneously or after VPP.
CC
may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and IPP.
2. V
PP
4
AT27C040
0189H–EPROM–12/07
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