The Atmel® AT27C040 is a low-power, high-performance, 4,194,304-bit, One-Time
Programmable, Read-Only Memory (OTP EPROM) organized as 512K by 8 bits. The
AT27C040 requires only one 5V power supply in normal Read mode operation. Any
byte can be accessed in less than 70ns, eliminating the need for speed reducing wait
states on high-performance microprocessor systems.
The Atmel scaled CMOS technology provides low active power consumption and fast
programming. Power consumption is typically 8mA in active mode and less than 10μA
in standby mode.
The AT27C040 is available in a choice of industry standard, JEDEC-approved, PDIP
and PLCC packages. The device features two-line control (
contention in high-speed systems.
The AT27C040 has additional features to ensure high quality and efficient production
use. The rapid programming algorithm reduces the time required to program the part
and guarantees reliable programming. Programming time is typically only 100μs/byte.
The integrated product identification code electronically identifies the device and
manufacturer. This feature is used by industry standard programming equipment to
select the proper programming algorithms and voltages.
CE, OE) to eliminate bus
0189J–EPROM–10/2012
Page 2
2.Pin Configurations and Pinouts
A
Pin
Name
V
PP
A0 - A
O0 - O
Function
Peak to Peak Voltage
Address Inputs
18
Outputs
7
GNDGround
CEChip Enable
OEOutput Enable
V
CC
Device Power Supply
PP
16
15
12
7
6
5
4
3
2
1
0
0
1
2
32-lead PDIP
Top view
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
A
A
A
A
A
A
A
OE
A
CE
O
O
O
O
O
CC
18
17
14
13
8
9
11
10
7
6
5
4
3
32-lead PLCC
Top view
A12A15A16VPPVCCA18A
4
3
2
1
5
A
7
6
A
6
7
A
5
8
A
4
9
A
3
10
A
2
11
A
1
12
A
0
13
O
0
14151617181920
2
O1O
323130
3O4O5O6
O
GND
17
29
28
27
26
25
24
23
22
21
A
A
A
A
A
OE
A
CE
O
14
13
8
9
11
10
V
A
A
A
A
A
A
A
A
A
7
A
A
O
O
O
GND
3.Switching Considerations
Switching between active and standby conditions via the Chip Enable (CE) pin may produce transient voltage
excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in
device nonconformance. At a minimum, a 0.1μF, high-frequency, low inherent inductance, ceramic capacitor should be
utilized for each device. This capacitor should be connected between the V
close to the device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7μF bulk electrolytic capacitor should be utilized, again connected between the V
terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to
the array.
4.Block Diagram
V
CC
GND
V
PP
OE
CE
– A
0
Address
Inputs
18
OE, CE, and
Program Logic
Y Decoder
X Decoder
Data Outputs
– O
O
0
7
Output
Buffers
Y-Gating
Cell Matrix
Identification
and ground terminals of the device — as
CC
and ground
CC
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
2
Page 3
5.Absolute maximum ratings*
Temperature under bias-55°C to +125°C
Storage temperature . . . . . . . . . . . . . -65°C to +150°C
*Notice: Stresses beyond those listed under “Absolute
maximum ratings” may cause permanent damage
to the device. This is a stress rating only, and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
PP
V
IL
IH
Ai X
XXHigh Z
(1)
Outputs
D
OUT
XXXHigh Z
V
IH
IL
V
IH
V
IL
AiV
AiV
XV
A9 = V
(3)
H
A0 = VIH or VIL
A
– A18 = V
1
IL
PP
PP
PP
D
D
OUT
High Z
XIdentification Code
IN
Notes: 1.X can be VIL or VIH.
2.Refer to programming characteristics.
3.V
= 12.0 ± 0.5V.
H
4.Two identifier bytes may be selected. All Ai inputs are held low (V
which is toggled low (V
code byte.
), except A9, which is set to VH, and A0,
) to select the manufacturer’s identification byte and high (VIH) to select the device
IL
IL
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
3
Page 4
6.2DC and AC Operating Conditions for Read Operation
Atmel AT27C040-70Atmel AT27C040-90
Industrial Operating Temperature (Case)-40°C to 85°C-40°C to 85°C
VCC Power Supply5V 10%5V 10%
6.3DC and Operating Characteristics for Read Operation
SymbolParameterConditionMinMaxUnits
I
I
I
I
I
V
V
V
V
LI
LO
PP1
SB
CC
(2)
IL
IH
OL
OH
Input Load CurrentVIN = 0V to V
Output Leakage CurrentV
(1)
V
Read/Standby CurrentVPP = V
PP
(1)
V
Standby Current
CC1
= 0V to V
OUT
I
(CMOS), CE = VCC 0.3V100μA
SB1
I
(TTL), CE = 2.0 to V
SB2
VCC Active Currentf = 5MHz, I
Input Low Voltage-0.60.8V
Input High Voltage2.0V
Output Low VoltageIOL = 2.1mA0.4V
Output High VoltageIOH = -400μA2.4V
Notes: 1.VCC must be applied simultaneously with or before VPP, and removed simultaneously with or after VPP.
2.V
may be connected directly to VCC, except during programming. The supply current would then be the
PP
sum of I
and IPP.
CC
6.4AC Characteristics for Read Operation
CC
CC
CC
= 0mA, CE = V
OUT
1μA
5μA
10μA
+ 0.5V1mA
CC
IL
30mA
+ 0.5V
CC
Atmel AT27C040
-70-90
SymbolParameterCondition
t
ACC
t
CE
t
OE
t
DF
t
OH
(1)
(1)
(1)
(1)
Address to Output Delay
CE to Output DelayOE = V
OE to Output DelayCE = V
OE or CE High to Output Float; whichever occurred first.2020ns
Output Hold from Address, CE or OE; whichever occurred
first.
CE = OE
= V
Note:1.See AC waveforms for read operation.
MinMaxMinMax
IL
IL
IL
7090ns
7090ns
3035ns
Units
00ns
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
4
Page 5
Figure 6-1. AC Waveforms for Read Operation
A
(1)
ddress
Address Valid
CE
t
CE
t
OE
OE
Output
High Z
t
ACC
Output
Valid
t
DF
t
OH
Notes: 1.Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless
otherwise specified.
2.
OE may be delayed up to tCE – tOE after the falling edge of CE without impact on tCE.
3.
OE may be delayed up to t
– tOE after the address is valid without impact on t
ACC
ACC
.
4.This parameter is only sampled, and is not 100% tested.
5.Output float is defined as the point when data is no longer driven.
Figure 6-2. Input Test Waveforms and Measurement Levels
2.40V
AC
Driving
Levels
0.45V
2.00
0.80
AC
Measurement
Level
Figure 6-3. Output Test Load
1.3V
(1N914)
3.3K
OUTPUT
PIN
CL
Table 6-2.Pin Capacitance
(1)
f = 1MHz, T = 25
°C
SymbolTypMaxUnitsConditions
C
IN
C
OUT
48pFVIN = 0V
812pFV
OUT
= 0V
Note:1.Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
Atmel AT27C040 [DATASHEET]
0189J–EPROM–10/2012
5
Page 6
Figure 6-4. Programming Waveforms
A
(1)
ddress
Data
V
PP
V
CC
CE
OE
V
V
V
V
13.0V
5.0V
6.5V
5.0V
V
V
V
V
Program
IH
IL
t
AS
IH
IL
t
PRT
IH
IL
IH
IL
t
DS
Address Stable
Data In
t
VPS
t
VCS
t
PW
t
DH
t
OES
t
OE
(Verify)
Data Out
Valid
t
DFP
t
AH
Read
Notes: 1.The input timing reference is 0.8V for VIL and 2.0V for VIH.
2.t
3.When programming the AT27C040, a 0.1μF capacitor is required across V
OE
and t
are characteristics of the device, but must be accommodated by the programmer.
A 100μs CE pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is
raised to 13.0V. Each address is first programmed with one 100μs
verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to ten
successive 100μs pulses are applied with a verification after each pulse. If the byte fails to verify after ten pulses have
been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been
checked. V
determine if the device passes or fails.
Figure 7-1. Rapid Programming Algorithm
is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to
Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
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