ATMEL AT27C020 User Manual

BDTIC www.BDTIC.com/ATMEL

Features

Fast Read Access Time – 55 ns

Low-power CMOS Operation

100 µA Max Standby

25 mA Max Active at 5 MHz

JEDEC Standard Packages

32-lead PDIP

32-lead PLCC

32-lead TSOP

5V ± 10% Supply

High-reliability CMOS Technology

2,000V ESD Protection

200 mA Latch-up Immunity

Rapid Programming Algorithm – 100 µs/Byte (Typical)

CMOSand TTL-compatible Inputs and Outputs

Integrated Product Identification Code

Industrial and Automotive Temperature Ranges

Green (Pb/Halide-free) Packaging Option

1. Description

The AT27C020 is a low-power, high-performance, 2,097,152-bit, one-time programmable read-only memory (OTP EPROM) organized as 256K by 8 bits. It requires only one 5V power supply in normal read mode operation. Any byte can be accessed in less than 55 ns, eliminating the need for speed-reducing WAIT states on highperformance microprocessor systems.

In read mode, the AT27C020 typically consumes 8 mA. Standby mode supply current is typically less than 10 µA.

The AT27C020 is available in a choice of industry-standard JEDEC-approved onetime programmable (OTP) plastic PDIP, PLCC and TSOP packages. All devices feature two-line control (CE, OE) to give designers the flexibility to prevent bus contention.

With 256K bytes storage capability, the AT27C020 allows firmware to be stored reliably and to be accessed by the system without the delays of mass storage media.

Atmel’s AT27C020 has additional features to ensure high quality and efficient production use. The Rapid Programming Algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The Integrated Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry-standard programming equipment to select the proper programming algorithms and voltages.

2-megabit

(256K x 8) OTP EPROM

AT27C020

0570G–EPROM–12/07

ATMEL AT27C020 User Manual

2. Pin Configurations

Pin Name

A0 - A17

O0 - O7

CE

OE

PGM

2.132-lead PLCC Top View

 

A12

A15

A16

VPP

VCC

PGM

A17

 

 

 

A7

4

3

2

1

32

31

30

A14

5

 

 

 

 

 

29

A6

6

 

 

 

 

 

28

A13

A5

7

 

 

 

 

 

27

A8

A4

8

 

 

 

 

 

26

A9

A3

9

 

 

 

 

 

25

A11

A2

10

 

 

 

 

 

24

 

 

 

 

 

 

 

OE

A1

11

 

 

 

 

 

23

A10

A0

12

 

 

 

 

 

22

 

 

 

 

 

 

 

 

CE

O0

13

15

16

17

18

19

21

07

 

 

 

14

20

 

 

 

 

01

02

GND

03

04

05

06

 

 

 

2.232-lead PDIP Top View

VPP

 

1

32

 

VCC

 

 

A16

 

2

31

 

 

 

 

 

 

 

 

 

PGM

 

A15

 

3

30

 

A17

 

 

A12

 

4

29

 

A14

 

 

A7

 

5

28

 

A13

 

 

A6

 

6

27

 

A8

 

 

A5

 

7

26

 

A9

 

 

A4

 

8

25

 

A11

 

 

A3

 

9

24

 

 

 

 

 

 

 

 

OE

 

 

 

A2

 

10

23

 

A10

 

 

A1

 

11

22

 

 

 

 

 

 

CE

A0

 

12

21

 

07

 

 

 

 

 

O0

 

13

20

 

06

 

 

 

 

 

O1

 

14

19

05

 

 

 

 

O2

 

15

18

 

04

 

 

 

 

GND

 

16

17

03

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2 AT27C020

Function

Addresses

Outputs

Chip Enable

Output Enable

Program Strobe

2.332-lead TSOP (Type 1) Top View

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A11

1

32

 

OE

 

A9

2

31

 

A10

 

A8

3

30

 

CE

 

A13

4

29

07

 

 

A14

5

28

06

 

 

A17

6

27

05

 

 

 

7

26

04

 

PGM

 

VCC

8

25

03

 

 

VPP

9

24

 

GND

 

A16

10

23

02

 

 

A15

11

22

01

 

 

A12

12

21

 

O0

 

A7

13

20

 

A0

 

A6

14

19

 

A1

 

A5

15

18

 

A2

 

A4

16

17

A3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0570G–EPROM–12/07

AT27C020

3. System Considerations

Switching between active and standby conditions via the Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF highfrequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the VCC and Ground terminals of the device, as close to the device as possible. Additionally, to stabilize the supply-voltage level on printed circuit boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again connected between the VCC and Ground terminals. This capacitor should be positioned as close as possible to the point where the power supply is connected to the array.

4. Block Diagram

5.

Absolute Maximum Ratings*

 

Temperature under Bias

................................ -55°C to +125°C

*NOTICE: Stresses beyond those listed under “Absolute

 

 

 

Maximum Ratings” may cause permanent dam-

Storage Temperature .....................................

-65°C to +150°C

age to the device. This is a stress rating only and

 

 

 

functional operation of the device at these or any

Voltage on Any Pin with

-2.0V to +7.0V(1)

other conditions beyond those indicated in the

Respect to Ground .........................................

operational sections of this specification is not

Voltage on A9 with

 

implied. Exposure to absolute maximum rating

-2.0V to +14.0V(1)

conditions for extended periods may affect device

Respect to Ground ......................................

reliability.

VPP Supply Voltage with

-2.0V to +14.0V(1)

 

Respect to Ground .......................................

 

 

 

 

Note:

1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is

 

VCC + 0.75V DC, which may overshoot to +7.0V for pulses of less than 20 ns.

3

0570G–EPROM–12/07

6. Operating Modes

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Mode/Pin

CE

 

OE

 

PGM

Ai

VPP

Outputs

Read

 

VIL

 

VIL

 

X(1)

Ai

X

DOUT

Output Disable

 

X

 

VIH

 

X

X

X

High-Z

Standby

 

VIH

 

X

 

X

X

X

High-Z

Rapid Program(2)

 

V

IL

 

V

IH

 

V

IL

Ai

V

D

 

 

 

 

 

 

 

 

PP

IN

PGM Verify

 

VIL

 

VIL

 

VIH

Ai

VPP

DOUT

PGM Inhibit

 

VIH

 

X

 

X

X

VPP

High-Z

 

 

 

 

 

 

 

 

 

 

 

 

 

A9 = V (3)

 

 

Product Identification(4)

 

 

 

 

 

 

 

 

 

 

 

 

H

 

 

 

VIL

 

VIL

 

X

A0 = VIH or VIL

X

Identification Code

 

 

 

 

 

 

 

 

 

 

 

 

 

A1 - A17 = VIL

 

 

Notes: 1. X can be VIL or VIH.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2.Refer to Programming Characteristics.

3.VH = 12.0 ± 0.5V.

4.Two identifier bytes may be selected. All Ai inputs are held low (VIL) except A9, which is set to VH and A0, which is toggled low (VIL) to select the Manufacturer’s Identification byte and high (VIH) to select the Device Code byte.

7.DC and AC Operating Conditions for Read Operation

 

 

 

AT27C020

 

 

 

 

 

 

-55

 

-90

 

 

 

 

 

Operating Temperature (Case)

Ind.

-40° C - 85° C

 

-40° C - 85° C

 

 

 

 

Auto.

 

 

-40° C - 125° C

 

 

 

 

 

 

 

 

VCC Power Supply

5V ± 10%

 

5V ± 10%

8. DC and Operating Characteristics for Read Operation

Symbol

Parameter

Condition

Min

Max

Units

 

 

 

 

 

 

ILI

Input Load Current

VIN = 0V to VCC (Com., Ind.)

 

±1.0

µA

ILO

Output Leakage Current

VOUT = 0V to VCC (Com., Ind.)

 

±5.0

µA

IPP(2)

VPP(1) Read/Standby Current

VPP = VCC

 

±10

µA

 

 

ISB1 (CMOS),

 

 

= VCC ± 0.3V

 

100

µA

ISB

VCC(1) Standby Current

CE

 

 

 

 

 

 

 

 

 

 

 

ISB2 (TTL), CE = 2.0 to VCC + 0.5V

 

1.0

mA

 

 

 

ICC

VCC Active Current

f = 5 MHz, IOUT = 0 mA,

 

= VIL

 

25

mA

CE

 

VIL

Input Low Voltage

 

 

 

 

 

 

 

-0.6

0.8

V

VIH

Input High Voltage

 

 

 

 

 

 

 

2.0

VCC + 0.5

V

VOL

Output Low Voltage

IOL = 2.1 mA

 

0.4

V

VOH

Output High Voltage

IOH = -400 µA

2.4

 

V

Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP.

2. VPP may be connected directly to VCC except during programming. The supply current would then be the sum of ICC and IPP.

4 AT27C020

0570G–EPROM–12/07

Loading...
+ 9 hidden pages