The Atmel® AT27C010 is a low-power, high-performance 1,048,576-bit, one-time programmable, read-only memory (OTP EPROM) organized as 128K by 8 bits. Thedevice
requires only one 5V power supply in normal read mode operation. Any byte can be
accessed in less than 45ns, eliminating the need for speed reducing WAIT states on highperformance microprocessor systems.
1Mb (128K x 8)
One-time
Programmable,
Read-only Memory
Atmel AT27C010
In read mode, the AT27C010 typically consumes only 8mA. Standby mode supply current
is typically less than 10µA.
The AT27C010 is available in a choice of industry standard, JEDEC approved, one-time programmable (OTP) PDIP and PLCC packages. All devices feature two-line control (CE, OE)
to give designers the flexibility to prevent bus contention.
With 128K byte storage capability, the AT27C010 allows firmware to be stored reliably and
to be accessed by the system without the delays of mass storage media.
The AT27C010 has additional features to ensure high quality and efficient production use.
The rapid programming algorithm reduces the time required to program the part and guarantees reliable programming. Programming time is typically only 100 µs/byte. The
integrated product identification code electronically identifies the device and manufacturer.
This feature is used by industry standard programming equipment to select the proper programming algorithms and voltages.
0321N–EPROM–4/11
Page 2
2.Pin configurations
s
Pin nameFunction
A0 - A16Addresses
O0 - O7Outputs
CEChip enable
OEOutput enable
PGMProgram strobe
NCNo connect
3.System considerations
Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless
accommodated by the system design, these transients may exceed datasheet limits, resulting in device nonconformance.
At a minimum, a 0.1µF, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the VCC and ground terminals of the device, as close to the device as possible.
Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7µF bulk electrolytic
capacitor should be utilized, again connected between the VCC and ground terminals. This capacitor should be positioned as
close as possible to the point where the power supply is connected to the array.
A7
A6
A5
A4
A3
A2
A1
A0
O0
32-lead PLCC
Top view
A12
A15
A16
VPP
432
5
6
7
8
9
10
11
12
13
14151617181920
O1
O2
1
O3O4O5
GND
VCC
PGM
323130
NC
29
28
27
26
25
24
23
22
21
O6
A14
A13
A8
A9
A11
OE
A10
CE
O7
32-lead PDIP
1
VPP
2
A16
3
A15
4
A12
5
A7
6
A6
7
A5
8
A4
9
A3
10
A2
11
A1
12
A0
13
O0
14
O1
15
O2
16
GND
Top view
VCC
32
PGM
31
NC
30
A14
29
A13
28
A8
27
A9
26
A11
25
OE
24
A10
23
CE
22
O7
21
O6
20
O5
19
O4
18
O3
17
Figure 3-1.Block diagram
2
Atmel AT27C010
0321N–EPROM–4/11
Page 3
4.Absolute maximum ratings*
Atmel AT27C010
Temperature under bias . . . . . . . . . . . . . .-55°C to +125°C
Note:1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20ns. Maximum output pin voltage is
V
+ 0.75V DC, which may overshoot to +7.0V for pulses of less than 20ns.
CC
5.DC and AC characteristics
Table 5-1.Operating modes
Mode/PinCEOEPGMAiV
ReadV
Output disableXV
StandbyV
Rapid program
PGM verifyV
PGM inhibitV
Product identification
Note:1. X can be V
2. Refer to programming characteristics.
= 12.0 ± 0.5V.
3. V
H
4. Two identifier bytes may be selected. All Ai inputs are held low (V
(V
) to select the manufacturer’s identification byte and high (VIH) to select the device code byte.
IL
(2)
or VIH.
IL
(4)
*NOTICE:Stresses beyond those listed under “Absolute max-
imum ratings” may cause permanent damage to
the device. This is a stress rating only, and functional operation of the device at these or any other
conditions beyond those indicated in the opera-
(1)
tional sections of this specification is not implied.
Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
(1)
(1)
PP
IL
IH
V
IL
IL
IH
V
IL
V
IL
IH
XXXXHigh Z
V
IH
V
IL
XXXVPPHigh Z
V
IL
(1)
X
AiXD
XXXHigh Z
V
IL
V
IH
X
), except A9, which is set to VH, and A0, which is toggled low
IL
AiV
AiV
A9 = V
(3)
H
A0 = VIH or VIL
A1 - A16 = V
PP
PP
XIdentification code
IL
Outputs
OUT
D
IN
D
OUT
Table 5-2.DC and AC operating conditions for read operation
A 100µs PGM pulse width is used to program. The address is set to the first location. VCC is raised to 6.5V and VPP is raised
to 13.0V. Each address is first programmed with one 100µs
verification/reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10
successive 100µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been
applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been
checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the original data to
determine if the device passes or fails.
Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
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