ATMEL AT27BV512-90TI, AT27BV512-90TC, AT27BV512-90RI, AT27BV512-90RC, AT27BV512-90JI Datasheet
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AT27BV512
Features
0602A
Fast Read Access Ti me - 90 ns
•
Dual Voltage Range Operation
•
Unregulated Battery Power Sup ply Range, 2.7V to 3.6V
or Standard 5V ± 10% Supply Range
Pin Compatible with JEDEC Standard AT27C512
•
Low Power CMOS Operation
•
20 µA max. (less than 1µA typical) Standby for VCC = 3.6V
29 mW max. Active at 5 MHz for VCC = 3.6V
JEDEC Standard Surface Mount Packa ge s
•
32-Lead PLCC
28-Lead 330-mil SOIC
28-Lead TSOP
High Reliabili ty C MOS Te ch nology
•
2,000V ESD Protection
200 mA Latchup Imm un ity
RapidProgramming Algorithm - 100 µs/byte (typical)
•
CMOS and TTL Compatible Inputs and Outputs
•
JEDEC Standard for LVTTL and LVBO
Integrated Produc t Ide nti fication Code
•
Commercial and Industrial Temperature Ranges
•
Description
The AT27BV512 is a high performance, low power, low voltage 524,288 bit one-time
programmable read only memory (OTP EPROM) organized as 64K by 8 bits. It requires only one supply in the range of 2.7V to 3.6V in normal read mode operation,
making it ideal for fast, portable systems using either regulated or unregulated battery
power.
Atmel’s innovative design techniques provide fast speeds that rival 5V parts while
keeping the low power consumption of a 3V supply. At V
accessed in less than 90 ns. With a typical power consumption of only 18 mW at 5
MHz and V
standard 5V EPROM.
Pin Configurations
= 3V, the AT27BV512 consumes less than one fifth the power of a
CC
SOIC Top View
= 2.7V, any byte can be
CC
(continued)
AT27BV512
512K (64K x 8)
Unregulated
Battery-Voltage
High Speed
OTP
CMOS EPROM
Pin Name Function
A0 - A15 Addresses
O0 - O7 Outputs
CE Chip Enable
OE/V
NC No Connect
Note: PLCC Package Pins 1 and
17 are DON’T CONNECT.
PP
PLCC Top View
Output Enable
TSOP Top View
Type 1
3-13
Description (Continued)
Standby mode supply current is typically less than 1 µA at
3V. The AT27BV512 simplifies s ystem design and
stretches battery lifetime even further by eliminating the
need for power supply regulation.
The AT27BV512 is available in industry standard JEDECapproved one-time programmable (OTP) plastic PLCC,
SOIC, and TSOP packages. All devices feature two-line
control (
bus contention.
The AT27BV512 operating with V
level outputs that are compatible with standard TTL logic
devices operating at V
is compatible with JEDEC approved low voltage battery
operation (LVBO) interface specifications. The device is
also capable of standard 5-volt operation making it ideally
suited for dual supply range systems or card products that
are pluggable in both 3-volt and 5-volt hosts.
Atmel’s AT27BV512 has additional features to ensure
high quality and efficient production use. The Rapid
gramming Algorithm reduces the time required to program
the part and guarantees reliable programming. Programming time i s typically only 100 µs/byte. The Integrated
Product Identification Code electronically identifies the device and manufacturer. This feature is used by industry
standard programming equipment to select the proper
programming algorithms and voltages. The AT27BV512
programs exactly the same way as a standard 5V
AT27C512R and uses the same programming equipment.
CE, OE) to give designers the flexibility to prevent
at 3.0V produces TTL
CC
= 5.0V. At VCC = 2.7V, the part
CC
Pro-
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions. Unless accommodated by the system design, these
transients may exceed data sheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency, low inherent inductance, ceramic capacitor
should be utilized for each device. This capacitor should
be connected between the V
the device, as close to the device as possible. Additionally,
to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic
capacitor should be utilized, again connected between the
and Ground terminals. This capacitor should be posi-
V
CC
tioned as close as possible to the point where the power
supply is connected to the array.
and Ground terminals of
CC
3-14 AT27BV512
AT27BV512
Block Diagram
Absolute Maximum Ra ti ngs *
Temperature Under Bias .................. -40°C to +85°C
Storage Temperature...................... -65°C to +125°C
Voltage on Any Pin with
Respect to Ground.........................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................-2.0V to +14.0V
VPP Supply Voltage with
Respect to Ground.......................-2.0V to +14.0V
*NOTICE: Stresses beyond those listed unde r “Absolu te Maxi-
mum Ratings” may cause permanent da ma ge to th e de vice .
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Note: 1. Minimum voltage is -0.6V dc which may undershoot
to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is V
ceeded if certain precautions are observed (consult
application notes) and which may overshoot to
+7.0V for pulses of less than 20 ns.
+ 0.75V dc which may be ex-
CC
(1)
(1)
(1)
Operating Modes
Mode \ Pin
(2)
Read
Output Disable
Standby
Rapid Program
PGM Verify
PGM Inhibit
Product Identification
Notes: 1. X can be VIL or VIH.
2. Read, output disable, and standby modes require,
3. Refer to Programming Characteristics.
(2)
(2)
(3)
(3)
(3)
(3, 5)
2.7V ≤ V
Programming mode s require VCC = 6.5V.
≤ 3.6V, or 4.5V ≤ VCC ≤ 5.5V.
CC
CE OE/V
V
IL
V
IL
V
IH
V
IL
V
IL
V
IH
V
IL
V
V
XXV
V
PP
V
V
PP
V
PP
IL
IH
IL
IL
4. V
H
5. Two identifier by tes may be select e d . Al l A i inputs are held
low (V
gled low (V
and high (V
Ai V
Ai VCC
(1)
X
Ai VCC
Ai VCC
XV
A9 = VH
(4)
A0 = VIH or VIL
A1 - A15 = V
= 12.0 ± 0.5V.
), except A9 which is set to VH and A0 which is tog-
IL
IL
) to select the Manuf ac tu rer’s Identification byte
IL
) to select the Dev ice Code byte.
IH
CC
VCC
CC
CC
VCC
(2)
(2)
(2)
(3)
(3)
(3)
(3)
Outputs
D
OUT
High Z
High Z
D
IN
D
OUT
High Z
Identification
Code
3-15
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