– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
– 1.8 (VCC = 1.8V to 3.6V)
•
Block Write Protection
– Protect 1/4, 1/2, or Entire Array
•
Write Protect (WP) Pin and Write Disable Instructions for
Both Hardware and Software Data Protection
•
High Reliability
– Endurance: 100K Write Cycles
– Data Retention: > 40 Years
– ESD Protection: > 3000V
•
8-Pin PDIP, 8-Pin EIAJ SOIC, and 8-Pin Leadless Array Package
Description
The AT25HP256/512 provides 262,144/524,288 bits of serial electrically erasable programmable read only memory (EEPROM) organized as 32,768/65,536 words of 8-bits
each. The device is o ptimi zed f or u se i n man y in dustria l and com merc ial app lic ations
where high-speed, low- power, and low-voltage operation are essent ial. The
AT25HP256/512 is available in a space saving 8-pin PDIP (AT25HP256/512), 8-pin
EIAJ SOIC (AT25HP256), and 8-pin Leadless Array (AT25HP256/512) packages. In
(continued)
SPI Serial
EEPROMs
256K (32,768 x 8)
512K (65,536 x 8)
AT25HP256
AT25HP512
Preliminary
Pin Configurations
Pin NameFunction
CS
SCKSerial Data Clock
SISerial Data Input
SOSerial Data Output
GNDGround
VCCPower Supply
WP
HOLDSuspends Serial Input
CS
SO
WP
GND
Chip Select
Write Protect
8-Pin PDIP
8
1
7
2
3
6
4
5
VCC
HOLD
SCK
SI
CS
SO
WP
GND
8-Pin SOIC
8
1
7
2
3
6
4
5
VCC
HOLD
SCK
SI
8-Pin Leadless Array
VCC
HOLD
SCK
8
7
6
SI
5
CS
1
SO
2
WP
3
GND
4
Bottom View
Rev. 1113B–07/98
1
addition, the entire family is available in 5.0V (4.5V to
5.5V), 2.7V (2.7V to 5.5V), and 1.8V (1 .8V to 3.6V) versions.
The AT25HP256/512 is enabled through the Chip Select
pin (CS
Serial Data Input (SI), Serial Data Output (SO), and Serial
Clock (SCK). All progr amming cycle s are co mpletely s elftimed, and no separate ERASE cycle is required before
WRITE.
BLOCK WRITE protection is enabled by programming the
status register with top ¼, top ½ or entire array of write protection. Separate program enable and program disable
instructions are provided for additional data protection.
Hardware d ata protection is pr ovided via the WP
tect against inadvertent write attempts to the status register. The HOLD
communication without resetting the serial sequence.
) and accessed via a 3-wire interface consisting of
pin to pro-
pin may be used to suspend any serial
Block Diagram
Absolute Maximum Ratings*
Operating Temperature..................................-55°C to +125°C
Storage Temperature .....................................-65°C to +150°C
Voltage on Any Pin
with Respect to Ground.................................... -1.0V to +7.0V
Maximum Operating Voltage................................... ...... ..6.25V
DC Output Current........................................................5.0 mA
*NOTICE:Stresses beyond those listed under “Absolute Maxi-
mum Ratings” ma y cause permanent d amage to th e
device. This is a stress rating only and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of this specif ic ati on is n ot im pl ie d. Ex pos ure to
absolute maximum rating conditions for extended
periods may affect device reliability.
32,768/65,536 x 8
2
AT25HP256/512
AT25HP256/512
Pin Capacitance
(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted).
Note:1. This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V,
= 0°C to +70°C, VCC = +1.8V to +5.5V (unless otherwise noted).
T
AC
SymbolParameterTest ConditionMinTypMaxUnits
V
CC1
V
CC2
V
CC3
I
CC1
I
CC2
I
SB1
I
SB2
I
SB3
I
IL
I
OL
(1)
V
IL
(1)
V
IH
V
OL1
V
OH1
V
OL2
V
OH2
Note:1. V
Supply Voltage1.83.6V
Supply Voltage2.75.5V
Supply Voltage4.55.5V
Supply CurrentVCC = 5.0V at 5 MHz, SO = Open Read6.010.0mA
Supply CurrentVCC = 5.0V at 5 MHz, SO = Open Write4.07.0mA
Standby CurrentVCC = 1.8V, CS = V
Standby CurrentVCC = 2.7V, CS = V
Standby CurrentVCC = 5.0V, CS = V
Input LeakageVIN = 0V to V
CC
CC
CC
CC
-3.03.0
0.12.0
0.22.0
2.05.0
Output LeakageVIN = 0V to VCC, TAC = 0°C to 70°C-3.03.0
Input Low Voltage-0.6V
x 0.3V
CC
Input High VoltageVCC x 0.7VCC + 0.5V
Output Low Voltage
Output High VoltageIOH = -1.6 mAVCC - 0.8V
4.5V ≤ V
≤ 5.5V
CC
Output Low Voltage
Output High VoltageIOH = -100 µAV
1.8V ≤ V
and VIH max are reference only and are not tested.
IL
≤ 3.6V
CC
I
= 3.0 mA0.4V
OL
I
= 0.15 mA0.2V
OL
- 0.2V
CC
µ
A
µ
A
µ
A
µ
A
µ
A
3
AC Characteristics
Applicable over recommended operating range from TA = -40°C to +85°C, VCC = As Specified,
= 1 TTL Gate and 30 pF (unless otherwise noted).
C
L
SymbolParameterVoltageMinMaxUnits
f
SCK
SCK Clock Frequency
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
0
0
0
10
5
TBD
MHz
t
t
t
t
t
t
t
t
RI
FI
WH
WL
CS
CSS
CSH
SU
Input Rise Time
Input Fall Time
SCK High Time
SCK Low Time
CS High Time
CS Setup Time
CS Hold Time
Data In Setup Time
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
40
80
TBD
40
80
TBD
50
100
TBD
50
100
TBD
50
100
TBD
12
20
TBD
2
2
TBD
2
2
TBD
µ
µ
ns
ns
ns
ns
ns
ns
s
s
4.5 - 5.5
t
H
Data In Hold Time
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
t
HD
Hold Setup Time
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
t
CD
Hold Hold Time
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
t
V
Output Valid
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
t
HO
Output Hold Time
2.7 - 5.5
1.8 - 3.6
4
AT25HP256/512
10
20
TBD
25
50
TBD
25
50
TBD
0
0
0
0
0
0
40
80
TBD
ns
ns
ns
ns
ns
AT25HP256/512
AC Characteristics (Continued)
Applicable over recommended operating range from TA = -40°C to +85°C, VCC = As Specified,
= 1 TTL Gate and 30 pF (unless otherwise noted).
C
L
SymbolParameterVoltageMinMaxUnits
t
LZ
t
HZ
t
DIS
t
WC
Endurance
Note:1. This parameter is characterized and is not 100% tested.
Hold to Output Low Z
Hold to Output High Z
Output Disable Time
Write Cycle Time
(1)
5.0V, 25°C, Page Mode
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
4.5 - 5.5
2.7 - 5.5
1.8 - 3.6
0
0
0
100K
100
200
TBD
100
200
TBD
100
100
TBD
5
10
TBD
Write
Cycles
ns
ns
ns
ms
5
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