ATMEL AT25128N1-10SI-2.7, AT25128N1-10SI-1.8, AT25128N1-10SI, AT25128N1-10SC-2.7, AT25128N1-10SC-1.8 Datasheet

SPI Serial
E2PROMs

128K (16384 x 8)

AT25128
Preliminary

Features

Serial Peripheral Inte rfac e (SPI) Compatible

•

Supports SPI Modes 0 (0, 0) an d 3 (1, 1)

•

Low Voltage and Standard Voltage Operation

•

5.0 (VCC = 4.5V to 5.5V)

2.7 (VCC = 2.7V to 5.5V)

1.8 (VCC = 1.8V to 3.6V)

2.1 MHz Clock Rate

•

32-Byte Page Mode

•

Block Write Protection

•

Protect 1/4, 1/2, or Entire Array

Write Protect (WP) Pin and Write Disa bl e Instructions for

•

Both Hardware and Software Data Protection
Self-Timed Write Cycle (5 ms Typical)

•

High Reliabili ty

•

Endurance: 100, 000 Cycles
Data Retention: 100 Years

Automotive Grade and Extended Temperature Dev ic es Available

•

8-Pin PDIP, 14-pin, 16-pi n JEDEC SOIC, and 20-Pi n TSSOP Pac ka ge s

•

Description

The AT25128 provides 131,072 bits of serial electrically erasable programmable read
only memory (EEPROM) organized as 16,384 words of 8 bits each. The device is
optimized for use in many industrial and commercial applications where low power
and low voltage operation are essential. The AT25128 is available in space saving
8-pin PDIP, JEDEC SOIC, and 14-pin and 20-pin TSSOP packages.

Pin Configurations

Pin Name Function

CS Chip Select
SCK Serial Data Clock
SI Serial Data Input
SO S eri al Data Out put
GND Ground
V

CC

WP Write Protect

Power Supply

HOLD Suspends Serial Input
NC No Connec t
DC Don’ t Connect

CS
SO
NC
NC
NC
NC

WP

GND

16-Lead SOIC

1
2
3
4
5
6
7
8

16
15
14
13
12
11
10

9

CS
SO

WP

GND

VCC
HOLD
NC
NC
NC
NC
SCK
SI

8-Pin PDIP

1

8

2

7

3

6

4

5

VCC
HOLD
SCK
SI

20-Lead TSSOP*

1

NC

2

CS

3

SO

4

SO

5

NC

6

NC

7

WP

8

GND

9

DC

10

NC

14-Pin SOIC

CS

1

SO

2

NC

3

NC

4

NC

5

WP

6

GND

7

20

NC

19

VCC

18

HOLD

17

HOLD

16

NC

15

NC

14

SCK

13

SI

12

DC

11

NC

(continued)

14

VCC

13

HOLD

12

NC

11

NC

10

NC

9

SCK

8

SI

* Note: Pins 3, 4 and 17, 18 are internally connected for 14-lead TSSO P sock et com pati bil it y.

Description (Continued)

The AT25128 is enabled through the Chip Select pin ( CS)
and accessed via a 3-wire interface consisting of Serial
Data Input (SI), Serial Data Output (SO), and Serial Clock
(SCK). All programming cycles are completely self-timed,
and no separate ERASE cycle is required before WRITE.

BLOCK WRITE protection is enabled by programming the
status register with one of four blocks of write protection.
Separate prog ram enable and program disab le instruc-

Absolute Maximum Rat ings*

Operating Temperature...................-55°C to +125°C

Storage Temperature...................... -65°C to +150°C

Voltage on Any Pin

with Respect to Ground ..................... -1.0V to +7.0V

Maximum Operating Voltage ........................... 6.25V

DC Output Current.........................................5.0 mA

tions are provided for additional data protection. Hardware
data protection is provided via the
against inadvertent write attempts to the status register.

HOLD pin may be used to suspend any serial commu-

The
nication without resetting the serial sequence.

*NOTICE: Stresses beyond those listed unde r “Absolu te Maxi-

mum Ratings” may cause permanent da ma ge to th e de vice .
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi­cated in the operational sections of this specification is not
implied. Exposure to absolute maximu m rat ing conditions
for extended periods may affect device reliability.

WP pin to protect

Block Diagram

2 AT25128

AT25128

Pin Capacitance

(1)

Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +5.0V (unless otherwise noted).

Test Conditions Max Units Conditions

C

OUT

C

IN

Note: 1. This parameter is characte riz ed and is no t 10 0% tes te d.

Output Capacitance (SO) 8 pF V
Input Capacitance (CS, SCK, SI, WP, HOLD) 6 pF VIN = 0V

OUT

= 0V

DC Characteristics

Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V,

= 0°C to +70°C, VCC = +1.8V to +5.5V (unless otherwise noted).

T

AC

Symbol Parameter Test Condition Min Typ Max Units

V

Supply Voltage 1.8 3.6 V

CC1

V

CC2

V

CC3

I

CC1

I

CC2

Standby Current VCC = 1.8V CS = V

I

SB1

I

SB2

I

SB3

I

IL

I

OL

(1)

V

IL

(1)

V

IH

V

OL1

V

OH1

V

OL2

V

OH2

Note: 1. VIL min and VIH max are reference only and are not tested.

Supply Voltage 2.7 5.5 V
Supply Voltage 4.5 5.5 V

= 5.0V at 1 MHz,

V

Supply Current

Supply Current

CC

SO = Open

= 5.0V at 2 MHz,

V

CC

SO = Open

Standby Current VCC = 2.7V CS = V
Standby Current VCC = 5.0V CS = V

CC
CC
CC

0.2 0.5 µA

0.5 2.0 µA

3.0 mA

5.0 mA

0.1 µA

Input Leakage VIN = 0V to VCC -3.0 3.0 µA

= 0V to VCC,

V

Output Leakage
Input Low Voltage -1.0 V

IN

T

= 0°C to 70°C

AC

-3.0 3.0 µA
x 0.3 V

CC

Input High Voltage VCC x 0.7 VCC + 0.5 V
Output Low Voltage

4.5V ≤ V

Output High Voltage IOH = -1.6 mA VCC - 0.8 V
Output Low Voltage

1.8V ≤ V

Output High Voltage IOH = -100 µAVCC - 0.2 V

≤ 5.5V

CC

≤ 3.6V

CC

I

= 3.0 mA 0.4 V

OL

I

= 0.15 mA 0.2 V

OL

3

AC Characteristics

Applicable over recommended operating range from TA = -40°C to +85°C, VCC = As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).

Symbol Parameter Voltage Min Max Units

2.1

2.1

0.5
2

2
2

2
2
2

200
200
800

100
100
100

MHz

f

SCK

t

RI

t

FI

t

WH

t

WL

t

CS

t

CSS

t

CSH

t

SU

t

H

t

HD

t

CD

t

V

t

HO

t

LZ

SCK Clock Frequency

Input Rise Time

Input Fall Time

SCK High Time

SCK Low Time

CS High Time

CS Setup Time

CS Hold Time

Data In Setup Time

Data In Hold Time

Hold Setup Time

Hold Hold Time

Output Valid

Output Hold Time

Hold to Output Low Z

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

4.5 - 5.5

2.7 - 5.5

1.8 - 3.6

0
0
0

200
300
800

200
200
800

250
250

1000

250
250

1000

250
250

1000

50
50

100

50
50

100
100

100
400

100
100
400

0
0
0

0
0
0

0
0
0

µs

µs

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

4 AT25128

(continued)