ATMEL AT24C21-10PI-2.5, AT24C21-10PC-2.5, AT24C21-10SI-2.5, AT24C21-10SC-2.5 Datasheet

Features
2-Wire Serial Interface
Schmitt Trigger, Filtered Inputs For Noise Suppression
DDC1™/ DDC2™ Interface Compliant for Monitor Identification
Low Voltage Operatio n
– 2.5 (VCC = 2.5V to 5.5V)
Internally Organized 128 x 8
100 kHz (2.5V) Compatibility
8-Byte Page Write Mode
Write Protection Available
Self-timed Write Cycle (10 ms max)
High Reliability
– Endurance: 1 Million Write Cycles – Data Retention: 100 Years – ESD Protection: >3000V
8-Pin PDIP and JEDEC SOIC Packages
Description
The AT24C21 provides 1024 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 128 words of 8 bits each. The device is optimized for use in applications requiring data storage and serial transmission of con­figuration and control information. The AT24C21 features two modes of operation: Transmit-Only Mode and Bi directio nal Mode. Upo n power- up, the AT24C21 will be in the Transmit-Only Mode, sending a serial-bit stream of the entire m emory contents, clocked via the VCLK pin. The Bidirect ional Mode is selected by a val id high-to-low transition on the SCL pi n an d off ers b yte sel ect able read /wri te c apab ility of the enti re memory array. The A T24C2 1 i s av ailab le in s pac e sa vi ng 8-pi n PDIP a nd 8- pi n S OIC packages.
2-Wire Serial EEPROM
1K (128 x 8)
AT24C21
Pin Configurations
Pin Name Function
NC No Connect SDA Serial Data SCL Serial Clock Input
(Bidirectional Mode)
VCLK Serial Clock Input
(Transmit-Only Mode)
8-Pin PDIP 8-Pin SOIC
2-Wire, 1K Serial EEPROM
Rev. 0405E–07/98
1
Absolute Maximum Ratings*
Operating Temperature................................. -55°C to +125°C
Storage Temperature .................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground.....................................-1.0V to +7.0V
Maximum Operating Voltage........................................... 6.25V
DC Output Current........................................................5.0 mA
Block Diagram
*NOTICE: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam­age to the dev ice . This is a s tress rating only an d functional oper ation of the device at thes e or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions f or e xtended periods ma y af fect de vice reliability .
Pin Description
SERIAL CLOCK (SCL):
edge clock data into each EEPROM device and negative edge clock data out of each device.
SERIAL DATA (SDA):
serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open drain or open collector devices.
2
The SCL input is used to positive
The SDA pin is bidirectional for
AT24C21
SERIAL CLOCK (VCLK):
the Transmit-Only mode and will transmit the entire mem­ory contents via the SDA pin with positive signals on the VCLK pin.
Upon power-up, the device is in
Memory Organization
AT24C21, 1K SERIAL EEPROM:
128 pages of one byte each. The 1K requires a 7-bit data word address for random word addressing.
Internally organized wi th
AT24C21
DC Characteristics
Applicable ov er recommen ded operat ing range from: TAI = -40°C to +85°C, TAC = 0°C to +70°C, VCC = +2.5V to +5.5V (unless otherwise noted).
Symbol Parameter Test Condition Min Typ Max Units
V
CC
I
CC
I
CC
I
SB
I
LI
I
LO
V
IL
V
IH
V
OL
Supply Voltage 2.5 5.5 V Supply Current VCC = 5.0V READ at 100 KHz 0.4 1.0 mA Supply Current VCC = 5.0V WRITE at 100 KHz 2.0 3.0 mA
Standby Current .......VCC = 2.5V
.......VCC = 5.0V
Input Leakage Current VIN = VCC or V Output Leakage Current V Input Low Level
(1)
SCL, SDA Pin
Input Low Level VCLK Pin VCC ≥ 2.7V
Input High Level
(1)
SCL, SDA Pin Input High Level VCLK Pin
VIN = VCC or V VIN = VCC or V
= VCC or V
OUT
V
< 2.7V
CC
SS SS
SS
SS
3.0
12.0
0.10 1.0
0.05 1.0
-0.6 V
VCC × 0.7
2.0
4.0
30.0
× 0.3
CC
0.8
0.2 × V
CC
VCC + 0.5 V
Output Low Level VCC = 3.0V IOL = 2.1 mA 0.40 V
Note: 1. VIL min and VIH max are for reference only and not tested.
Pin Capacitance
(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +1.8V.
Symbol Test Condition Max Units Conditions
C
I/O
C
IN
Note: 1. This parameter is characterized and is not 100% tested.
Input/Out put Capacitance (SDA) 8 pF V
I/O
= 0V
Input Capacitance (A0, A1, A2, SCL, VCLK) 6 pF VIN = 0V
µ
A
µ
A
µ
A
µ
A
V V V
V
Transmit-Only Mode
Symbol Parameter 2.5-volt Units
Min Max
T T T T T
VAA
VHIGH
VLOW
VHZ
VPU
Output valid from VCLK 500 ns VCLK high-time 4.0 VCLK low-time 4.7 Mode transition time 500 ns Transmit-Only power-up time 0 ns
µ
s
µ
s
3
AC Characteristics
Applicable over recommended operating range from TA = -40°C to +85°C, VCC = +2.5V to +5.5V CL = 1 TTL Gate and 100 pF (unless otherwise noted).
2.5-volt
Symbol Parameter
f
SCL
t
LOW
t
HIGH
t
I
Clock Frequency, SCL 0 100 KHz Clock Pulse Width Low 4.7 Clock Pulse Width High 4.0 Noise Suppression Time
(1)
(SDA and SCL pins)
t t
AA
BUF
Clock Low to Data Out Valid 0.1 3.5 Time the bus must be free before a new
transmission can start
t
HD.STA
t
SU.STA
t
HD.DAT
t
SU.DAT
t
R
t
F
t
SU.STO
t
DH
t
WR
Endurance
(1)
Start Hold Time 4.0 Start Set-up Time 4.7 Data In Hold Time 0 Data In Set-up Time 250 ns Inputs Rise Time Inputs Fall Time
(1)
(1)
Stop Set-up Time 4.0 Data Out Hold Time 100 ns Write Cycle Time 10 ms
5.0V, 25°C, Page Mode 1M Write Cycles
Note: 1. This parameter is characterized and is not 100% tested.
4.7
UnitsMin Max
µ µ
NA ns
µ µ
µ µ µ
1.0
µ
300 ns
µ
s s
s s
s s s
s
s
4
AT24C21
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