Atmel AT24C16C Datasheet

Atmel-8719D-SEEPROM-AT24C16C-Datasheet_122016

Standard Features

 Low-voltage and Standard-voltage Operation

 VCC = 1.7V to 5.5V

 Internally Organized as 2,048 x 8 (16K)

 I

2

C-compatible (2-wire) Serial Interface

 Schmitt Trigger, Filtered Inputs for Noise Suppression

 Bidirectional Data Transfer Protocol

 1MHz (2.5V, 2.7V, 5V), 400kHz (1.7V) Compatibility

 Write Protect Pin for Hardware Data Protection

 16-byte Page Write Mode

 Partial Page Writes Allowed

 Self-timed Write Cycle (5ms Max)

 High-reliability

 Endurance: 1,000,000 Write Cycles
 Data Retention: 100 Years

 Green Package Options (Pb/Halide-free/RoHS Compliant)

 8-lead PDIP, 8-lead SOIC, 8-lead TSSOP, 8-pad UDFN, 8-pad XDFN,

5-lead SOT23, and 8-ball VFBGA

 Die Options: Wafer Form and Tape and Reel

Description

The Atmel® AT24C16C provides 16,384 bits of Serial Electrically Erasable and
Programmable Read-Only Memory (EEPROM) organized as 2,048 words of 8 bits
each. The device is optimized for use in many industrial and commercial
applications where low-power and low-voltage operation are essential.
AT24C16C is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead
TSSOP, 8-pad UDFN, 8-pad XDFN, 5-lead SOT23, and 8-ball VFBGA packages
and is accessed via a 2-wire serial interface.

AT24C16C

I2C-Compatible, (2-Wire) Serial EEPROM

16-Kbit (2048 x 8)

DATASHEET

AT24C16C [DATASHEET]

Atmel-8719D-SEEPROM-AT24C16C-Datasheet_122016

2

1. Pin Configurations and Pinouts

Table 1. Pin Configuration

2. Absolute Maximum Ratings

Pin Name Function

NC No Connect

SDA Serial Data

SCL Serial Clock Input

WP Write Protect

GND Ground

V

CC

Power Supply

1

2

3

4

8

7

6

5

NC

NC

NC

GND

V

CC

WP

SCL

SDA

8-lead PDIP

1

2

3

5

4

SCL

GND

SDA

WP

V

CC

5-lead SOT23

V

CC

WP

SCL

SDA

NC

NC

NC

GND

1

2

3

4

8

7

6

5

8-ball VFBGA

Bottom View

Note: Drawings are not to scale.

8-pad UDFN/XDFN

Bottom View

Top ViewTop View

Top View

Top View

V

CC

WP

SCL

SDA

NC

NC

NC

GND

1

2

3

4

8

7

6

5

8-lead TSSOP

1
2
3
4

8
7
6
5

NC
NC
NC

GND

V

CC

WP
SCL
SDA

8-lead SOIC

NC

NC

NC

GND

V

CC

WP

SCL

SDA

1

2

3

4

8

7

6

5

Operating Temperature . . . . . . . . . . .-55C to +125C

Storage Temperature . . . . . . . . . . . . .-65C to +150C

Voltage on any pin

with respect to ground . . . . . . . . . . . . . -1.0V to +7.0V

Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V

DC Output Current . . . . . . . . . . . . . . . . . . . . . . .5.0mA

*Notice: Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent damage
to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.

3

AT24C16C [DATASHEET]

Atmel-8719D-SEEPROM-AT24C16C-Datasheet_122016

3. Block Diagram

4. Pin Description

Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative

edge clock data out of each device.

Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may
be wire-ORed with any number of other open-drain or open-collector devices.

Device/Page Addresses: The AT24C16C does not use the device address pins, which limits the number of
devices on a single bus to one (see Section 7. “Device Addressing” on page 9).

Write Protect (WP): AT24C16C has a Write Protect pin that provides hardware data protection. The Write
Protect pin allows normal Read/Write operations when connected to Ground (GND). When the Write Protect pin
is connected to VCC, the Write Protection feature is enabled and operates as shown in Table 4-1.

Table 4-1. Write Protect

Start
Stop

Logic

Data Word

ADDR/Counter

Row Decoder

Device

Address

Comparator

Data Latches

D

OUT

/ ACK

Logic

Column
Decoder

EEPROM

Array

Serial

Control

Logic

High Voltage

Pump & Timing

Serial MUX

Read/Write

Enable

COMP

Load

INC

V

CC

GND

WP

SCL

SDA

D

OUT

D

IN

A

2

A

1

WP Pin Status Part of the Array Protected

At V

CC

Full Array

At GND Normal Read/Write Operations

AT24C16C [DATASHEET]

Atmel-8719D-SEEPROM-AT24C16C-Datasheet_122016

4

5. Memory Organization

AT24C16C, 16K Serial EEPROM: Internally organized with 128 pages of 16 bytes each, the 16K requires a

11-bit data word address for random word addressing.

5.1 Pin Capacitance

Table 5-1. Pin Capacitance

(1)

Note: 1. This parameter is characterized and is not 100% tested.

5.2 DC Characteristics

Table 5-2. DC Characteristics

Note: 1. VIL min and V

IH

max are reference only and are not tested.

Applicable over recommended operating range from T

A

= 25°C, f = 1.0MHz, VCC = 5.5V.

Symbol Test Condition Max Units Conditions

C

I/O

Input/Output capacitance (SDA) 8 pF V

I/O

= 0V

C

IN

Input capacitance (A0, A1, A2, SCL) 6 pF VIN = 0V

Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = 1.7V to 5.5V (unless otherwise noted).

Symbol Parameter Test Condition Min Typ Max Units

V

CC1

Supply Voltage 1.7 5.5 V

I

CC

Supply Current VCC = 5.0V Read at 100kHz 0.4 1.0 mA

I

CC

Supply Current VCC = 5.0V Write at 100kHz 2.0 3.0 mA

I

SB1

Standby Current VCC = 1.7V VIN = VCC or V

SS

1.0 μA

I

SB2

Standby Current VCC = 5.5V VIN = VCC or V

SS

6.0 μA

I

LI

Input Leakage Current VIN = VCC or V

SS

0.10 3.0 μA

I

LO

Output Leakage Current V

OUT

= V

CC

or V

SS

0.05 3.0 μA

V

IL

Input Low Level

(1)

–0.6 VCC x 0.3 V

V

IH

Input High Level

(1)

VCC x 0.7 VCC + 0.5 V

V

OL2

Output Low Level VCC = 3.0V IOL = 2.1mA 0.4 V

V

OL1

Output Low Level VCC = 1.7V IOL = 0.15mA 0.2 V

5

AT24C16C [DATASHEET]

Atmel-8719D-SEEPROM-AT24C16C-Datasheet_122016

5.3 AC Characteristics

Table 5-3. AC Characteristics

Note: 1. This parameter is ensured by characterization only.

Applicable over recommended operating range from T

AI

= -40C to 85C, VCC = +1.7V to 5.5V, CL = 1TTL Gate and 100pF

(unless otherwise noted).

Symbol Parameter

1.7V 2.5V, 2.7V, 5.0V

UnitsMin Max Min Max

f

SCL

Clock Frequency, SCL 400 1000 kHz

t

LOW

Clock Pulse Width Low 1.2 0.4 μs

t

HIGH

Clock Pulse Width High 0.6 0.4 μs

t

I

Noise Suppression Time 100 50 ns

t

AA

Clock Low to Data Out Valid 0.1 0.9 0.05 0.55 μs

t

BUF

Time the bus must be free before a new
transmission can start.

1.2 0.5 μs

t

HD.STA

Start Condition Hold Time 0.6 0.25 μs

t

SU.STA

Start Condition Setup Time 0.6 0.25 μs

t

HD.DAT

Data In Hold Time 0 0 μs

t

SU.DAT

Data In Setup Time 100 100 ns

t

R

Inputs Rise Time

(1)

0.3 0.3 μs

t

F

Inputs Fall Time

(1)

300 100 ns

t

SU.STO

Stop Condition Setup Time 0.6 .25 μs

t

DH

Data Out Hold Time 50 50 ns

t

WR

Write Cycle Time 5 5 ms

Endurance

(1)

3.3V, 25C, Page Mode 1,000,000 Write Cycles

AT24C16C [DATASHEET]

Atmel-8719D-SEEPROM-AT24C16C-Datasheet_122016

6

6. Device Operation

Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin

may change only during SCL low time periods. Data changes during SCL high periods will indicate a Start or
Stop Condition as defined below.

Figure 6-1. Data Validity

Start Condition: A high-to-low transition of SDA with SCL high is a Start Condition which must precede any

other command.

Stop Condition: A low-to-high transition of SDA with SCL high is a Stop Condition. After a read sequence, the
Stop Condition command will place the EEPROM in a standby power mode.

Figure 6-2. Start Condition and Stop Condition Definition

SDA

SCL

Data Stable Data Stable

Data

Change

SDA

SCL

Start

Condition

Stop

Condition

7

AT24C16C [DATASHEET]

Atmel-8719D-SEEPROM-AT24C16C-Datasheet_122016

Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in eight bit
words. The EEPROM sends a zero to acknowledge that it has received each word. This happens during the
ninth clock cycle.

Figure 6-3. Output Acknowledge

Standby Mode: The AT24C16C features a low-power standby mode which is enabled:

 Upon power-up.

 After the receipt of the Stop Condition and the completion of any internal operations.

2-wire Software Reset: After an interruption in protocol, power loss or system reset, any 2-wire part can be
reset by following these steps:

1. Create a Start Condition (if possible).

2. Clock nine cycles.

3. Create another Start Condition followed by Stop Condition as shown below.

The device should be ready for the next communication after above steps have been completed. In the event
that the device is still non-responsive or remains active on the SDA bus, a power cycle must be used to reset
the device.

Figure 6-4. Software Reset

SCL

DATA IN

DATA OUT

Start

Condition

Acknowledge

9

8

1

SCL

9

Start

Condition

Start

Condition

Stop

Condition

8321

SDA

Dummy Clock Cycles