Datasheet AT16646G-20YC, AT16646G-20XC, AT16646F-25YC, AT16646F-25XC Datasheet (ATMEL)

Features

Fastest Propagation Speeds in the Industry T

•

Maximum derating for capacitive loads 1.5ns/100 pF (F grade) and 1.1ns/100 pF

•

PD (F grade)

(G grade)
Very low ground bounce < 0.6 V @ VCC=5.00 V, Ta=25°C

•

Typical output skew ≤0.25ns

•

Bus Hold circuitry to retain last active state during Tri-State

•

Available in SSOP and TSSOP packages

•

= 2.5 ns, T



PD (G grade)

AT16646

= 2.0 ns

Description

Atmel’s AT16646 devices are 16-bit high speed, low power Tri-statable D type
registers, ideal for use in systems r equiring both transparent and registered mode
functions. They are organized as two separate 8-bit bus transceivers. Data flow is
bi-directional, and can be controlled for multiplexed transmission between A bus and
B bus either directl y or from the D registers by use of the direction control pin (xDi r),
output enable (xOE), and select lines (xSAB and xSBA). Storage of data on the A bus
and B bus is controlled by the outpu t pins. They have very low ground bounce and
excellent input noise rejection, giving the user stable signals in a high speed
envi ronment . The Bus H old feat ure e liminates the need for p ull-up or p ull-dow n
resistors and retains the last active state during a Tri-State event.

Functional Block Diagra m

AT16646



Fast Logic
16-Bit



Tri-State
Register

AT16646F
AT16646G

Pin Configurations

Pin Names Descriptions

xDir, xO E Output Enable Inpu ts

xCLKAB,xC LKBA Clock Pulse Inputs

xSAB , xSBA Output Data Source Sel ect Inputs

xAχ Data Register A Input s

Data Register B Outp uts

xBχ Data Register B Input s

Data Register A Outp uts

1DIR

1SAB

VCC

GND

GND

2CLKAB

1A1

1A4

1A7
2A1
2A3
2A4
2A6
2A7

SSOP/TSSOP

1CLKAB

GND

1A2
1A3
1A5

11

1A6

13

1A8

15

2A2

17

GND

19

2A5

21

VCC

23

2A8

25

2SAB

27

2DIR

1

2

3

4

5

6

7

8

9

10
12
14
16
18
20
22
24
26
28

Top View

56

55

54

53

52

51

50

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

31

30

29

1CLKBA
GND
1B2
1B3
1B5
1B6
1B8
2B2
GND
2B5
VCC
2B8
2SBA
2OE

1

OE
1SBA
1B1
VCC
1B4
GND
1B7
2B1
2B3
2B4
2B6
2B7
GND
2CLKBA

0757B

5-21

Function Table

(1)

Inp u ts Dat a I/O

(2)

xOE xDir xCLKAB xC LKB A xSAB xSBA xAχ xBχ

H
H

L
L

L
L

Notes: 1. H = High voltage level, L = Low voltage level, X = Don’t care, ↑ = Low-to-High transition

X
X

L
L

H
H

2. The data output functions may be enabled or disabled by various signals at the x
are always enabled, i.e. data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs.

H or L

↑

X
X

X

H or L

H or L

↑

X

H or L

X
X

X
X

X
X

L
H

X

Input Input Isolation

X
L

Output Input Real Ti me B Data t o A Bus

H
X

Input Output Real Time A Data to B Bus

X

OE or xDir inputs. Data input functions

Operation or Funct ion

Store A and B Data

Stored B Data to A Bus

Stored A Data to B Bus

Absolute Maximum Ratings*

Operating Temperature........................0°C to +70°C

Storage Temperature. ........ ..... ........-65°C to +150°C

Voltage on any Pin

with Respect to Ground.................-2.0 V to +7.0 V

Maximum Operating Voltage..............................6.0V

5.0 Volt DC Characteristics

(1)

*NOTICE: Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation
of the device at these or any other conditions beyond those
indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.

Notes: 1. Minimum voltage is -0.6 V dc which may

undershoot to -2.0 V for pulses of less than 20 ns.
Maximum output pin voltage is V
which may overshoot to +7.0 V for pulses of less
than 20 ns.

+0.75 V dc

CC

Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = +5.0V +/- 5% (unless otherwise noted)

Symbol Parameter Test Conditio ns Min Typ Max Units

∆I

CC

Quiescent Power Supply

VCC = Max, VIN = 3.4 V 0.8 1.2 mA

Current

V

IH

V

IL

I

IH

I

IL

I

OZ

VOH(1) Output High Voltage

VOH(2) Output High Voltage

V

OL

V

OL

Note: 1. F grade: At V

2. G grade: At V

Input High Voltage 2.0 V
Input Low Voltage 0.8 V
Input Hi gh C urrent (I/O Pins) VIN = V

CC

±15 µA
Input Low Current (I/O Pins) VIN = GND ±15 µ A
Output Leakage Current ±10 µA

F Grade only

G Grade only

VCC = 4.75 V
IOH = -10 mA

VCC = 4.75 V
IOH = -12 mA

2.7 V

2.7 V

Output Low Volta ge ( F G ra de) IOL = 10 mA 0.55 V
Output Low Volta ge ( G Grade) IOL = 12 mA 0.55 V

CC (max)

CC (max)

, the value of V

, the value of V

OH(max)

= 3.75 V and at V

OH(max)

= 3.75 V and at V

CC(min)

CC(min)

, V

, V

OH(max)

OH(max)

= 3.25 V

= 3.35 V

5-22

AT16646

AT16646

AC Characteristics
AT16646F

Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = 5.0V +/- 5% (unless otherwise noted)

Symbol Parameter Test Conditions

t

PHL

t

PLH

t

PZH

t

PZL

t

PHZ

tPLZ

Propagation Delay CL = 50 pF 2.5 ns

Output Enable Time CL = 50 pF 7.4 ns

Output Disable Time CL = 50 pF 6.4 ns

tSK(1) Output Skew CL = 50 pF 0.5 ns

∆t

∆t

PHL

t

t

(1)

PLH
su
H

Propagation Delay vs Output Loading 1.3 1.5 ns/100 pF

Set-up Time Bus to Clock CL = 50 pF 2.0 ns

Hold Time Bus to Clock CL = 50 pF 2.0 ns

Note: 1. This parameter is guaranteed but not 100% tested.

AT16646G

Applicable over recommended operating range from Ta = 0°C to +70°C, VCC = 5.0V +/- 5% (unless otherwise noted)

Symbol Parameter Test Conditions

t

PHL

t

PLH

t

PZH

t

PZL

t

PHZ

tPLZ

tSK(1) Output Skew CL = 50 pF 0.5 ns

∆t

(1)

PHL

∆t

PLH

t

su

t

H

Note: 1. This parameter is guaranteed but not 100% tested.

Test Circuits

Generator

Note: 1. Pulse Generator: Rate ≤ 1.0 MHz, tF ≤ 2. 5 ns,

tR ≤ 2. 5 ns.

2. AC tests ar e done wi th a single bi t swit c hing, and
timings need to be derated when mult ip le out put s are
swi tching in t he same di rec tion s imultaneously. This
derating should not exceed 0.5 ns for 16 inputs switching
simultaneously.

Propagation Delay vs Output Loading 0.9 1.1 ns/100 pF

(1,2)

V

Pulse

Propagation Delay CL = 50 pF 2.0 ns

Output Enable Time CL = 50 pF 7.4 ns

Output Disable Time CL = 50 pF 5.8 ns

Set-up Time Bus to Clock CL = 50 pF 2.0 ns

Hold Time Bus to Clock CL = 50 pF 2.0 ns

Swi t ch Po si tion

V

CC

IN

R

T

D.U.T.

V

OUT

50 pF

C

L

500Ω

500Ω

7.0V

All Ot her Tests Open

Definitions:

= Load capacitance; Includes jig and probe capacitance.

C

L

R

= Termination resistance; Should be equal to Z

T

Pulse Generator.

(1)

Min Typ Max Units

(1)

Min Typ Max Units

Test Switch

Open Drain

Disable Low

Enable Low

Closed

OUT

of the

5-23

IOL Pull Down Current

160
120

80

OL

I,mA

40

0

-40

Time

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

-0.5

-1.0

Output, V

I

OL

Output, V

Ground Bounce for
High to Low Transitions

3.5

3.0

2.5

2.0

1.5

Volts

1.0

0.5

0.0

-0.5

VOLP

VOLV

Time

(1)

gnd - measured on
output with input
held constant

output

Supply Bounce for
Low to High Transitions

4.5
4

3.5

VOHV

3

2.5

2

Volts

1.5

1

0.5
0

VOHP

Time

(2)

vcc ­measured on
output with
input held
constant

output

Typical Values

Parameter Value Units

V

OLP

V

OLV

V

OHV

V

OHP

Note: 1. When multiple outputs are switched at the same time, rapidly changing current on the ground and VCC path causes a

voltage to develop across the parasitic inductance of the wire bond and package pins. This occurrence is called
simultaneous switching noise. Atmel’s AT16646 products have minimized this phenomenon as shown on the graph.
Output data is for 15 outputs switching simultaneously at a frequency of 1 MHz. The ground data is measured on the
one remaining output, which is set to logic low and will reflect any device ground movement.

2. As on the graph for Ground Bounce, a similar condition occurs for low to high transitions. Output data is for 15
outputs switching simultaneously at a frequency of 1 MHz. V
pin, which is set to a logic high. This output will reflect any movement on the device V

0.4 V

-0.26 V

VCC - 0.13 V

VCC + 0.6 V

droop is measured on the one remaining output

CC

CC

.

5-24

AT16646

Propagation Delay Waveforms

AT16646

Input

Transition

1.5 V 1.5 V

t

PLH

t

PHL

Output

Transition

Enable and Disable Waveforms

Enable

(1)

Disable

Control

Input

Output

Switched

t

PZL

Switch Closed

1.5 V

t

PLZ

Low

t

t

PZH

PHZ

Output

Switched

High

Note: 1. Enable and disable waveforms are the same for both xOE and xDIR inputs.

Switch Open

1.5 V

0.3 V

0.3 V

VOH

1.5 V

VOL

3.0 V

1.5 V

0V

3.5 V

V

OL

V

OH

0V

5-25

Ordering Information

T

PD

2.5 ns

2.0 ns

Ordering Cod e Package O peration Range

AT16646F - 25YC
AT16646F - 25XC

AT16646G - 20YC
AT16646G - 20XC

56Y
56X

56Y
56X

Commercial

Commercial

56X
56Y

5-26

Package Type

56 Pin, Plastic Thin Shrink Small Ou tline Package (TSSOP)
56 Pin, Plastic Shrink Small Outline Package (SSOP)

AT16646