ATI AXIOM-AFFII M56-P A RANK DDR2 Schematics

5

4

3

2

1

AJ31

AH31

AH30
AG30

AG32

AF32

AF31

AE31

AE30
AD30

AD32
AC32

AC31
AB31

AB30
AA30

AA32

Y32

Y31

W31

W30

V30

U1A

PCIE_RX0P
PCIE_RX0N

PCIE_RX1P
PCIE_RX1N

PCIE_RX2P
PCIE_RX2N

PCIE_RX3P
PCIE_RX3N

PCIE_RX4P
PCIE_RX4N

PCIE_RX5P
PCIE_RX5N

PCIE_RX6P
PCIE_RX6N

PCIE_RX7P
PCIE_RX7N

PCIE_RX8P
PCIE_RX8N

PCIE_RX9P
PCIE_RX9N

PCIE_RX10P
PCIE_RX10N

PART 1 OF 7

P
C
I

­E
X
P
R
E
S
S

I
N
T
E
R
F
A
C
E

PCIE_TX0P
PCIE_TX0N

PCIE_TX1P
PCIE_TX1N

PCIE_TX2P
PCIE_TX2N

PCIE_TX3P
PCIE_TX3N

PCIE_TX4P
PCIE_TX4N

PCIE_TX5P
PCIE_TX5N

PCIE_TX6P
PCIE_TX6N

PCIE_TX7P
PCIE_TX7N

PCIE_TX8P
PCIE_TX8N

PCIE_TX9P
PCIE_TX9N

PCIE_TX10P
PCIE_TX10N

AK27
AJ27

AJ25
AH25

AH28
AG28

AG27
AF27

AF25
AE25

AE28
AD28

AD27
AC27

AC25
AB25

AB28
AA28

AA27
Y27

Y25
W25

PCIE_TXP0
PCIE_TXN0

PCIE_TXP1
PCIE_TXN1

PCIE_TXP2
PCIE_TXN2

PCIE_TXP3
PCIE_TXN3

PCIE_TXP4
PCIE_TXN4

PCIE_TXP5
PCIE_TXN5

PCIE_TXP6
PCIE_TXN6

PCIE_TXP7
PCIE_TXN7

PCIE_TXP8
PCIE_TXN8

PCIE_TXP9
PCIE_TXN9

PCIE_TXP10
PCIE_TXN10

PCIE_REFCLKP(9)
PCIE_REFCLKN(9)

PCIE_RST_BUF#(9)
PCIE_RXP[15..0](9)

PCIE_RXN[15..0](9)
PCIE_TXP[15..0](9)
PCIE_TXN[15..0](9)

PCIE_REFCLKP
PCIE_REFCLKN

PCIE_RST_BUF#
PCIE_RXP[15..0]
PCIE_RXN[15..0]
PCIE_TXP[15..0]
PCIE_TXN[15..0]

TP6
35mil

DNI

TP1
35mil

TP2
35mil

TP3
35mil

DNI

DNI

DNI

D D

C C

PCIE_RXP0
PCIE_RXN0

PCIE_RXP1
PCIE_RXN1

PCIE_RXP2
PCIE_RXN2

PCIE_RXP3
PCIE_RXN3

PCIE_RXP4
PCIE_RXN4

PCIE_RXP5
PCIE_RXN5

PCIE_RXP6
PCIE_RXN6

PCIE_RXP7
PCIE_RXN7

PCIE_RXP8
PCIE_RXN8

PCIE_RXP9
PCIE_RXN9

PCIE_RXP10
PCIE_RXN10

PCIE_RXP11
PCIE_RXN11

PCIE_RXP12
PCIE_RXN12

PCIE_RXP13

B B

TP4
35mil

DNI

TP5
35mil

DNI

A A

PCIE_RXN13

PCIE_RXP14
PCIE_RXN14

PCIE_RXP15
PCIE_RXN15

PCIE_REFCLKP
PCIE_REFCLKN

PCIE_RST_BUF#

V32
U32

U31
T31

T30
R30

R32
P32

P31
N31

AL28

AK28

AG24
AA24

AF24

PCIE_RX11P
PCIE_RX11N

PCIE_RX12P
PCIE_RX12N

PCIE_RX13P
PCIE_RX13N

PCIE_RX14P
PCIE_RX14N

PCIE_RX15P
PCIE_RX15N

Clock

PCIE_REFCLKP
PCIE_REFCLKN

PERSTB
PCIE_TEST

PERSTB_MASK

M56-P B11 LF

Tie To VSS

PCIE_TX11P
PCIE_TX11N

PCIE_TX12P
PCIE_TX12N

PCIE_TX13P
PCIE_TX13N

PCIE_TX14P
PCIE_TX14N

PCIE_TX15P
PCIE_TX15N

Calibration

PCIE_CALRN
PCIE_CALRP

PCIE_CALI

W28
V28

V27
U27

U25
T25

T28
R28

R27
P27

AE24
AD24

AB24

PCIE_TXP11
PCIE_TXN11

PCIE_TXP12
PCIE_TXN12

PCIE_TXP13
PCIE_TXN13

PCIE_TXP14
PCIE_TXN14

PCIE_TXP15
PCIE_TXN15

R11

2.0K

R9
562R
R12

1.47K

PCIE_1.2V

<Variant Name>

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title
Size Document Number Rev
Date: Sheet

AXIOM-AFFII M56-P A RANK DDR2

B

105-A828XX-00A

of

114Tuesday, October 18, 2005

0

5

4

3

2

1

5

4

3

2

1

U1B

AG8

GPIO_34

AH7

GPIO_33

AG9

GPIO_32

AH8

GPIO_31

AJ8

GPIO_30

AH9

GPIO_29

AG10

D D

MEM_ID3(12)

MEM_ID2_LEGACY(12)

MEM_ID2(12)

+3VRUN

R3

4.7K

I2C_DAT(9)
I2C_CLK(9)

MEM_ID0(12)
MEM_ID1(12)

GPIO0(12)
GPIO1(12)
GPIO2(12)
GPIO3(12)
GPIO4(12)
GPIO5(12)
GPIO6(12)

OPT_BL_ENA(9)

SCLK(12)
ROM_ID1(12)
ROM_ID2(12)
ROM_ID3(12)

POW_SW(11)

OSC_SPREAD(12)

OTEMP#(12)

D+(12)

D-(12)

VDD_MEM_PLL

DNI

R20 0R

VID_CLK

R24

71.5R

1%

R22 0R

SCS#(12) THERM_SDAT (12)

+3VRUN

4

TP8
35mil

R2

4.7K

VDD_PLL25

PVSS

MPVSS

R25 1K

R6
10K

TP7
35mil

C C

R110K

SOUT(12)

SIN(12)

B B

OSC_IN(12)

OSC3.3_OUT

12)

A A

R23

1.0K

+3VRUN

C5
100nF

5

ROM_ID4(12)

R17 121R
R18 22R

X1

4

VCC

2

GND

27.000MHz

OUT

E/D

1%

1%

1%

R19 121R

3
1

+3VRUN

DNI

R7
499R

C250

R8

100nF

499R

GPIO_28

AF10

GPIO_27

AH6

GPIO_26

AF8

GPIO_25

AF7

GPIO_24

AE9

GPIO_23

AE10

GPIO_22

AG7

GPIO_21

AF9

GPIO_20

AF13

GPIO_19

AE13

GPIO_18

AK4

NC_DVOVMODE_0

AL4

NC_DVOVMODE_1

AF2

DVPCNTL_0

AF1

DVPCNTL_1

AF3

DVPCNTL_2

AG1

DVPCLK

AG2

DVPDATA_0

AG3

DVPDATA_1

AH2

DVPDATA_2

AH3

DVPDATA_3

AJ2

DVPDATA_4

AJ1

DVPDATA_5

AK2

DVPDATA_6

AK1

DVPDATA_7

AK3

DVPDATA_8

AL2

DVPDATA_9

AL3

DVPDATA_10

AM3

DVPDATA_11

AE6

DVPDATA_12

AF4

DVPDATA_13

AF5

DVPDATA_14

AG4

DVPDATA_15

AJ3

DVPDATA_16

AH4

DVPDATA_17

AJ4

DVPDATA_18

AG5

DVPDATA_19

AH5

DVPDATA_20

AF6

DVPDATA_21

AE7

DVPDATA_22

AG6

DVPDATA_23

AD4

GPIO_0

AD2

GPIO_1

AD1

GPIO_2

AD3

GPIO_3

AC1

GPIO_4

AC2

GPIO_5

AC3

GPIO_6

AB2

GPIO_7_BLON

AC6

GPIO_8

AC5

GPIO_9

AC4

GPIO_10

AB3

GPIO_11

AB4

GPIO_12

AB5

GPIO_13

AD5

GPIO_14

AB8

GPIO_15

AA8

GPIO_16

AB7

GPIO_17

AB6

NC_AB6

AC8

VREFG

AG12

DPLUS

AH12

DMINUS

AJ14

PVDD

AH14

PVSS

A6

MPVDD

A5

MPVSS

AL26

XTALIN

AM26

XTALOUT

AG14

PLLTEST

AG22

TESTEN

AC7

ROMCSb

AK17

LVSSR_1

AJ19

LVSSR_2

AF18

LVSSR_3

AH17

LVSSR_4

AG17

LVSSR_5

AG19

LVSSR_6

AH19 AF21

LVSSR_7 LVSSR_8

M56-P B11 LF

General
Purpose
I/O

Thermal
Diode

PLL &
XTAL

Test

ROM

LVDS PLL
and I/O
GND

PART 2 OF 7

V
I
D
E
O

&

Expand GPIO

M
U
L
T
I
M
E
D
I
A

VIP Host/External

TMDS

External
SSC

LVDS PLL
and I/O
GND

3

Integrated
TMDS

DAC / CRT

DAC2 (TV/CRT2)

Monitor
Interface

TXCM

TPVDD
TPVSS

TXVDDR_1
TXVDDR_2
TXVDDR_3
TXVDDR_4

TXVSSR_1
TXVSSR_2
TXVSSR_3
TXVSSR_4
TXVSSR_5

HSYNC
VSYNC

GENERICA
GENERICB

AVDD_1
AVDD_2

AVSSQ
AVSSN_1
AVSSN_2

VDD1DI
VSS1DI

H2SYNC
V2SYNC

COMP

R2SET

A2VDD_1
A2VDD_2

A2VSSN_1
A2VSSN_2

NC_A2VDDQ

A2VSSQ

VDD2DI
VSS2DI

DDC1DATA

DDC1CLK

DDC2DATA

DDC2CLK

DDC3DATA

DDC3CLK

GENERICC

LPVSS

LVSSR_10

LVSSR_9

TXCP
TX0M

TX0P

TX1M

TX1P

TX2M

TX2P

TX3M

TX3P

TX4M

TX4P

TX5M

TX5P

RSET

HPD1

AL9
AM9

AK10
AL10

AL11
AM11

AL12
AM12

AK9
AJ9

AK11
AJ11

AK12
AJ12

AM8
AL8
AJ6

AK6
AL6
AM6

AJ7
AK7
AL7
AM7
AK8

AK24

R

AM24

G

AL24

B

AJ23
AJ22
AK22

AF23
AL22
AL25

AM25
AK23

AK25
AJ24

AM23
AL23
AK15

R2

AM15

G2

AL15

B2

AF15
AG15

AJ15

Y

AJ13

C

AH15
AK14
AM16

AL16
AM17

AL17
AL14
AK13
AJ16
AJ17

AF11

AH22
AH23

AH13
AG13

AE12
AF12

AE23
AE18

AF22
AF17

DVI_CLK-

DVI_CLK+

DVI_TX0-

DVI_TX0+

DVI_TX1-

DVI_TX1+

DVI_TX2-

DVI_TX2+

C163
1uF

R14 1K
R21 499R

AVSSQ

R15 715R

A2VSSQ

VDDDI_25

DVSSDI

R130 1K

LTPVSS

R112 330R

R113 330R

PLACE TMDS TERMINATION RESISTORS CLOSE TO ASIC

LTPVSS

VDD_PNL_IO25

PLACE RGB TERMINATION RESISTORS CLOSE TO ASIC

HSYNC (9)
VSYNC (9)

AVDD_25

VDDDI_25

DVSSDI

PLACE TV TERMINATION RESISTORS CLOSE TO ASI C

VDD_DAC25

DVI_DETECT (9)

DDC1DATA (9)
DDC1CLK (9)

DDC2_DATA (9)
DDC2CLK (9)

THERM_SCLK (12)

<Variant Name>

2

R114 330R

R115 330R

VDD_PNL_PLL25

C168
1uF

R119
150R

R118
150R

DVI_CLK- (9)
DVI_CLK+ (9)

DVI_TX0- (9)
DVI_TX0+ (9)

DVI_TX1- (9)
DVI_TX1+ (9)

DVI_TX2- (9)
DVI_TX2+ (9)

VGA_RED (9)
VGA_GRN (9)
VGA_BLU (9)

R120
150R

R122
150R

R121
150R

R117
150R

TV_Y_G (9)

TV_CR_PR (9)

TV_COMP_B_PB (9)

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AXIOM-AFFII M56-P A RANK DDR2

Size Document Number Rev

Custom

Date: Sheet

105-A828XX-00A

1

214Tuesday, October 18, 2005

of

0

5

+BBP

C1

J1
M1
R1
V1

AA1

A3
P9

J10

N9

P10

A9

Y10

P8
R9
Y9

J11
A21
M10
N10

Y8
J18
J19

K21
A12
H13
A15

J20
J13

K11
K19
A18

L23

K20
K24

L24

H19
A24
K13

J32

A30
C32

F32
L32

AB9

AB10

AA9
AC19
AD18
AC20
AD19
AD20

AJ5

AM5

AL5

AK5

AE2

AE3

AE4

AE5

A27

F1

A28

E1

-BBN

C412
1uF_6.3V

U1E

VDDR1_1
VDDR1_2
VDDR1_3
VDDR1_4
VDDR1_5
VDDR1_6
VDDR1_7
VDDR1_8
VDDR1_9
VDDR1_10
VDDR1_11
VDDR1_12
VDDR1_13
VDDR1_14
VDDR1_15
VDDR1_16
VDDR1_17
VDDR1_18
VDDR1_20
VDDR1_21
VDDR1_22
VDDR1_23
VDDR1_24
VDDR1_25
VDDR1_26
VDDR1_27
VDDR1_28
VDDR1_29
VDDR1_30
VDDR1_31
VDDR1_32
VDDR1_33
VDDR1_34
VDDR1_35
VDDR1_36
VDDR1_37
VDDR1_38
VDDR1_39
VDDR1_40
VDDR1_41
VDDR1_42
VDDR1_43
VDDR1_45
VDDR1_46

VDDR3_1
VDDR3_2
VDDR3_3
VDDR3_4
VDDR3_5
VDDR3_6
VDDR3_7
VDDR3_8

VDDR4_1
VDDR4_2
VDDR4_3
VDDR4_4

VDDR5_1
VDDR5_2
VDDR5_3
VDDR5_4

VDDRH0
VDDRH1

VSSRH0
VSSRH1

M56-P B11 LF

C593
1uF_6.3V

C413
1uF_6.3V

C594
1uF_6.3V

VDD25

I/O

Clock

PART 5 OF 7

Memory I/O

I/0

Memory

Y23
K15

R10
AC17
AC14

M23

V10

K18

L10

K22
AA10

P
O
W
E
R

VDD_MEM18

C18
10uF

D D

C25
100nF

C35
100nF

C42
100nF

C C

B B

IRLML6401

RUNPWROK(9,11)

A A

C26
1nF

C36
100nF

C43
100nF

C31
10uF

C34
10uF

Q15

R746 10K

C596
100nF

C19
10uF

DNI

C44
1nF

R132
0R

C27
100nF

C37
1nF

C32
100nF

C1
100nF

1

C28
1nF

C52
100nF

C33
100nF

C2
100nF

23

1

C49
100nF

C3
100nF

VDD_MEM_CLK0
VDD_MEM_CLK1

+3VRUN

R133

100K

32

Q16

2N7002LT1

U1G

Forward
Compatibility

BBN_4
BBN_3
BBN_2
BBN_1
BBP_4
BBP_3
BBP_2
BBP_1

VDD25_4
VDD25_5
VDD25_6

M56-P B11 LF

4

PCIE_PVDD_12_1
PCIE_PVDD_12_2
PCIE_PVDD_12_3
PCIE_PVDD_12_4

PCIE_VDDR_12_10
PCIE_VDDR_12_11
PCIE_VDDR_12_12
PCIE_VDDR_12_13
PCIE_VDDR_12_14

PCIE_VDDR_12_1
PCIE_VDDR_12_2
PCIE_VDDR_12_3
PCIE_VDDR_12_4
PCIE_VDDR_12_5
PCIE_VDDR_12_6
PCIE_VDDR_12_7
PCIE_VDDR_12_8

PCI-Express

PCIE_VDDR_12_9

LPVDD/VDDL0

LVDDR/VDDL0_1
LVDDR/VDDL0_2
LVDDR/VDDL0_3

LVDDR/VDDL1_1
LVDDR/VDDL1_2
LVDDR/VDDL1_3
LVDDR/VDDL2_1
LVDDR/VDDL2_2
LVDDR/VDDL2_3

LVDS PLL, I/O I/O Internal Core

PART 7 OF 7

Control and External SSC

LVDS channel

VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8

VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23

VDD25_1
VDD25_2
VDD25_3

VDDPLL

VDDCI_1
VDDCI_2
VDDCI_3
VDDCI_4
VDDCI_5
VDDCI_6
VDDCI_7

V23
N23
P23
U23

N29
N28
N27
N26
N25

AL31
AM31
AM30
AL32
AL30
AM28
AL29
AM29
AM27

AC11
AC12
P14
U15
W14
W15
R17
R15
V15
V16
T16
U16
T17
U17
V14
R18
T18
V18
P18
P19
R19
W19
AD11

AC13
AC16
AC18

AC15
W10

T14
W17
P16
T23
K14
U19

AE19
AF20

AE20
AF19

AC21
AC22
AD22
AE21
AD21
AE22

VARY_BL

DIGON

GENERICD

TXCLK_UP

TXCLK_UN
TXOUT_U3P
TXOUT_U3N
TXOUT_U2P
TXOUT_U2N
TXOUT_U1P
TXOUT_U1N
TXOUT_U0P
TXOUT_U0N

TXOUT_L0N

TXOUT_L0P

TXOUT_L1N

TXOUT_L1P

TXOUT_L2N

TXOUT_L2P

TXOUT_L3N

TXOUT_L3P

TXCLK_LN
TXCLK_LP

PLACE ALL CAPS ON THIS PAGE CLOSE TO ASIC

C38
22uF_6.3V

C8
10uF

C17
100nF

VDD25

C50
100nF

VDD_PNL_PLL25

C162
1uF

AD12
AE11
AD23

AJ21
AK21
AH21
AG21
AG20
AH20
AK20
AJ20
AG18
AH18

AK19
AL19
AL20
AM20
AL21
AM21
AK18
AJ18
AL18
AM18

C45
10uF

R10
10K

C9
100nF

C13
100nF

C239
100nF

C21
100nF

C48

C47

100nF

1nF

C40

C39

1nF

100nF

C10
100nF

C14
100nF

C241
100nF

C22
100nF

VDD_PNL_IO25

BLON_PWM (9)
FPVCC (9)

GENERICD (13)

TXCLK_U+ (9)
TXCLK_U- (9)
TXOUT_U3+ (9)
TXOUT_U3- (9)
TXOUT_U2+ (9)
TXOUT_U2- (9)
TXOUT_U1+ (9)
TXOUT_U1- (9)
TXOUT_U0+ (9)
TXOUT_U0- (9)

TXOUT_L0- (9)
TXOUT_L0+ (9)
TXOUT_L1- (9)
TXOUT_L1+ (9)
TXOUT_L2- (9)
TXOUT_L2+ (9)
TXOUT_L3- (9)
TXOUT_L3+ (9)
TXCLK_L- (9)
TXCLK_L+ (9)

C11
100nF

C15
100nF

C240
100nF

DNI

C46
100nF

3

C24
100nF

C41
100nF

C12
100nF

C16
100nF

B70
BLM15BD121SN1

VDD_PIX_PLL12

L2
BLM15BD121SN1

C23
100nF

C29

C30

100nF

100nF

L6
BLM15BD121SN1

PCIE_1.2V

VDD_CORE

AH27
AC23

AL27

R23
P25
R25
T26
U26

W26

Y26
AB26
AC26
AD25
AE26
AF26
AD26
AG25
AH26
AC28

Y28

U28

P28
AH29
AF28

V29
AC29

W27

AB27

V26

AJ26
AJ32

AK29

P26

P29

R29

T29

U29

W29

Y29
AA29
AB29
AD29
AE29
AF29
AG29

AJ29
AK26
AK30
AG26

N30

R31
AF30
AC30

V31

P30
AA31

U30
AD31
AK32

AJ28

Y30

AJ30
AK31
AA23
AG31

N24

AB23

P24
R24
T24
U24
V24

W24

Y24
AC24
AH24

V25
AA25

R26
AA26

T27
AE27

W23

AD7

AE8

AL1

AM2

AD10

K10

T10

E12

AC9
AF14

AD8

F10

AA4
AG11

AG16

B1
H1
L1
P1
U1
Y1

A2

E8

H5
M8

C5

J3

L6

M6

P6

V3

R3
C6
C9

F6

H7

J6

U1F

PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
PCIE_VSS_4
PCIE_VSS_5
PCIE_VSS_6
PCIE_VSS_7
PCIE_VSS_8
PCIE_VSS_9
PCIE_VSS_10
PCIE_VSS_11
PCIE_VSS_12
PCIE_VSS_13
PCIE_VSS_14
PCIE_VSS_15
PCIE_VSS_16
PCIE_VSS_17
PCIE_VSS_18
PCIE_VSS_19
PCIE_VSS_20
PCIE_VSS_21
PCIE_VSS_22
PCIE_VSS_23
PCIE_VSS_24
PCIE_VSS_25
PCIE_VSS_26
PCIE_VSS_27
PCIE_VSS_28
PCIE_VSS_29
PCIE_VSS_30
PCIE_VSS_31
PCIE_VSS_32
PCIE_VSS_33
PCIE_VSS_34
PCIE_VSS_35
PCIE_VSS_36
PCIE_VSS_37
PCIE_VSS_38
PCIE_VSS_39
PCIE_VSS_40
PCIE_VSS_41
PCIE_VSS_42
PCIE_VSS_43
PCIE_VSS_44
PCIE_VSS_45
PCIE_VSS_46
PCIE_VSS_47
PCIE_VSS_48
PCIE_VSS_49
PCIE_VSS_50
PCIE_VSS_51
PCIE_VSS_52
PCIE_VSS_53
PCIE_VSS_54
PCIE_VSS_55
PCIE_VSS_56
PCIE_VSS_57
PCIE_VSS_58
PCIE_VSS_59
PCIE_VSS_60
PCIE_VSS_61
PCIE_VSS_62
PCIE_VSS_63
PCIE_VSS_64
PCIE_VSS_65
PCIE_VSS_66
PCIE_VSS_67
PCIE_VSS_68
PCIE_VSS_69
PCIE_VSS_70
PCIE_VSS_71
PCIE_VSS_72
PCIE_VSS_73
PCIE_VSS_74
PCIE_VSS_75
PCIE_VSS_76
PCIE_VSS_77
PCIE_VSS_78
PCIE_VSS_79
PCIE_VSS_80
PCIE_VSS_81
PCIE_VSS_82

PCIE_PVSS
VSS_1

VSS_2
VSS_3
VSS_4
VSS_5
VSS_6
VSS_7
VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37

M56-P B11 LF

2

Part 6 of 7

PCI-Express GND

CORE GND

<Variant Name>

VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98

VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158

VSS_159

AD16
AA6
P7
P5
M3
M9
L7
M7
AD17
AH11
A8
U7
C10
E9
F3
J9
N7
N3
Y5
AM13
AC10
Y6
U6
E5
AL13
A11
U8
U9
U10
R6
AD6
V6
AD14
AD13
D11
J12
K12
A13
F13
E13
F15
K16
J21
H16
T15
V17
C15
C4
U14
P15
A16
E16
G13
G16
P17
R16
R14
W16
C18
F16
W18
U18
AE16
AE17
A19
H32
F19
G19
N8
Y7
T19
V19
G21
C21
F21
AE14
AK16
U5
F22
F18
K30
C24
F24
M24
A25
D30
E25
G25
G20
G22
F27
E28
H21
C27
E32
H28
J30
K17
K27
M32
A22
C20
E19
H20
J24
M28
J28
J16
F30
L29
A31
B32
E30
AE15
AG23
AD9
AF16
AH10
AJ10
AD15
AH16

K23

1

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AXIOM-AFFII M56-P A RANK DDR2

Size Document Number Rev

C

Date: Sheet

5

4

3

2

105-A828XX-00A

1

314Tuesday, October 18, 2005

of

0

1

2

3

4

5

6

7

8

U1C

Part 3 of 7

MDA0

M31
M30

L31
L30

H30
G31
G30

F31
M27
M29

L28
L27
J27

H29
G29
G27
M26

L26

M25

L25
J25

G28

H27

H26

F26
G26

H25

H24

H23

H22

J23

J22
E23
D22
D23
E22
E20
F20
D19
D18
B19
B18
C17
B17
C14
B14
C13
B13
D17
E18
E17
F17
E15
E14
F14
D13
H18
H17

G18
G17
G15
G14

H14

J14

C31
C30

DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63

MVREFD_0
MVREFS_0

MAA_10
MAA_11
MAA_12
MAA_13
MAA_14
MAA_15

DQMAb_0
DQMAb_1
DQMAb_2
DQMAb_3

A

DQMAb_4
DQMAb_5
DQMAb_6
DQMAb_7

QSA_0B
QSA_1B
QSA_2B
QSA_3B
QSA_4B
QSA_5B
QSA_6B
QSA_7B

write strobe read strobe

MEMORY INTERFACE

RASA0b
CASA0b

CSA0b_0
CSA0b_1

RASA1b
CASA1b

CSA1b_0
CSA1b_1

MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7

A A

B B

C C

MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17

MDA18

MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63

VDD_MEM18

R30
100R

1%

MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9

QSA_0
QSA_1
QSA_2
QSA_3
QSA_4
QSA_5
QSA_6
QSA_7

ODTA

ODTA1

CLKA0

CLKA0b

CKEA0

WEA0b

CLKA1

CLKA1b

CKEA1

WEA1b

D26
F28
D28
D25
E24
E26
D27
F25
C26
B26
D29
B27
E27
E29
B25
C25

H31
J29
J26
G23
E21
B15
D14
J17

J31
K29
K25
F23
D20
B16
D16
H15

K31
K28
K26
G24
D21
C16
D15
J15

F29
D24

D31
E31

B30
B28
C29
B31
B29

C28

B20
C19

C22
B24
B22
B21
B23

C23

M56-P B11 LF

R32
100R

1%

C6
100nF

(SSTL-2) VREF = .49*VDDQ (100R/100R)

VDD_MEM18

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12 MAB12

A_BA0
A_BA1

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7

QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7

ODTA0
ODTA1

CLKA0
CLKA0#

CKEA0
RASA#0
CASA#0
WEA#0
CSA0#

CLKA1
CLKA1#

MDB0
MDB1
MDB2
MDB3
MDB4
MDB5
MDB6
MDB7
MDB8
MDB9
MDB10
MDB11
MDB12
MDB13
MDB14
MDB15
MDB16
MDB17

MDB18

MDB19
MDB20
MDB21
MDB22
MDB23
MDB24
MDB25
MDB26
MDB27
MDB28
MDB29
MDB30
MDB31
MDB32
MDB33
MDB34
MDB35
MDB36
MDB37
MDB38
MDB39
MDB40
MDB41
MDB42
MDB43
MDB44
MDB45
MDB46
MDB47
MDB48
MDB49
MDB50
MDB51
MDB52
MDB53
MDB54
MDB55
MDB56
MDB57
MDB58
MDB59
MDB60
MDB61
MDB62
MDB63

CKEA1
RASA#1

MEM_RST
CASA#1
WEA#1

VDD_MEM18

CSA1#

R28
100R

1%

R31
100R

1%

R16

R27

4.7K

R26

4.7K

4.7K

C164
100nF

(SSTL-2) VREF = .49*VDDQ (100R/100R)

R35
243R

B12
C12
B11
C11

F12
D12
E11
F11

G12
G11
H12
H11

W3
W2

W5
W6

W7
W8
W9

AA3
AA5
AA2
AA7

C8
B7
C7
B6

F9
D8
D7
F7

H9
E7
F8
G8
G6
G7
H8

J8

K8

L8

K9

L9

K5

L4

K4

L5
N5
N6
P4
R4
P2
R2
T3
T2

Y3
Y2
T4
R5
T5
T6
V5

Y4
R8
T8
R7
T7
V7

B3
C3

U1D

DQB_0
DQB_1
DQB_2
DQB_3
DQB_4
DQB_5
DQB_6
DQB_7
DQB_8
DQB_9
DQB_10
DQB_11
DQB_12
DQB_13
DQB_14
DQB_15
DQB_16
DQB_17
DQB_18
DQB_19
DQB_20
DQB_21
DQB_22
DQB_23
DQB_24
DQB_25
DQB_26
DQB_27
DQB_28
DQB_29
DQB_30
DQB_31
DQB_32
DQB_33
DQB_34
DQB_35
DQB_36
DQB_37
DQB_38
DQB_39
DQB_40
DQB_41
DQB_42
DQB_43
DQB_44
DQB_45
DQB_46
DQB_47
DQB_48
DQB_49
DQB_50
DQB_51
DQB_52
DQB_53
DQB_54
DQB_55
DQB_56
DQB_57
DQB_58
DQB_59
DQB_60
DQB_61
DQB_62
DQB_63

MVREFD_1
MVREFS_1

DRAM_RST
TEST_MCLK
TEST_YCLK
MEMTEST

M56-P B11 LF

Part 4 of 7

MAB_0
MAB_1
MAB_2
MAB_3
MAB_4
MAB_5
MAB_6
MAB_7
MAB_8

MAB_9
MAB_10
MAB_11
MAB_12
MAB_13
MAB_14
MAB_15

DQMBb_0
DQMBb_1
DQMBb_2
DQMBb_3
DQMBb_4
DQMBb_5

B

DQMBb_6
DQMBb_7

QSB_0

QSB_1

QSB_2

QSB_3

QSB_4

QSB_5

QSB_6

QSB_7

QSB_0B
QSB_1B
QSB_2B
QSB_3B
QSB_4B
QSB_5B
QSB_6B
QSB_7B

write strobe read strobe

ODTB

ODTB1

CLKB0
CLKB0b

MEMORY INTERFACE

CKEB0
RASB0b
CASB0b

WEB0b

CSB0b_0
CSB0b_1

CLKB1
CLKB1b

CKEB1
RASB1b
CASB1b

WEB1b

CSB1b_0
CSB1b_1

G4
E6
E4
H4
J5
G5
F4
H6
G3
G2
D4
F2
F5
D5
H2
H3

B8
D9
G9
K7
M5
V2
W4
T9

B9
D10
H10
K6
N4
U2
U4
V8

B10
E10
G10
J7
M4
U3
V4
V9

D6
J4

B4
B5

C2
E2
D3
B2
D2

E3

N2
P3

L3
J2
L2
M2
K2

K3

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11

DQMB#0
DQMB#1
DQMB#2
DQMB#3
DQMB#4
DQMB#5
DQMB#6
DQMB#7

QSB0
QSB1
QSB2
QSB3
QSB4
QSB5
QSB6
QSB7

QSB#0
QSB#1
QSB#2
QSB#3
QSB#4
QSB#5
QSB#6
QSB#7

ODTB0
ODTB1

CLKB0
CLKB0#

CKEB0
RASB#0
CASB#0
WEB#0
CSB0#

CLKB1
CLKB1#

CKEB1
RASB#1
CASB#1
WEB#1
CSB1#

B_BA0
B_BA1

RASA#0(5)
RASA#1(6)

CASA#0(5)
CASA#1(6)

WEA#0(5)
WEA#1(6)

CKEA0(5)
CKEA1(6)

CSA0#(5)
CSA1#(6)

ODTA0(5)
ODTA1(6)

CLKA0(5)

CLKA0#(5)

CLKA1(6)

CLKA1#(6)
QSA#[7..0](5,6)
QSA[7..0](5,6)

DQMA#[7..0](5,6)

MDA[63..0](5,6)

MAA[12..0](5,6)

A_BA0(5,6)

A_BA1(5,6)

RASB#0(7)
RASB#1(8)

CASB#0(7)
CASB#1(8)

WEB#0(7)
WEB#1(8)

CKEB0(7)
CKEB1(8)

CSB0#(7)
CSB1#(8)

ODTB0(7)
ODTB1(8)

CLKB0(7)

CLKB0#(7)

CLKB1(8)

CLKB1#(8)
QSB#[7..0](7,8)
QSB[7..0](7,8)

DQMB#[7..0](7,8)

MDB[63..0](7,8)

MAB[12..0](7,8)

B_BA0(7,8)

B_BA1(7,8)

RASA#0
RASA#1

CASA#0
CASA#1

WEA#0
WEA#1

CKEA0
CKEA1

CSA0#
CSA1#

ODTA0
ODTA1

CLKA0
CLKA0#

CLKA1

CLKA1#
QSA#[7..0]
QSA[7..0]
DQMA#[7..0]
MDA[63..0]
MAA[12..0]

A_BA0

A_BA1

RASB#0

RASB#1

CASB#0

CASB#1

WEB#0

WEB#1

CKEB0

CKEB1

CSB0#

CSB1#

ODTB0

ODTB1

CLKB0

CLKB0#

CLKB1

CLKB1#
QSB#[7..0]
QSB[7..0]
DQMB#[7..0]
MDB[63..0]
MAB[12..0]

B_BA0

B_BA1

VDD_MEM18

R38
100R

D D

1

1%

R39
100R

1%

C7
100nF

2

3

4

R34
100R

1%

R29
100R

1%

C169
100nF

<Variant Name>

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AXIOM-AFFII M56-P A RANK DDR2

Size Document Number Rev

B

Date: Sheet

5

6

7

105-A828XX-00A

of

414Tuesday, October 18, 2005

8

0

5

4

3

2

1

A_BA0
A_BA1

D D

C C

VDD_MEM18

R40

4.99K

(SSTL-1.8) VREF = .5*VDDQ

R42

4.99K

B B

C53
100nF

MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

CLKA0#
CLKA0

CKEA0

CSA0#
WEA#0
RASA#0
CASA#0
DQMA#2

DQMA#0

ODTA0

QSA2 QSA1
QSA#2 QSA#1

QSA0
QSA#0

U4

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3 G9

WE VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

A9
C1
C3
C7
C9
E9
G1
G3
G7

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

MDA7
MDA0
MDA5
MDA2
MDA3
MDA4
MDA1
MDA6
MDA23
MDA18
MDA20
MDA16
MDA17
MDA21
MDA19
MDA22

A_BA0
A_BA1

MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

CLKA0#
CLKA0

CKEA0

VDD_MEM18 VDD_MEM18

B44

220R

C57
100nF

C58
1uF

VDD_MEM18

R43

4.99K

R41

4.99K

(SSTL-1.8) VREF = .5*VDDQ

C54
100nF

CSA0#
WEA#0
RASA#0
CASA#0
DQMA#1

DQMA#3

ODTA0

QSA3
QSA#3

U5

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3 G9

WE VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

A9
C1
C3
C7
C9
E9
G1
G3
G7

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

MDA27
MDA28
MDA24
MDA29
MDA31
MDA25
MDA30
MDA26
MDA15
MDA9
MDA12
MDA8
MDA11
MDA13
MDA10
MDA14

C62
100nF

B45

220R

C63
1uF

A_BA0(4,6)
A_BA1(4,6)

QSA[7..0](4,6)
QSA#[7..0](4,6)

DQMA#[7..0](4,6)

MAA[12..0](4,6)
MDA[63..0](4,6)

ODTA0(4)

CKEA0(4)
RASA#0(4)
CASA#0(4)

WEA#0(4)

CSA0#(4)

CLKA0(4)

CLKA0#(4)

R44
56R

A_BA0

A_BA1
QSA[7..0]
QSA#[7..0]

DQMA#[7..0]

MAA[12..0]

MDA[63..0]

ODTA0

CKEA0
RASA#0
CASA#0

WEA#0

CSA0#

R45
56R

CLKA0
CLKA0#

DDR2 BGA MEMORY

VDD_MEM18

VDD_MEM18

DDR BGA MEMORY

C55
470pF

C59
1nF

A A

C60
10nF

C61
10uF

C67
100nF

C68
1uF

C69
100nF

C70
100nF

C71
10uF

C64
1nF

C65
10nF

C66
10uF

C72
100nF

C73
1uF

C74
100nF

<Variant Name>

C75
10nF

C76
10uF

ATI Technologies Inc.

1 Commerce Valley Drive East
Markhaml, Ontario
Canada, L3T 7X6
[phone]

Title

CHAN A RANK 0 DDR2 BGA MEMORY

5

4

3

2

AXIOM-AFFII M56-P A RANK DDR2

Size Document Number Rev

Custom

Date: Sheet

105-A828XX-00A

1

of

514Tuesday, October 18, 2005

0

5

4

3

2

1

A_BA0
A_BA1

MAA12

D D

C C

VDD_MEM18

R640

4.99K

(SSTL-1.8) VREF = .5*VDDQ

R642

4.99K

C551
100nF

MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

CLKA1#
CLKA1

CKEA1

CSA1#

WEA#1
RASA#1
CASA#1

ODTA1

QSA5
QSA#5

QSA#4

U22

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3 G9

WE VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

MDA39

B9

MDA32

B1

MDA38

D9

MDA34

D1

MDA33

D3

MDA37

D7

MDA35

C2

MDA36

C8

MDA44

F9

MDA43

F1

MDA47

H9

MDA40

H1

MDA41 MDA52

H3

MDA46

H7

MDA42 MDA54

G2

MDA45

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

C546
100nF

VDD_MEM18

B46

220R

C547
1uF

VDD_MEM18

R643

4.99K

R641

4.99K

(SSTL-1.8) VREF = .5*VDDQ

C552
100nF

A_BA0
A_BA1

MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

CLKA1#
CLKA1

CKEA1

CSA1#

WEA#1
RASA#1
CASA#1

DQMA#6DQMA#5
DQMA#7DQMA#4

ODTA1

QSA6
QSA#6

QSA7QSA4
QSA#7

U23

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3 G9

WE VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15

DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

A9
C1
C3
C7
C9
E9
G1
G3
G7

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

MDA59
MDA60
MDA58
MDA62
MDA63
MDA56
MDA61
MDA57
MDA51
MDA53
MDA48
MDA55

MDA49
MDA50

C548
100nF

VDD_MEM18

B47

220R

C549
1uF

A_BA0(4,5)
A_BA1(4,5)

DQMA#[7..0](4,5)

MAA[12..0](4,5)

QSA#[7..0](4,5)
QSA[7..0](4,5)

MDA[63..0](4,5)

ODTA1(4)

CKEA1(4)
RASA#1(4)
CASA#1(4)

WEA#1(4)

CSA1#(4)

CLKA1(4)
CLKA1#(4)

A_BA0
A_BA1

DQMA#[7..0]

MAA[12..0]
QSA#[7..0]

QSA[7..0]

MDA[63..0]

ODTA1

CKEA1
RASA#1
CASA#1

WEA#1

CSA1#

R638
56R

R639
56R

CLKA1
CLKA1#

B B

C550
470pF

DDR2 BGA MEMORY

VDD_MEM18

C553
1nF

C554
10nF

C555
10uF

C556
100nF

C557
1uF

C558
100nF

C559
100nF

C560
10uF

VDD_MEM18

C561
1nF

C562
10nF

DDR BGA MEMORY

C563
10uF

C564
100nF

C565
1uF

C566
100nF

C567
10nF

C568
10uF

CHAN B RANK 0 DDR2 BGA MEMORY

A A

5

4

3

<Variant Name>

2

ATI Technologies Inc.

1 Commerce Valley Drive East
Markhaml, Ontario
Canada, L3T 7X6
[phone]

Title

AXIOM-AFFII M56-P A RANK DDR2

Size Document Number Rev

Custom

Date: Sheet

105-A828XX-00A

1

of

614Tuesday, October 18, 2005

0

5

4

3

2

1

B_BA0
B_BA1

MAB12

D D

C C

R48

4.99K

R50

4.99K

C77
100nF

MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0

CLKB0#
CLKB0

CKEB0

CSB0#

WEB#0
RASB#0
CASB#0

DQMB#2
DQMB#1

ODTB0

QSB2
QSB#2

QSB1
QSB#1

U6

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3 G9

WE VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

A9
C1
C3
C7
C9
E9
G1
G3
G7

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

MDB11
MDB13
MDB9
MDB14
MDB15
MDB8
MDB12
MDB10
MDB18
MDB21
MDB17
MDB23
MDB22
MDB16
MDB20

C81
100nF

VDD_MEM18

B48

220R

C82
1uF

VDD_MEM18VDD_MEM18

R51

4.99K

R49

4.99K

(SSTL-1.8) VREF = .5*VDDQ(SSTL-1.8) VREF = .5*VDDQ

C78
100nF

B_BA0
B_BA1

MAB12
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0

CLKB0#
CLKB0

CKEB0

CSB0#

WEB#0
RASB#0
CASB#0

DQMB#3
DQMB#0

ODTB0

QSB3
QSB#3

QSB0
QSB#0

U7

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3 G9

WE VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

A9
C1
C3
C7
C9
E9
G1
G3
G7

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

MDB0
MDB6
MDB2
MDB4
MDB5
MDB3
MDB7
MDB1
MDB27
MDB28
MDB24
MDB30
MDB31
MDB25
MDB29MDB19
MDB26

C86
100nF

VDD_MEM18

B49

220R

C87
1uF

B_BA0(4,8)
B_BA1(4,8)

DQMB#[7..0](4,8)

MAB[12..0](4,8)

QSB#[7..0](4,8)
QSB[7..0](4,8)

MDB[63..0](4,8)

ODTB0(4)

CKEB0(4)
RASB#0(4)
CASB#0(4)

WEB#0(4)

CSB0#(4)

CLKB0(4)

CLKB0#(4)

R52
56R

B_BA0
B_BA1

DQMB#[7..0]

MAB[12..0]
QSB#[7..0]
QSB[7..0]

MDB[63..0]

ODTB0

CKEB0
RASB#0
CASB#0

WEB#0

CSB0#

R53
56R

CLKB0
CLKB0#

B B

C79
470pF

DDR2 BGA MEMORY

VDD_MEM18

C83
1nF

C84
10nF

C85
10uF

C91
100nF

C92
1uF

C93
100nF

C94
100nF

C95
10uF

VDD_MEM18

C88
1nF

C89
10nF

DDR BGA MEMORY

C90
10uF

C96
100nF

C97
1uF

C98
100nF

C99
10nF

C100
10uF

CHAN C RANK0 DDR2 BGA MEMORY

A A

5

4

3

<Variant Name>

2

ATI Technologies Inc.

1 Commerce Valley Drive East
Markhaml, Ontario
Canada, L3T 7X6
[phone]

Title

AXIOM-AFFII M56-P A RANK DDR2

Size Document Number Rev

Custom

Date: Sheet

105-A828XX-00A

1

of

714Tuesday, October 18, 2005

0

5

4

3

2

1

D D

C C

VDD_MEM18

R646

4.99K

R648

4.99K

B B

C574
100nF

B_BA0
B_BA1

MAB12
MAB11 MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0

CLKB1#
CLKB1

CKEB1

CSB1#

WEB#1
RASB#1
CASB#1

ODTB1

QSB4

U24

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3 G9

WE VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

MDB39

B9

MDB35

B1
D9

MDB33

D1

MDB32

D3

MDB36

D7

MDB34

C2

MDB37

C8

MDB45

F9

MDB43

F1

MDB46

H9

MDB40

H1

MDB41

H3

MDB47

H7

MDB42

G2

MDB44 MDB59

G8

A9
C1
C3
C7
C9
E9
G1
G3
G7

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

C569
100nF

VDD_MEM18

B50

220R

C570
1uF

VDD_MEM18

R649

4.99K

R647

4.99K

(SSTL-1.8) VREF = .5*VDDQ(SSTL-1.8) VREF = .5*VDDQ

C575
100nF

B_BA0
B_BA1

MAB12
MAB10

MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0

CLKB1#
CLKB1

CKEB1

CSB1#

WEB#1
RASB#1
CASB#1

DQMB#7DQMB#5
DQMB#6DQMB#4

ODTB1

QSB7QSB5
QSB#7QSB#5

QSB6
QSB#6QSB#4

U25

L2

BA0

L3

BA1

R2

A12

P7

A11

M2

A10/AP

P3

A9

P8

A8

P2

A7

N7

A6

N3

A5

N8

A4

N2

A3

M7

A2

M3

A1

M8

A0

K8

CK

J8

CK

K2

CKE

L8

CS

K3 G9

WE VDDQ10

K7

RAS

L7

CAS

F3

LDM

B3

UDM

K9

ODT

F7

LDQS

E8

LDQS

B7

UDQS

A8

UDQS

J2

VREF

A2

NC#A2

E2

NC#E2

L1

NC#L1

R3

NC#R3

R7

NC#R7

R8

NC#R8

HY5PS561621F-25

DQ15
DQ14
DQ13
DQ12
DQ11
DQ10

DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9

VDD1
VDD2
VDD3
VDD4
VDD5

VDDL

VSSDL

VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9

VSSQ10

VSS1
VSS2
VSS3
VSS4
VSS5

B9
B1
D9
D1
D3
D7
C2
C8
F9
F1
H9
H1
H3
H7
G2
G8

A9
C1
C3
C7
C9
E9
G1
G3
G7

A1
E1
J9
M9
R1

J1
J7

A7
B2
B8
D2
D8
E7
F2
F8
H2
H8

A3
E3
J3
N1
P9

MDB49
MDB55
MDB51MDB38
MDB53
MDB54
MDB48
MDB52
MDB50
MDB57
MDB60
MDB56
MDB63
MDB61
MDB58
MDB62

C571
100nF

VDD_MEM18

B51

220R

C572
1uF

B_BA0(4,7)
B_BA1(4,7)

DQMB#[7..0](4,7)

MAB[12..0](4,7)

QSB#[7..0](4,7)
QSB[7..0](4,7)

MDB[63..0](4,7)

ODTB1(4)

CKEB1(4)
RASB#1(4)
CASB#1(4)

WEB#1(4)

CSB1#(4)

CLKB1(4)
CLKB1#(4)

B_BA0
B_BA1

DQMB#[7..0]

MAB[12..0]
QSB#[7..0]
QSB[7..0]

MDB[63..0]

ODTB1

CKEB1
RASB#1
CASB#1

WEB#1

CSB1#

R644
56R

R645
56R

CLKB1
CLKB1#

DDR2 BGA MEMORY

VDD_MEM18

C576
1nF

A A

C577
10nF

C578
10uF

C579
100nF

C580
1uF

C581
100nF

C582
100nF

C583
10uF

CHAN D RANK0 DDR2 BGA MEMORY

VDD_MEM18

C584
1nF

C585
10nF

DDR2 BGA MEMORY

C586
10uF

C587
100nF

C588
1uF

C589
100nF

<Variant Name>

C590
10nF

C591
10uF

C573
470pF

ATI Technologies Inc.

1 Commerce Valley Drive East
Markhaml, Ontario
Canada, L3T 7X6
[phone]

Title

AXIOM-AFFII M56-P A RANK DDR2

Size Document Number Rev

Custom

Date: Sheet

5

4

3

2

105-A828XX-00A

1

of

814Tuesday, October 18, 2005

0

PLACE CAPS ON THIS PAGE AS CLOSE TO CONNECTOR AS POSSIBLE

1

HSYNC(2)
VSYNC(2)

I2C_CLK
I2C_DAT

VGA_RED
VGA_GRN
VGA_BLU

TV_Y_G
TV_CR_PR

TV_COMP_B_PB
PCIE_REFCLKP

PCIE_REFCLKN

PCIE_RXP[15..0]
PCIE_RXN[15..0]
PCIE_TXP[15..0]
PCIE_TXN[15..0]

RUNPWROK

DVI_TX0­DVI_TX0+
DVI_TX1­DVI_TX1+
DVI_TX2­DVI_TX2+
DVI_CLK­DVI_CLK+

DVI_DETECT

R13

2.2K

+3VRUN

TXOUT_L0- (3)
TXOUT_L0+ (3)
TXOUT_L1- (3)
TXOUT_L1+ (3)
TXOUT_L2- (3)
TXOUT_L2+ (3)
TXOUT_L3- (3)
TXOUT_L3+ (3)

TXCLK_L- (3)

TXCLK_L+ (3)

TXOUT_U0- (3)

TXOUT_U0+ (3)

TXOUT_U1- (3)

TXOUT_U1+ (3)

TXOUT_U2- (3)

TXOUT_U2+ (3)

TXOUT_U3- (3)
TXOUT_U3+ (3)

TXCLK_U- (3)

TXCLK_U+ (3)

I2C_CLK (2)
I2C_DAT (2)

FPVCC (3)

VGA_RED(2)

VGA_GRN(2)

A A

VGA_BLU(2)

TV_Y_G(2)

TV_CR_PR(2)

TV_COMP_B_PB(2)

PCIE_REFCLKP(1)
PCIE_REFCLKN(1)

PCIE_RXP[15..0](1)
PCIE_RXN[15..0](1)
PCIE_TXP[15..0](1)
PCIE_TXN[15..0](1)

RUNPWROK(3,11)

DVI_TX0-(2)

DVI_TX0+(2)

B B

DVI_TX1-(2)

DVI_TX1+(2)

DVI_TX2-(2)
DVI_TX2+(2)
DVI_CLK-(2)

DVI_CLK+(2)

DVI_DETECT(2)

DDC1CLK(2)

C C

D D

DDC1DATA(2)

TXOUT_L0-

TXOUT_L0+

TXOUT_L1-

TXOUT_L1+

TXOUT_L2-

TXOUT_L2+

TXOUT_L3­TXOUT_L3+

TXCLK_L-

TXCLK_L+

TXOUT_U0-

TXOUT_U0+

TXOUT_U1-

TXOUT_U1+

TXOUT_U2-

TXOUT_U2+

TXOUT_U3­TXOUT_U3+

TXCLK_U-

TXCLK_U+

FPVCC

1

2

+20V_PWR_SRC

R71

2.2K

2

C111
100nF

PCIE_TXN15

PCIE_TXP15

PCIE_TXN14

PCIE_TXP14

PCIE_TXN13

PCIE_TXP13

PCIE_TXN12

PCIE_TXP12

PCIE_TXN11

PCIE_TXP11

PCIE_TXN10

PCIE_TXP10

PCIE_TXN9
PCIE_TXP9

PCIE_TXN8
PCIE_TXP8

PCIE_TXN7
PCIE_TXP7

PCIE_TXN6
PCIE_TXP6

PCIE_TXN5
PCIE_TXP5

PCIE_TXN4
PCIE_TXP4

PCIE_TXN3
PCIE_TXP3

PCIE_TXN2
PCIE_TXP2

PCIE_TXN1

PCIE_TXP1

PCIE_TXN0
PCIE_TXP0

C112
1nF

3

C246
100nF

C237100nF

C235100nF

C232100nF

C230100nF

C228100nF

C226100nF

C224100nF

C206100nF

C220100nF

C218100nF

C216100nF

C214100nF

C212100nF

C210100nF

C208100nF

C238100nF

PCIE_REFCLKN
PCIE_REFCLKP

PCIE_RST#

SMB_DAT
SMB_CLK
THERM#

DVI_DETECT
DVI_CLK­DVI_CLK+

DVI_TX2­DVI_TX2+

DVI_TX1­DVI_TX1+

DVI_TX0­DVI_TX0+

3

MPCIE1

A1

PWR_SRC_A1

A2

PWR_SRC_A2

A3

PWR_SRC_A3

A4

PWR_SRC_A4

A5

PWR_SRC_A5

A6

PWR_SRC_A6

A7

PWR_SRC_A7

A8

PWR_SRC_A8

A9

GND_A9

A10

GND_A10

A11

GND_A11

A12

C236100nF

C234100nF

C231100nF

C229100nF

C227100nF

C225100nF

C223100nF

C221100nF

C219100nF

C217100nF

C215100nF

C213100nF

C211100nF

C209100nF

C207100nF

C222100nF

A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66
A67
A68
A69
A70
A71
A72
A73
A74
A75
A76
A77
A78
A79
A80
A81
A82
A83
A84
A85
A86
A87
A88
A89
A90
A91
A92
A93
A94
A95
A96
A97
A98

A99
A100
A101
A102
A103
A104
A105
A106
A107
A108
A109
A110
A111
A112
A113
A114
A115
A116
A117
A118
A119
A120
A121

GND_A12
PERn15

PERp15
GND_A21
PERn14
PERp14
GND_A24
PERn13
PERp13
GND_A27
PERn12
PERp12
GND_30
PERn11
PERp11
GND_A33
PERn10
PERp10
GND_A36
PERn9
PERp9
GND_A39
PERn8
PERp8
GND_A42
PERn7
PERp7
GND_A45
PERn6
PERp6
GND_A48
PERn5
PERp5
GND_A51
PERn4
PERp4
GND_A54
PERn3
PERp3
GND_A57
PERn2
PERp2
GND_A60
PERn1
PERp1
GND_A63
PERn0
PERp0
GND_A66
REFCLK­REFCLK+
RSVD_A69
PERST#
RSVD_A71
RSVD_A72
SMB_DAT
SMB_CLK
THERM#
VGA_HSYNC
VGA_VSYNC
VGA_DDCCLK
VGA_DDCDAT
RSVD_A80
RSVD_A81
GND_A82
RSVD_A83
RSVD_A84
RSVD_A85
RSVD_A86
RSVD_A87
GND_A88
RSVD_A89
RSVD_A90
GND_A91
RSVD_A92
RSVD_A93
GND_A94
RSVD_A95
RSVD_A96
RSVD_A97
RSVD_A98
RSVD_A99
GND_A100
RSVD_A101
RSVD_A102
GND_A103
RSVD_A104
RSVD_A105
GND_A106
RSVD_A107
RSVD_A108
DVI_HPD
DVI_CLK­DVI_CLK+
GND_A112
DVI_TX2­DVI_TX2+
GND_A115
DVI_TX1­DVI_TX1+
GND_A118
DVI_TX0­DVI_TX0+
GND_A121

4

Mechanical Key

+1.8VRUN_B1
+1.8VRUN_B2
+1.8VRUN_B3
+1.8VRUN_B4
+1.8VRUN_B5
+1.8VRUN_B6
+1.8VRUN_B7

RUNPWROK

+5VRUN
GND_B10
GND_B11
GND_B12

PRSNT2#

PETn15
PETp15

GND_B22

PETn14
PETp14

GND_B25

PETn13
PETp13

GND_B28

PETn12
PETp12

GND_B31

PETn11
PETp11

GND_B34

PETn10
PETp10

GND_B37

PETn9
PETp9

GND_B40

PETn8
PETp8

GND_B43

PETn7
PETp7

GND_B46

PETn6
PETp6

GND_B49

PETn5
PETp5

GND_B52

PETn4
PETp4

GND_B55

PETn3
PETp3

GND_B58

PETn2
PETp2

GND_B61

PETn1
PETp1

GND_B64

PETn0
PETp0

PRSNT1#

TV_CR_PR

GND_B69

TV_Y_G

GND_B71

TV_COMP_B_PB

GND_B73

VGA_RED

GND_B75

VGA_GRN

GND_B77

VGA_BLU
GND_B79

LVDS_UCLK-

LVDS_UCLK+

GND_B82

LVDS_UTX3-

LVDS_UTX3+

GND_B85

LVDS_UTX2-

LVDS_UTX2+

GND_B88

LVDS_UTX1-

LVDS_UTX1+

GND_B91

LVDS_UTX0-

LVDS_UTX0+

GND_B94

LVDS_LCLK-

LVDS_LCLK+

GND_B97

LVDS_LTX3-

LVDS_LTX3+

GND_B100

LVDS_LTX2-

LVDS_LTX2+

GND_B103

LVDS_LTX1-

LVDS_LTX1+

GND_B106

LVDS_LTX0-

LVDS_LTX0+

GND_B109

I2C_DAT

I2C_CLK

LVDS_DIGON

LVDS_PWM

LVDS_BLON

DVI_SDAT
DVI_SCLK

+2.5VRUN

GND_B118
+3.3VRUN_B119
+3.3VRUN_B120
+3.3VRUN_B121

B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12

B19
B20
B21
B22
B23
B24
B25
B26
B27
B28
B29
B30
B31
B32
B33
B34
B35
B36
B37
B38
B39
B40
B41
B42
B43
B44
B45
B46
B47
B48
B49
B50
B51
B52
B53
B54
B55
B56
B57
B58
B59
B60
B61
B62
B63
B64
B65
B66
B67
B68
B69
B70
B71
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91
B92
B93
B94
B95
B96
B97
B98
B99
B100
B101
B102
B103
B104
B105
B106
B107
B108
B109
B110
B111
B112
B113
B114
B115
B116
B117
B118
B119
B120
B121

PCIE_PLUS

4

5

RUNPWROK

PCIE_RXN15
PCIE_RXP15

PCIE_RXN14
PCIE_RXP14

PCIE_RXN13
PCIE_RXP13

PCIE_RXN12
PCIE_RXP12

PCIE_RXN11
PCIE_RXP11

PCIE_RXN10
PCIE_RXP10

PCIE_RXN9
PCIE_RXP9

PCIE_RXN8
PCIE_RXP8

PCIE_RXN7
PCIE_RXP7

PCIE_RXN6
PCIE_RXP6

PCIE_RXN5
PCIE_RXP5

PCIE_RXN4
PCIE_RXP4

PCIE_RXN3
PCIE_RXP3

PCIE_RXN2
PCIE_RXP2

PCIE_RXN1
PCIE_RXP1

PCIE_RXN0
PCIE_RXP0

TV_CR_PR

TV_Y_G
TV_COMP_B_PB
VGA_RED
VGA_GRN
VGA_BLU

TXCLK_U-

TXCLK_U+

TXOUT_U3­TXOUT_U3+

TXOUT_U2-

TXOUT_U2+

TXOUT_U1-

TXOUT_U1+

TXOUT_U0-

TXOUT_U0+

TXCLK_L-

TXCLK_L+

TXOUT_L3­TXOUT_L3+

TXOUT_L2-

TXOUT_L2+

TXOUT_L1-

TXOUT_L1+

TXOUT_L0-

TXOUT_L0+

I2C_DAT

I2C_CLK

FPVCC

BL_BRIGHT

BL_ENA

3V3RUN

5

R69

2.2K

R152
0R

+3VRUN

6

C107
100nF

R36

2.2K

<Variant Name>

6

C108
1nF

PCIE_RST#

DNI

BL_BRIGHT
BL_ENA

DDC2_DATA (2)
DDC2CLK (2)

7

+5VRUN

+3VRUN

R143
0R

53

1
2

TC7SZ08FU

4

U17

C261
100nF

PCIE_RST_BUF# (1)

R148 0R
R146 0R
R147 0R

+5VRUN

+3VRUN

THERM#

R84

6.8K

DNI DNI

1

Q2

3 2

BSN20

R134 0R

SM BUS 3V/5V LEVEL SHIFT

+5VRUN

+3VRUN

R91

6.8K

DNI

SMB_CLK

R116 0R

+5VRUN

R90

6.8K

DNI

SMB_DAT

R129 0R

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AXIOM-AFFII M56-P A RANK DDR2

Size Document Number Rev

Custom

Date: Sheet

1

Q1

DNI

3 2

BSN20

+3VRUN

1

Q3

DNI

3 2

BSN20

7

105-A828XX-00A

BLON_PWM (3)

OPT_BL_ENA (2)

MB_THERM# (12)

PBAT_SMBCLK (12)

PBAT_SMBDA T (12)

C51

2.2uF_6.3V

C101

100nF

8

+3VRUN

C102

1nF

of

914Tuesday, October 18, 2005

8

0

1

2

3

4

5

6

7

8

+5VRUN

R80

1%

10K

R83
100K

1%

3

24

4

23

6

5

7

8

C140
100nF

I/O 1.8V REGULATOR @ 10A

MAX1993_VCC

A A

POWER_ENA(11)

MAX1993_REF

B B

R747 10K

C597
100nF

AGND_1993

C165
100nF

AGND_1993

C151
1uF

AGND_1993

C175
470pF

R79
100K

1%

R78

27.4K

C173
470pF

AGND_1993

AGND_1993

U11

LSAT

OVP/UVP
PGOOD
SHDN
REF

ILIM

REFIN

OD

22

C141
1nF

VCC

CURRENT LIMIT SETTING 13A

21

GATE

AGND_1993

TWO GROUND PLANES MEET AT A SINGLE POINT

C C

POWER_ENA(11)

R748 10K

C598
100nF

MAX1993_REF

AGND_1510

MAX1993ETG

C252

10uF_10V

1%

R85

31.6K

20

AGND_1510

R75

22.1R

GND

GND_THM

GND26

GND27

252627

AGND_1993

+3VRUN

AGND_1510

R87

47.5K

1%

C265
10uF_10V

19

VDD

BST

CSP
CSN
OUT

SKIP
TON

FBLANK

GND28

28

C253
1uF

DH

D9

BAT54SLT1

14

V+

17
15

16

LX

18

DL

11
12
10
9

FB

13
1
2

10

2
5

7

4

C251
470pF

R77
0R

C166
100nF

1.8V_REG

REG3A

IN

Part 1 of 2

VCC
PGOOD

SHDN

REFIN

MAX1510ETB

REFOUT

OUT

PGND
AGND

OUTS

9

8
3

6

1

PCIE 1.2V (3A)

R136 0R
R137 0R

R81 0R
R82 0R
R76 0R

REGULATOR

DNI

C161
100nF

+20V_PWR_SRC

C155
10uF_25V

4

4

DNI

DNI
DNI
DNI

AGND_1993

AGND_1510

C156
10uF_25V

PLACE CAPS CLOSE TO AND
BETWEEN UPPER FETS DRAIN
AND LOWER FETS SOURCE

52

Q11

HAT2168H

3

1

IHLP-2525CZ-01
11A

52

Q12

HAT2164H

3

1

MAX1993_VCC

AUTO PFM MODE
300KHZ SWITCHING FREQ

C195
22uF_6.3V

12

D10

15MQ040N

MAX1993_REF

C109
100nF

L8
BLM15BD121SN1

C170
10uF

L9
1uH

C171
100nF

C204
100nF

C172

1nF

1.8V_REG

C174
330uF_2.5V

PCIE_1.2V

(200 MA 1.2V PCIE_PVDD_12)
(1320 MA 1.2V PCIE_VDDR_12)

VDD_PIX_PLL12

( MA 1.2V VDDPLL)

(1000 MA 1.8V/2.5V EXT MEM VDDQ,VDDR1)

VDD_MEM18

C180
10uF_10V

L16
BLM15BD121SN1

L1
BLM15BD121SN1

L11
BLM15BD121SN1

L13
BLM15BD121SN1

C185

22uF_6.3V

L7
BLM15BD121SN1

L12
BLM15BD121SN1

L5
BLM15BD121SN1

C157

22uF_6.3V

L15
BLM15BD121SN1

22uF_6.3V

L14
BLM15BD121SN1

C188

22uF_6.3V

C193

C194
10uF

100nF

C145

C144
10uF

100nF

C148
C147
10uF

1nF

C186
100nF

C255
C167
10uF

100nF

C183
C182
10uF

100nF

C158
100nF

C191

C189
100nF

C149
100nF

C187

1nF

C256

1nF

C184

1nF

C159

1nF

C192
100nF

C190
100nF

VDD_MEM_CLK0

(MA 1.8V VDRH0)

VDD_MEM_CLK1

(MA 1.8V VDRH1)

VDD25

(70MA 2.5V VDD25)

VDDDI_25

(40 MA 2.5V VDD1DI,VDD2DI)

DVSSDI
VDD_PNL_PLL25

(40 MA 2.5V LPVDD,TPVDD)

LTPVSS

*

AVDD_25

(65 MA 2.5V AVDD)

AVSSQ

*

VDD_PLL25

(20MA 2.5V PVDD)

PVSS

*

VDD_PNL_IO25

(400MA 2.5V LVDDR,TXVDDR)

VDD_DAC25

(80MA 2.5V A2VDD)

2.5V 800MA LINEAR
REGULATOR

+3VRUN

D D

1

2

3

EN_2.5V(11)

C243
10uF

4

1

REG2

LP3871

SD

GND

5

VOUTVIN

ERROR

32
4

C146
10uF

5

C205
100nF

2.5V_REG

6

PLACE CAPS FOR THESE GROUNDS CLOSE TO ASIC AND RUN DEDICATED TRACES

*

FROM PINS TO JOIN THE GROUND PLANE WITH ONE VIA AT CAP

MPVSS AVSSQDVSSDI PVSS LTPVSS A2VSSQ

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AXIOM-AFFII M56-P A RANK DDR2

Size Document Number Rev

B

Date: Sheet

7

105-A828XX-00A

of

10 14Tuesday, October 18, 2005

8

0

5

4

3

2

1

DNI

C263
100nF

C128
10uF_25V

+20V_PWR_SRC

C129
10uF_25V

52

Q8

4

HAT2168H

3

1

52

4

3

1

Q10

HAT2164H

PLACE CAPS CLOSE TO AND
BETWEEN UPPER FETS DRAIN
AND LOWER FETS SOURCE

C264
100nF

IHLP-2525CZ-01

15.5A

12

D3

15MQ040N

C262
100nF

L21

0.68uH
C131

330uF_2.5V

L10
BLM15BD121SN1

C178
C177
10uF

100nF

C132
330uF_2.5V

C179

1nF

C133
10uF

VDD_CORE

(11A 1.15V VDDC)

C134
10uF

VDD_MEM_PLL

(5 MA 1.8V MPVDD)

MPVSS

C135
10uF

*

CORE 1.0/1.15V REGUL A T O R @ 1 1 A

+5VRUN

GND

GND_THM

252627

R65

22.1R

GND26

GND27

C138
10uF_10V

19

VDD

BST

DH

CSP
CSN
OUT

SKIP
TON

FBLANK

GND28

28

D8

BAT54SLT1

14

V+

17
15

16

LX

18

DL

11
12
10
9

FB

13
1
2

R64
0R

C150
100nF

U9

LSAT

OVP/UVP
PGOOD
SHDN
REF

ILIM

REFIN

OD

GATE

22

C137
1nF

VCC

20

D D

1993_VCC

C143

2.2uF

INDUCTOR SATURATION PROTECTION DISABLED

OVP,UVP AND DISCHARGE MODE ENABLED

POWER_ENA(10)

+3VRUN

RUNPWROK(3,9)

C C

CURRENT LIMIT SETTING 13A

Ra AND Rb = 75.0K FOR 1.0V LOW
WITH POW_SW(GATE) INPUT HIGH

Ra AND Rb = 75.0K
AND Rc = 43.2K FOR 1.22V HIGH

WITH POW_SW(GATE) INPUT LOW

POW_SW(2)

R144 0R
R145 0R

DNI

1993_REF

AGND

C142
100nF

EN_2.5V(10)

AGND

C139
470pF

+3VRUN

1%

1%

C266
470pF

AGND

R70
10K

AGND

R33
10K

R74
100K

R72

Ra

30.1K

Rb

Rc

AGND

AGND

R66
75K

1%

R68
75K

1%

R67

43.2K

1%

C136
100nF

3

24

4

23

6

5

7

8

21

MAX1993ETG

AGND

B B

A A

TWO GROUND PLANES MEET AT A SINGLE POINT

R57
0R

DNI

R60
0R

R56
0R

DNI

1993_REF

R62
0R

R61
0R

1993_VCC

R63
0R

R59
0R

DNIDNIDNIDNIDNI

CONNECT SKIP TO GND FOR AUTO PFM MODE - BOM DEFAULT
CONNECT SKIP TO VCC FOR FORCED PWM MODE

CONNECT TON TO VCC FOR 200KHZ

R58

NO CONNECT TON FOR 300KHZ

0R

CONNECT TON TO REF FOR 450KHZ
CONNECT TON TO AGND FOR 600KHZ -BOM DEFAULT

CONNECT FBLANK TO VCC FOR 140US tFBLANK FAULT BLANKING ENABLED

AGNDAGND

NO CONNECT FBLANK FOR 90US tFBLANK FAULT BLANKING ENABLED - BOM DEFAULT
CONNECT FBLANK TO REF FOR 40US tFBLANK FAULT BLANKING ENABLED
CONNECT FBLANK TO GND FOR 90US tFBLANK FAULT BLANKING DISABLED

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AXIOM-AFFII M56-P A RANK DDR2

Size Document Number Rev

Custom

5

4

3

2

Date: Sheet

105-A828XX-00A

1

of

11 14Tuesday, October 18, 2005

0

5

4

3

2

1

MEMORY CLOCK SPREAD SPECTRUM

D D

OSC3.3_OUT(2)

OSC_SPREAD(2)

R89 22R

OSC_IN(2)

FLASH ROM

U14

SIN(2)

C C

+3VRUN

SCS#(2)

R744 0R
R745 0R

HDCP_EN HDCP_DIS

R745

SCLK(2)

SCLK
SCS#

+3VRUN

R744

5

D

6

C

1

S

7

HOLD

3

W

8

VCC

M25P10-AVMN6T

Q

VSS

+3VRUN

GPIO0(2)

GPIO1(2)

GPIO2(2)
GPIO3(2)

B B

GPIO4(2)

GPIO5(2)

GPIO6(2)

ROM_ID1(2)
ROM_ID2(2)
ROM_ID3(2)
ROM_ID4(2)

MEM_ID3(2)

MEM_ID2_LEGACY(2)

MEM_ID2(2)

MEM_ID1(2)

A A

MEM_ID0(2)

R96 10K

DNI

R97 10K

DNI

R98 10K

DNI

R99 10K

DNI

R100 10K

DNI

R101 10K

DNI

R102 10K

R103 10K
R104 10K

DNI

R105 10K
R106 10K

DNI

R107 10K

DNI

R108 10K

DNI

R140 10K

DNI

R109 10K

DNI

DNI

R110 10K

STRAPS RECOMMENDED

STRAP_B_PTX_PWRS_ENB 10K RESISTOR

STRAP_B_PTX_DEEMPH_EN

STRAP_PCIE_MODE

STRAP_REVERSE_LANES

STRAP_FORCE_COMPLIANCE

STRAP_CM_RANGE

MEM_TYPE MEMID

2

4

TYPE 1

SOUTSIN

SOUT (2)

PIN

GPIO0

GPIO1

GPIO(3:2)

GPIO4

GPIO5

GPIO6

ROMIDROMIDCFG(3:0)

(4:1)

(3:0)

DESCRIPTION OF RECOMMENDED SETTING

Full swing

TRANSMITTER DE-EMPHASIS ENABLE

- SETTING DEPENDS ON CHIPSET
SEE M2X DATABOOKS

PCI-EXPRESS 1.0A MODE

REVERSE PCIE LANES

-NON REVERSED

DO NOT FORCE COMPLIANCE STATE QUICKLY

CM RANGE

- NORMAL

SERIAL FLASH ROM TYPE SELECT

- SERIAL M25P10 ROM

TBD

THERM_SCLK(2)
THERM_SDAT(2)

R656
0R

PBAT_SMBCLK(9)
PBAT_SMBDAT(9)

R657
0R

DNI

U13

1

Xin

2

VSS

3

SRS

4

ModOut

P1819B-08SR

1.25% DOWN SPREAD

R128 0R
R125 0R

R126 0R
R127 0R

Xout

VDD

PD#
REF

DNI

DNI

8
7
6
5

C196
100nF

DNI DNI

R4

4.7K

TBD

DO NOT INSTALL
10K RESISTORS

DO NOT INSTALL
10K RESISTOR

DO NOT INSTALL
10K RESISTORS

DO NOT INSTALL
10K RESISTORS

1011

TBD

C199
100nF

+3VRUN

R5

4.7K

8 1
7
6
5

C197
22uF_6.3V

C202
100nF

SCLK VDD
SDATA
ALERT
GND

THERM

ADM1032ARM

<Variant Name>

L18
BLM15BD121SN1

+3VRUN

U15

2

D+

3

D-

4

+3VRUN

THERMAL MONITOR

C203 2.2nF

D+ (2)
D- (2)
MB_THERM# (9)

OTEMP# (2)

R92
10K

+3VRUN

R94 0R
R111 0R
R93 0R
R95 0R

R131
10K

ATI Technologies Inc.

1 Commerce Valley Drive East
Markham, Ontario
Canada, L3T 7X6
[phone]

Title

AXIOM-AFFII M56-P A RANK DDR2

Size Document Number Rev

Custom

Date: Sheet

5

4

3

2

105-A828XX-00A

1

of

12 14Tuesday, October 18, 2005

0

5

4

3

2

1

GENERICD = 0V FOR BACK BIASING DISABLED
MAX1673 SHUTDOWN

-BBN = 0V VIA MAX1673 INTERNAL 1 OHM TO GROUND

+BBP

D D

VDD_MEM18

R741

4.7R

1/16 W Maximum 100mA

AS432S

Q17

3 2

SI2304DS

VDD_CORE

(+1.1V)

FET BFET C

1.7A 1.8A

1

C595
1uF_6.3V

Q18

23

Si2301DS

1

N FET A = OFF, P FET B = OFF, N FET C = ON
+BBP = VDD_CORE

1

GENERICD = +3.3V FOR BACK BIASING ENABLED
MAX1673 ENABLED

-BBN = -.5V
N FET A = ON, P FET B = ON, N FET C = OFF
+BBP = +1.8V

Note :R741=0 and remove (REG4 R742 and R743) if +BBP=1.8V

R742
221R

+5VRUN

C C

32

1

R737

Q19

2N7002LT1

100K

REG4

3 2

+3VRUN

R743
1K

FET A

C414
10uF

R738

REG1

GENERICD(3)

B B

R740
10K

4

2

SHDN

CAP+

8

FB

6

IN

100K

R739

17.4K

(-.52V 0R 0V @ 125MA MAX)

C415

2.2uF

3

0V TO -VIN IN SKIP MODE

CAP-

MAX1673ESA

GND

7

OUT

SKIP

5
1

C416
10uF

C417
10uF

-BBN

<Variant Name>

ATI Technologies Inc.

1 Commerce Valley Drive East
Markhaml, Ontario

A A

Title

Canada, L3T 7X6
[phone]

AXIOM-AFFII M56-P A RANK DDR2

Size Document Number Rev

A

Date: Sheet

5

4

3

2

105-A828XX-00A

0

13 14Tuesday, October 18, 2005

of

1

5

<Variant Name>

4

3

2

1

Title

Schematic No.

Date:

AXIOM-AFFII M56-P A RANK DDR2

105-A828XX-00A

REVISION HISTORY

D D

Sch
Rev

C C

PCB
Rev

Date

12/08/0500A0

1 00B 17/10/2005

REVISION DESCRIPTION

PROTOTYPE BASED ON 105-A623XX-00A WITH FOLLOWING CHANGES:

- CHANGE TO EIGHT PIECES OF DDR2 MEMORY

-ADD BBP/BBN CIRCUIT .

1. Add R746 and C596 on page 3

2. Add R747 and C597 on page 10

3. Add R748 and C598 on page 10

4. Shift R33 to U9.4 on page 11

Tuesday, October 18, 2005

Rev

0

B B

A A

5

4

3

2

1