Data Timing Generator
DTG5078 • DTG5274 • DTG5334 Data Sheet
Applications
Features & Benefits
Versatile Platform Combines Features of Data Generator, Pulse
Generator, and DC Source
Up to 3.35 Gb/s Data Ra te
From 1 to 96 D ata Channels (Master/Slave)
Class Leading Delay Resolution of 0.2 ps (DTG5274/DTG5334), 1 ps
(DTG5078), up to 600 ns of Total Delay
Modular Architecture Helps to Protect Your Investment and Allows the
Instrument to Expand With Your Growing Needs
Advanced Control Over Signal Parameters to Meet Most Current Testing
Needs, Including Stressed Eye Generation
External Jitter Injection (DTGM31, DTGM32 Modules)
Level Control with 5 mV Resolution
Easy to Use and Learn, Shortens Time to Test
Easily Configure with Plug-in Modules
Intuitive Windows User Inte rface
Benchtop Form Factor
Integrated PC Supports Network Integration and Built-in CD-ROM,
LAN, Floppy Drive, USB Ports
Up to 64 Mb Pattern Depth Per Channel for Complex Data Patterns
Semiconduct
Support for Semiconductor Technologies from TTL to LVDS
Initial Verification and Debugging, Comprehensive Characterization,
Manufacturing, and Quality C ontrol
Compliance and Interoperability Testing to Emerging Standards
PCI-Express Gen1:2.5 Gbps
Serial ATA Gen1/2:1.5 Gbps/3 Gbps
InfiniBand 2.5 Gbps
XAUI: 3.125
HDMI: Version 1.3 / DVI
Magnetic an
Research, Development, and Test of Next-generation Devices (HDD,
DC/DVD, Blu-ray)
Data Conversion Device Design
Characterization and Test of Next-generation D/A Convertors
Imaging Sensor Device Design
Characterization and Functional Testing of Next-generation Imaging
Devices (CCD/CMOS)
Jitter Transfer and Jitter Tolerance Testing
New serial data standards, expanding networks, and ubiquito us computing
continually redefine the cutting edge of technology. The design engineer is
challenged to economize without sacrificing performance.
The DTG5000 Series combines the power of a data generator with the
capabilities of a pulse generator in a versatile, b enchtop form factor,
shortening the duration of complex test procedures and simplifying the
generation of low-jitter, high-accuracy clock signals, parallel or serial
data acro
easily configure the performance of the instrument to your existing and
emerging needs to minimize equipment costs. Three mainframes and five
plug-in output m odules combine to cover a rang e of applications from
legacy devices to the latest technologies. In addition, eight low-current,
independently-controlled DC outputs can substitute for external power
supplies
and output channels to easily integrate with other instruments, such as
oscilloscopes and logic analyzers, to create a flexible and powerful lab.
or Device Functional Test and Characterization
Gbps
d Optical Storage Design
ss multiple channels. Its modular platform allows you to
. Each mainframe incorporates a full compliment of auxiliary input
Data Sheet
Characteristics
Mainframe Characteristics
Basic Features
Platform – Benchtop mainframe with cold-swappable plug-and-play plug-in output
modules. Mainframes accept any combination of output modules.
Number of Slots for Output Modules –
DTG5078: 8 slots (A, B, C, D, E, F, G, H).
DTG5274: 4 slots (A, B, C, D).
New
DTG5334: 4 slots (A, B, C, D).
Master-Slave Capabilities –
DTG5078: Up to three DTG5078 mainframes can be connected in Master-Slave
configuration.
DTG5274: Up to two DTG5274 mainframes can be connected in Master-Slave
configuration.
DTG5334: Up to two DTG5334 mainframes can be connected in Master-Slave
configuration.
Operating Modes –
Pulse Generator Mode (slots A to D only).
Data Generator Mode.
Output Patterns –
NRZ, RZ, R1, Pulse patterns (DTG5078/5274/5334: Slot A-D; DTG5078 Slot E-H,
NRZ only).
Timing Parameters
Data Rate Range –
DTG5078:
NRZ: 50 Kb
RZ, R1, Pulse Mode: 50 Kb/s to 375 Mb/s.
DTG5274:
NRZ: 50 K
RZ,R1,PulseMode:50Kb/sto1.35Gb/s.
DTG5334:
NRZ: 50 K
RZ, R1, Pulse Mode: 50 Kb/s to 1.675 Gb/s (settable to 1.7 Gb/s)
Data Rate (Setting) Resolution –
Internal Clock : 8 digits.
Extern
External Phase Lock In : 4 digits.
/s to 750 Mb/s.
b/s to 2.7 Gb/s.
b/s to 3.35 Gb/s (settable to 3.4 Gb/s)
al Clock : 4 digits.
Output Timing Controls
Delay Range –
PGMode:0to3s.
DG Mode:
Long Delay Off: 0 to 5 ns (NRZ, RZ, R1).
Long Delay On: NRZ:
Period 1.25 n
s: 0 to 300 ns (Hardware sequence) or to 600 ns
(Software sequence).
Period <1.25 ns: 0 to (240 ns × period) (Hardware sequence) or to
(480 ns × peri
od) (Software sequence).
Long Delay On: RZ/R1:
Period 2.5 ns: 0 to 300 ns (Hardware sequence) or to 600 ns
(Software se
quence).
Period <2.5 ns: 0 to (120 ns × period) (Hardware sequence) or to
(240 ns × period) (Software sequence).
Delay Resolution –
DTG5078: 1 p
s.
DTG5274/5334: 0.2 ps.
Phase Resolution – 0.1%
Differential Timing Offset Feature [between pair of two adjacent channels (Odd
and Even)] –
Range: -1.
0to1.0ns.
Resolution:
DTG5078: 1 ps.
DTG5274/
Semiauto
5334: 0.2 ps.
matic Deskew Calibration –
Range: 500 ps.
Accuracy (after skew calibration):
100 ps, sl
ots A to D.
200 ps, slots E to H (DTG5078 only).
Duty Cycle Adjustment Range – 0 to 100% (with 0 delay setting, RZ, R1, Pulse mode
only).
Duty Cycle Adjustment Resolution – 0.1%.
Pulse Width Maximum Range – 290 ps to (period - 290 ps) (RZ, R1, Pulse mode
only).
(Range also depends on delay settings.)
Pulse Width Resolution – 5ps.
Jitter Performance (output channels)
Clock Pattern ("1010…" clock pattern)
Random Jitter –
DTG5078: <4 ps
DTG5274: <3 ps
DTG5334: <3 ps
(at 750 Mb/s with DTGM21, 0.8 V
RMS
(at 2.7 Gb/s with DTGM30, 0.8 V
RMS
(at3.35Gb/swithDTGM30,0.8V
RMS
, delay: 0.0 ns).
p-p
, delay: 0.0 ns).
p-p
, delay: 0.0 ns).
p-p
Maximum Number of Output Channels
Number of Like
Mainframes
DTG5078*
DTGM21 DTGM30 DTGM31
1
DTGM32
DTG5274, DTG5334*
DTGM21 DTGM30 DTGM31
1
DTGM32
132163884
2 6432 6 1616 8
396489
*1TheDTG5078hasalimittothenumberofmodulesthatmaybeinstalled;thetotalmustbelessthan100.Thecoefficient for each module is shown below.
DTGM30:8,DTGM21:10,DTGM31: 33,DTGM32:32
–––
2 www.tektronix.com
Data Timing Generator — DT G5078 • DTG5274 • DTG5334
Data Pattern (PRBS pattern 215-1)
Total Jitter –
DTG5078: at 750 Mb/s
<18 ps
RMS
,<85
(typical) with DTGM21, 0.8 V
p-p
, delay: 0.0 ns).
p-p
ps
DTG5274: at 2.7 Gb/s
<16 ps
<14 ps
RMS
RMS
,<60ps
ps
,<60
(typical) with DTGM30, 0.8 V
p-p
(typical) with DTGM31, 0.8 V
p-p
, delay: 0.0 ns).
p-p
, delay: 0.0 ns).
p-p
DTG5334: at 3.35 Gb/s.
<15 ps
0.0 ns); <13 p
RMS
,50ps
(typical)withDTGM30,0.8VandDTGM31,0.8V
p-p
s
,50ps
RMS
(typical) with DTGM31, 0.8 V and DTGM31, 0.8 V
p-p
, delay:
p-p
p-p
delay: 0.0 ns).
<44 ps
with DTGM30, Delay: 0.0 ns, Amplitude = 0.4 V
p-p
Format = NRZ,
JitterMode=Off,anambienttemperatureof20to30°C.
,Offset=0.0V,Data
p-p
Signal Control Features
Cross-point Adjustment (duty cycle distortion) –
Range: 30% to 70%.
Resolution: 1%.
(Slots A to D, and DTGM30/M31/M32 used in NRZ mode.)
Jitter Generation –
Jitter All or Partial Pattern.
Jitter Profile: Sine, Gaussian Noise, Square, Triangle.
Jitter Freq./Res.: 0.015 Hz to 1.56 MHz / 1 mHz.
Jitter Amplitude: Up to 16.5 UI
(depending on data rate and jitter frequency).
p-p
(Internal Jitter Generation available on Channel A1 only.)
Pulse and Data Features
Pulse Generator (PG) Features (unique to PG mode) –
Continuous or Burst.
Burst Cou
nt: 1 to 65,536.
Pulse Rate: Off, 1/1, 1/2, 1/4, 1/8, 1/16.
Data Patterns
Pattern Length per Channel (Pattern Memory) –
Minimum:
DTG5078
: 1 bit (software mode) or 240 bits (hardware mode).
DTG5274/5334: 1 bit (software mode) or 960 bits (hardware mode).
Maximum:
8: 8,000,000 bits.
DTG507
DTG5274: 32,000,000 bits (in multiples of four).
DTG5334: 64,000,000 bits (in multiples of four).
Built-in Data Patterns – Binary Counter, Johnson Counter, Graycode Counter,
g Ones, Walking Zeros, Checker Board, User-defined Patterns.
Walkin
rn Import Capability –
Patte
Type/Tools:
Tektronix TLA Data Exchange Format File (*.txt).
onix HFS Vector File (ASCII) (*.vca).
Tektr
Tektronix HFS Vector File (binary) (*.vcb).
Tektronix AWG2000 Series (*.wfm).
ronix AWG400s/500s/610/710/710B (*.pat).
Tekt
Tektronix DG2000 Series (*.dat).
Medium/Pass:
rt data through GPIB, LAN, CD-ROM, floppy drive, USB memory devices.
Impo
ern Copy and Paste Capability –
Patt
Copy, paste, and rotation between data
listing/waveform editor and spreadsheet software (e.g. Excel) through the clipboard.
PRBS/PRWS Data Patterns – (Note: Memory supports PRBS/PRWS patterns, and
user can create errored PRBS)
5
6
1, 2
-1, 27-1, 28-1, 29-1, 210-1, 211-1, 212-1, 213-1, 214-1, 215-1, 223-1.
2
-
Sequencer Features
Sequence Length –
1 to 8,000 steps for main sequence.
1 to 256 steps for subsequence.
Max. Number of Blocks – 8,000.
Max. Number of Subsequences – 50.
Repeat Counter – 1 to 65,536 or infinite.
Channel Addition – AND or XOR (slots A to D only).
Note: DTG5078 slots E, F, G, and H do not support the following: RZ, R1, pulse
,
generation modes which includes controls for trail delay/duty cycle/pulse width,
channel addition, and variable cross-points.
Auxiliary Channels
Clock Out
Connector –
Complementary output (common offset and ground).
DTG5078/5274: SMA rear panel.
DTG5334: SMA front panel.
Frequency Range –
DTG5078: 50 kHz to 750 MHz.
DTG5274: 50 kHz to 2.7 GHz.
DTG5334: : 50 kHz to 3.35 GHz, settable up to 3.4 GHz.
Frequency Resolution –
8 digit setting resolution
Minimum: 1 mHz (e.g. with 50 kHz setting).
Internal Clock Accuracy – within ±1 ppm.
Jitter –
DTG5078: <2 ps
DTG5274: <2 ps
DTG5334: <2 ps
at 750 Mb/s, at 0.8 V
RMS
at 2.7 Gb/s, at 0.8 V
RMS
at 3.35 Gb/s, at 0.8 V
RMS
(typical).
p-p
(typical).
p-p
p-p
(typical).
Amplitude/Resolution –
0.03 V
0.06 V
to 1.25 V
p-p
to 2.5 V
p-p
/10mV(50).
p-p
/10mV(1M).
p-p
Output Voltage Window –
-2.0 to 2.47 V (50 ).
-2.0 to 7.00 V (1 M).
Max. Output Current – ±80 mA.
Transition Times (20% - 80%) –
DTG5078:
<85ps(Amplitude=0.1V
<100 ps (Amplitude = 1.0 V
,Offset=0V)(typical).
p-p
,Offset=0V)(typical).
p-p
DTG5274:
<70ps(Amplitude=0.1V
<80ps(Amplitude=1.0V
,Offset=0V)(typical).
p-p
,Offset=0V)(typical).
p-p
DTG5334:
<100 ps (Amplitude = 1.0 V
,Offset=0V)(typical).
p-p
Overshoot – <10%,atHigh=1.0V,Low=0Vinto(50)(typical).
Other Output Channels
Auxiliary DC Outputs –
-3.0 to 5.0
V / 10 mV, Max. current: ±30 mA, 8 independently
controlled outputs, Connector: 2 × 8 pin header on front panel.
Sync Out – CML (current mode logic), VOH: 0 V , VOL: -0.4 V (50 )(typical),SMA
Connector, SE, Front panel, Rise/Fall Time (20 to 80%): 140 ps, Delay to Data Out:
-4.5 ns (typical).
10 MHz Reference Out – 1.2 V
d) (typical), BNC Connector, Rear Panel.
couple
(50 , AC coupled) (typical), 2.4 V
p-p
(1 M,AC
p-p
www.tektronix.com 3
Data Sheet
Input Channels
External Clock In –
Input Ranges:
DTG5078: 1 MHz
to 750 MHz. SMA connector, rear panel.
DTG5274: 1 MHz to 2.7 GHz. SMA connector, rear panel.
DTG5334: 1 MHz to 3.35 GHz. SMA connector, front panel.
0.4 V
p-p
10 MHz Refere
(50 , AC Coupled), 50% ±5% duty cycle.
to2V
p-p
nce In –
Input Ranges:
10 MHz ±0.1 MHz, 0.2 V
Phase Lock In –
Input Ranges
:
1MHzto200MHz,0.2V
Skew Cal In – Single-ended, ECL (into 50 to -2 V), SMA connector, front panel.
Trig ge r In –
p-p
p-p
to3V
(50 , AC coupled), BNC connector, rear panel.
p-p
to 3 V
(50 , AC coupled), BNC connector, rear panel.
p-p
Input Ranges:
-5 V to 5 V (50
1.0 V
p-p
), 0.1 V resolution, -10 V to 10 V (1 k), Min. 0.5 V
(1 k), Min. 20 ns pulse width, Positive or Negative edge trigger, Delay
p-p
(50 ),
timing: see manuals, BNC connector, front panel.
Event In –
Input Rang
es:
-5 V to 5 V (50 ),0.1Vresolution,-10Vto10V(1k), 0.1 V resolution, Min.
0.5 V
(50 ), 1.0 V
p-p
BNC conne
ctor, front panel.
(1 k), Polarity: Normal or Invert, Delay timing: see manuals,
p-p
Instrument Control/Data Transfer Ports
GPIB – GPIB for remote control and data transfer. (conforms to IEEE 488.1,
compatible with IEEE 488.2 and SCPI-1999.0).
LAN – LAN for PC interface, remote control, and data transfer (conforms to IEEE
802.3).
Computer System and Peripherals
Compact PCI-based PC, Celeron 566 MHz CPU, Microsoft Windows 2000
Professional, 128 MB SDRAM, 20 GB Hard Drive, 1.44 MB floppy drive on front
D-ROM in rear panel, included USB compact keyboard and mouse.
panel, C
PC I/O Ports
USB 1.1 compliant ports (3 total, 1 front, 2 rear), PS/2 mouse and keyboard
connectors (rear panel), RJ-45 Ethernet connector (rear panel) supports 10Base-T
Base-Tx, VGA Out (rear panel), RS-232C.
and 100
Physical Characteristics
Display Characteristics – LCD color display, 800 (H) × 600 (V) (SVGA).
Mainframe
Dimensions
mm
in.
Height 266 10.5
Width 445 17.5
Length 462 19.7
Output Module
Dimensions
mm
in.
Height 33 1.3
Width 84 3.3
Length 133 5.2
Weight (approx.)
DTG5078
DTG5274
DTG5334
DTGM21
DTGM30
DTGM31
DTGM32
Mechanical Cooling – Required Clearance
Top and Bottom –
Side – 15 cm.
Rear – 7.5 cm.
2cm.
kg lb.
17.5 38.6
17.0 37.5
17.0 37.5
0.26 0.57
0.27 0.60
0.27 0.60
0.27 0.60
Power Supply
Power Source – 100to240VAC,47to63Hz.
Power Consumption – 560 W.
Environmental
eristic
Charact
Temperature
Humidity
ng
Operati
+10°Cto+40°C -20°Cto+60°C
20% to 80% relative
humidity with a maximum
wet bulb temperature of
29.4 °C, noncondensing
Nonoperating
(no diskette in floppy
drive): 5% to 90% relative
humidity with a maximum
wet bulb temperature of
40 °C, noncondensing
Altitude
Random Vibration
3,000 m (10,000 ft.) 12,000 m (40,000 ft.)
2
), from 5 Hz
RMS
RMS
2.65 m/s
(0.27 G
to 500 Hz, 10 minutes
22.36 m/s
(2.28 G
) total from 5 Hz
RMS
to 500 Hz, 10 minutes
each axis 3-axes.
30 minutes total
Safety –
UL61010B-1.
CAN/CSA-22.2 No. 1010.1.
EN61010-1/A2 1995.
Electromagnetic Compatibility (EMC) –
Europe:
EN61326 Class A.
EN61000-3-2, EN61000-3-3.
Australia / New Zealand:
AS/NZS 2064.
2
RMS
4 www.tektronix.com
Data Timing Generator — DT G5078 • DTG5274 • DTG5334
Output Module Characteristics
Basic Features
Output Channels and
Connections
4 single-ended (installed in DTG5078)
2 single-ended (DTG5274/5334)
Maximum Data Rate
(calculated by transition
time)
Normal/ Complement
(Invert)
Source Impedance 50 /23 (selectable) 50
Enable/Disable Yes (software switch)
Output Channel Timing
Transition Times (20 - 80%)
<340 ps (VOL = 0.0, VOH = 1.0) (typical)
(50 )
<1.0 ns (VOL = -1.65, VOH = 3.7) (typical)
Transition Time Control
Slew Rate Control
Range
Setting Resolution
Channel Output Levels
Amplitude/Resolution 0.25 to 5.35 V
0.25 to 3.9 V
0.50 to 7.8 V
Output Voltage Window -1.65 V to 3.70 V (from 23 source impedance into 50 )
-1.2 V to 2.7 V (from 50 source impedance into 50 )
-2.4 V to 5.4 V (from 50 source impedance into 1 M)
DC Accuracy (±3% of the set value) ±50 mV into 50 to GND
Limit setting High- and low-level limits can be set
Maximum Output Current
Overshoot <15% (typical) at High = 1.0 V, Low = 0 V <10% (typical) at High = 1.0 V, Low = 0 V
Typical Support Native
TTL, CMOS, (P)ECL, LVPECL LVDS, CMOS, (P)ECL, LVPECL, C ML
Logic
External Jitter Control
External Jitter control input
channels and connectors
Input range
Jitter Frequency
Jitter Amplitude
External Tri-state (Hi Z)
Control
Tri-state Enable Enable: Hi 3.3 V, Disable Lo: 0.0 V
Control Channels
Delay Time from Inhibit In to
Data Output
*2Minimum pulse width >2.86 ns.
3
*
Maximum output amplitude is dependent on output voltage window (offset). (See Figure 1.)
4
Up to 400 MHz by overdriving jitter input (max -1.0 V to +1.0 V
*
5
Jitter amplitude at data rates >2.7 Gb/s calculated as {240 - 61.5 × (data rate - 2.7)} ps
*
DTGM21 DTGM30 DTGM31 DTGM32
2 complementary channels
4 SMA connectors
1 complementary channel
2 SMA connectors
4 S MA connectors
1.1 Gb/s 3.35 Gb/s 350 Mb/s*
Selectable
<95 ps (VOL = 0.0, VOH = 0.1) (typical)
<110 ps (VOL = 0.0, VOH = 1.0) (typical)
No
–
–
/ 5 mV (from 23 source
p-p
impedance into 50 )
/ 5 mV (from 50 source
p-p
impedance into 50 )
/ 5 mV (from 50 source
p-p
impedance into 1 M)
0.03 to 1.25 V
0.06 to 2.5 V
/5mV(into50 )*
p-p
/5mV(into1M )*
p-p
-2.0Vto2.47V(into50)
-2.0Vto7.0V(into1M)
±80 mA
No Yes
–
1 single-ended channel
1 SMA connector
–
-0.5Vto+0.5V(typical)
Max input: -1.0 V to +1.0 V
Yes (SMB input connector)
–
–
DC to 250 MHz *
for 1 V
240 ps
p-p
Data rate 2.7 Gb/s*
No
p-p
4
input at
5
–
By output module level
Active to Inhibit: 13 ns,
–
–
Inhibit to Active: 12 ns
). (See Figure 2.)
p-p
p-p
for 1 V
input (see Figure 3).
p-p
3
2 single-ended channels
3
2 SMA connectors
-0.5Vto+0.5V
DC to 50 MHz
Range 1:
Upto1nsat1V
Range 2:
Upto2nsat1V
2
p-p
p-p
www.tektronix.com 5
Data Sheet
Figure 2. DTGM31 Jitter Input Frequency Response
Figure 1. DTGM30, M31, M32 Output Amplitude vs. Offset
3. DTGM31 Maximum Jitter Amplitude vs. Data Rate
Figure
6 www.tektronix.com
Data Timing Generator — DT G5078 • DTG5274 • DTG5334
Ordering Information
Mainframes
DTG5078
750 Mb/s, 8-slot mainframe.
DTG5274
2.7 Gb/s, 4-s
DTG5334
3.35 Gb/s, 4-slot mainframe.
Mainframes Include: Microsoft Windows 2000 Professional operating system
recovery disk, DTG5000 Series application software install disk, user manual
(technical reference, registration card, accessory pouch, front cover, compact USB
keyboard, USB mouse, lead set for DC Output, 16-CON, twisted pair, 24 in. (60 cm),
50 SMA terminator (male, DC to 18 GHz), SMA connector cap (10 ea. with
DTG5078, 8 ea. with DTG5274/5334), power cord, calibration certificate.
Please specify power cord and language option when ordering.
Mainframe Options
Opt. 1R – Rackmount.
Internati
Opt. A0 – North America power.
Opt. A1 – Universal EURO power.
Opt. A2 – U
Opt. A3 – Australia power.
Opt. A5 – Switzerland power.
Opt. A6 – J
Opt. A10 – China power.
Opt. A99 – No power cord or AC adapter.
Language Options
Opt. L0 – English.
Opt. L5 – Japanese.
Output Modules
DTGM21
4 channels (DTG5078), 2 channels (DTG5274/5334).
5.35 V
3.9 V
Tr/Tf (20% to 80%) <340 ps (1 V
External Tri-state (Hi_Z) control function.
DTGM30
2 channels.
1.25 V
Tr/Tf(20%to80%)<110ps(1V
DTGM31
1 channel.
1.25 V
Tr/Tf(20%to80%)<110ps(1V
External jitter control input.
Jitter frequency DC – 250 MHz.
Jitter amplitude up to 240 ps.
lot mainframe.
onal Power Plugs
nited Kingdom power.
apan power.
(from 23 to 50 ).
p-p
(50 ), 7.8 V
p-p
(50 ), 2.5 V
p-p
(50 ), 2.5 V
p-p
(1 M).
p-p
p-p
p-p
(1 M ).
(1 M).
,into50), fixed.
p-p
,into50 ), fixed.
p-p
,into50 ), fixed.
p-p
DTGM32
1 channel.
1.25 V
(50 ), 2.5 V
p-p
Tr/Tf(20%to80%)<110ps(1V
2 ch external jitter control input.
p-p
(1 M).
,into50), fixed.
p-p
Jitter frequency DC – 50 MHz.
Jitter amplitude up to 1 ns / 2 ns.
Output Modules Include: Installation sheet (Japanese/English), SMA connector cap
(set of 4 with DTGM21, set of 2 with DTGM30), 50 SMA terminator (DC to 18 GHz)
(set of 2 with DTGM30, set of 1 with DTGM31/32), registration card.
Service Options
Opt. C3 – Calibration Service 3 Years.
Opt. C5 – Calibration Service 5 Years.
Opt. D1 – Calibration Data Report (English).
Opt. D3 – Calibration Data Report 3 Years (with Opt. C3).
Opt. D5 – Calibration Data Report 5 Years (with Opt. C5).
Opt. R3 – Repair Service 3 Years.
Opt. R5 – Repair Service 5 Years.
Service Upgrade Kit
To determine if your DTG5334 or DTGM30 requires a service upgrade to meet these
specifications, please contact your local Tektronix sales representative or technical
support (1-800-833-9200, select Option 3, or e-mail: TechSupport@tektronix.com
)or
service support (1-800-833-9200, select Option 2). Opt. IFC is required.
DTG53UP
Opt. 13 – Enable operation of up to 3.4 Gb/s, and total jitter <44 ps
800 mV
Opt. IFC – Service installation and calibration, required with Opt. 13.
differential output with DTGM30, requires the order of Opt. IFC.
p-p
up to 3.35 Gb/s,
p-p
DTGM30UP
Opt. 13 – Enables total jitter <44 ps up to 3.35 Gb/s, 800mV
DTG5334, requires the order of Opt. IFC
Opt. IFC – Service Installation and Calibration, required with Opt. 13.
differential output with
p-p
Recommended Accessories
Service Manual (English) – Order 071-1285-xx.
Test Adapters
HDMI TPA-R Test Adapter Set – HDMITPA-RTDR(setof2),HDMITPA-RDI
(differential), HDMI TPA-R SE (single-ended). Order 013-A012-50.
HDMI TPA-P Test Adapter Set – HDMI TPA-P TDR, HDMI TPA-P DI (differential),
HDMI TPA-P SE (single-ended). Order 013-A013-50.
DVI TPA-R Test Adapter Set – DVITPA-RTDR(setof2),DVITPA-RDI(differential),
DVI TPA-R SE (single-ended). Order 013-A014-50.
Note: These adapters do not include clock recovery circuits.
www.tektronix.com 7
Data Sheet
Cables
Part Number Type
012-A229-xx
012-1505-xx
012-1503-xx
012-0991-xx
012-A230-xx
Lead set for DC Output, 16-CON, twisted pair, 24 in (60 cm)
Pinheadercable,20in. (51cm)
Pin header SMB cable, 20 in. (51 cm)
GPIB Cable, double-shielded, 79 in (200 cm)
Master/Slave Cable Set for connecting two Mainframes; set
of 4 SMA cables, 51 cm, 50 (174-1427-xx), and set of 2 B NC
cables, 46 cm (012-0076-xx)
012-A231-xx
Master/Slave Cable S et for connecting three Mainframes;
setof6SMAcables,51cm,50 (174-1427-xx) and set of 3
BNC cables, 46 cm (012-0076-xx)
BNC Cables 50 Ω
012-0076-xx
012-1342-xx
012-0057-xx
012-1256-xx
SMA Cables 50 Ω
174-1364-xx
174-1427-xx
174-1341-xx
174-1428-xx
Delay SMA Cables 50 Ω
015-1019-xx
18 in. (46 cm)
24 in. (61 cm)
42 in. (107 cm)
With shield, 98 in. (250 cm)
12 in (30 cm)
20 in. (51 cm)
39 in. (100 cm)
60 in. (152 cm)
1ns(maletofemale)
015-0560-xx 2 ns
015-1005-xx
015-0561-xx
015-1006-xx
2ns(maletofemale)
5ns
5ns(maletofemale)
Adapters and Connectors
Part number Type
015-0671-xx
015-0554-xx
015-0572-xx
015-0369-xx
015-0549-xx
015-0553-xx
SMB - BNC adapter
50 SMA (male) - BNC (female) Adapter
50 SMA (female) - BNC (male) Adapter
50 N (male) - SMA (male) Adapter
50 SMA Adapter (male - female), DC to 18 GHz, VSWR: 1.2
50 SMA Adapter (slide on type female - male), DC to
18 GHz, VSWR: 1.05 + 0.002F (GHz)
015-1016-xx
015-0565-xx
50 SMA T-Connector (male - female/female)
50 SMA Divider (female/female/female), 6 dB, DC to
18 GHz, VSWR: 1.9
Tektronix is registered to ISO 9001 and ISO 14001 by SRI Quality System Registrar.
Product(s) compl
Standard Codes and Formats.
ies with IEEE Standard 488.1-1987, RS-232-C, and with Tektronix
8 www.tektronix.com
Data Timing Generator — DT G5078 • DTG5274 • DTG5334
www.tektronix.com 9
Data Sheet
10 www.tektronix.com
Data Timing Generator — DT G5078 • DTG5274 • DTG5334
www.tektronix.com 11
Data Sheet
Contact Tektronix:
ASEAN / Australa
Balkans, Israel, South Africa and other ISE Countries +41 52 675 3777
Central East Eu
Mexico, Central/South America & Caribbean 52 (55)56 04 50 90
Middle E ast,
* European toll-free number. If not accessible, call: +41 52 675 3777
rope and the Baltics +41526753777
Central Europe & Greece +41 52 675 3777
Asia, and North Africa +41 52 675 3777
The Netherlands 00800 2255 4835*
People’s Rep
Republic of
Russia & CIS +7 (495) 7484900
United Kingdom & Ireland 00800 2255 4835*
sia (65) 6356 3900
Austria 00800 2255 4835*
Belgium 00800 22
Brazil +55(11)37597627
Canada 1 800 833 9200
Denmark +4580881401
Finland +41526
France 008 00 2255 4835*
Germany 00800 2255 4835*
Hong Kong 400 8
India 000 800 650 1835
Italy 00800 2255 4835*
Japan 81 (3) 67
Luxembourg +41526753777
ublic of China 400 820 5835
Poland +41 52 675 3777
Korea 001 800 8255 2835
South Africa +41526753777
Spain 00800
Sweden 008 00 2255 4835*
Switzerland 00800 2255 4835*
Tai wa n 886 (
55 4835*
75 3777
20 5835
14 3010
Norway 800 16098
Portugal 80 08 12370
2255 4835*
2) 2722 9622
USA 1 800 833 9200
Updated 10 February 2011
www.tektronix.com
For Further Information. Tektronix maintains a comprehensive, constantly expanding
collection of application notes, technical briefs and other r esources to help engineers working
on the cutting edge of technology. Please visit www.tektronix.com
t © Tektronix, Inc. All rights reserved. Tektronix products are covered by U.S. and foreign patents,
Copyrigh
d pending. Information in this publication supersedes that in all previously published material.
issued an
tion and price change privileges reserved. TEKTRONIX and TEK are registered trademarks of
Specifica
x, Inc. All other trade names referenced are the service marks, trademarks, or registered trademarks
Tek tro ni
espective companies.
of their r
02 Oct 2011 86W-16679-7
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